S3C24xx NAND: allow for faster timings
commitdfa1093a4fbed3c625cffeb3f0dc7e74a035a704
authorHarald Welte <laforge@openmoko.org>
Tue, 21 Oct 2008 07:17:07 +0000 (21 08:17 +0100)
committerMike Westerhof <mwester@dls.net>
Tue, 21 Oct 2008 18:43:56 +0000 (21 13:43 -0500)
treed9017d321092a09afa6f34fc443985724dfb2329
parenta5bc2ae354138a6bdc63646feae04f241956d53f
S3C24xx NAND: allow for faster timings

Tacls can actually be zero with some NAND flash devices, so we need
to permit this.

Also, the TACLS register actually specifies the actual number of
HCLK clocks, where the TWRPH0 and TWRPH1 registers are auto-incremented
by one HCLK clock in hardware.

Signed-off-by: Harald Welte <laforge@openmoko.org>
drivers/mtd/nand/s3c2410.c