| commit | df1bdc0667eb3132fe60b3562347ca9133694ee0 | |
| author | Nick Piggin <npiggin@suse.de> | |
| Sat, 13 Oct 2007 01:06:00 +0000 (13 03:06 +0200) | ||
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | |
| Sat, 13 Oct 2007 01:41:21 +0000 (12 18:41 -0700) | ||
| tree | 5d044be900ccc9f13662e1aeae7df6ed108ee43a | treesnapshot (tar.gz zip) |
| parent | 2b9e0aae1d50e880c58d46788e5e3ebd89d75d62 | commitdiff |
x86: fence oostores on 64-bit
movnt* instructions are not strongly ordered with respect to other stores,
so if we are to assume stores are strongly ordered in the rest of the 64
bit code, we must fence these off (see similar examples in 32 bit code).
[ The AMD memory ordering document seems to say that nontemporal stores can
also pass earlier regular stores, so maybe we need sfences _before_
movnt* everywhere too? ]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
movnt* instructions are not strongly ordered with respect to other stores,
so if we are to assume stores are strongly ordered in the rest of the 64
bit code, we must fence these off (see similar examples in 32 bit code).
[ The AMD memory ordering document seems to say that nontemporal stores can
also pass earlier regular stores, so maybe we need sfences _before_
movnt* everywhere too? ]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| arch/x86/lib/copy_user_nocache_64.S | diffblobblamehistory |