include/asm-x86/geode.h

   1 /*
   2  * AMD Geode definitions
   3  * Copyright (C) 2006, Advanced Micro Devices, Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of version 2 of the GNU General Public License
   7  * as published by the Free Software Foundation.
   8  */
   9
  10 #ifndef _ASM_GEODE_H_
  11 #define _ASM_GEODE_H_
  12
  13 #include <asm/processor.h>
  14 #include <linux/io.h>
  15
  16 /* Generic southbridge functions */
  17
  18 #define GEODE_DEV_PMS 0
  19 #define GEODE_DEV_ACPI 1
  20 #define GEODE_DEV_GPIO 2
  21 #define GEODE_DEV_MFGPT 3
  22
  23 extern int geode_get_dev_base(unsigned int dev);
  24
  25 /* Useful macros */
  26 #define geode_pms_base()        geode_get_dev_base(GEODE_DEV_PMS)
  27 #define geode_acpi_base()       geode_get_dev_base(GEODE_DEV_ACPI)
  28 #define geode_gpio_base()       geode_get_dev_base(GEODE_DEV_GPIO)
  29 #define geode_mfgpt_base()      geode_get_dev_base(GEODE_DEV_MFGPT)
  30
  31 /* MSRS */
  32
  33 #define MSR_LX_GLD_MSR_CONFIG   0x48002001
  34 #define MSR_LX_MSR_PADSEL       0x48002011      /* NOT 0x48000011; the data
  35                                                  * sheet has the wrong value */
  36 #define MSR_GLCP_SYS_RSTPLL     0x4C000014
  37 #define MSR_GLCP_DOTPLL         0x4C000015
  38
  39 #define MSR_LBAR_SMB            0x5140000B
  40 #define MSR_LBAR_GPIO           0x5140000C
  41 #define MSR_LBAR_MFGPT          0x5140000D
  42 #define MSR_LBAR_ACPI           0x5140000E
  43 #define MSR_LBAR_PMS            0x5140000F
  44
  45 #define MSR_DIVIL_SOFT_RESET    0x51400017
  46
  47 #define MSR_PIC_YSEL_LOW        0x51400020
  48 #define MSR_PIC_YSEL_HIGH       0x51400021
  49 #define MSR_PIC_ZSEL_LOW        0x51400022
  50 #define MSR_PIC_ZSEL_HIGH       0x51400023
  51
  52 #define MSR_MFGPT_IRQ           0x51400028
  53 #define MSR_MFGPT_NR            0x51400029
  54 #define MSR_MFGPT_SETUP         0x5140002B
  55
  56 #define MSR_LX_SPARE_MSR        0x80000011      /* DC-specific */
  57
  58 #define MSR_GX_GLD_MSR_CONFIG   0xC0002001
  59 #define MSR_GX_MSR_PADSEL       0xC0002011
  60
  61 /* Resource Sizes */
  62
  63 #define LBAR_GPIO_SIZE          0xFF
  64 #define LBAR_MFGPT_SIZE         0x40
  65 #define LBAR_ACPI_SIZE          0x40
  66 #define LBAR_PMS_SIZE           0x80
  67
  68 /* ACPI registers (PMS block) */
  69
  70 /*
  71  * PM1_EN is only valid when VSA is enabled for 16 bit reads.
  72  * When VSA is not enabled, *always* read both PM1_STS and PM1_EN
  73  * with a 32 bit read at offset 0x0
  74  */
  75
  76 #define PM1_STS                 0x00
  77 #define PM1_EN                  0x02
  78 #define PM1_CNT                 0x08
  79 #define PM2_CNT                 0x0C
  80 #define PM_TMR                  0x10
  81 #define PM_GPE0_STS             0x18
  82 #define PM_GPE0_EN              0x1C
  83
  84 /* PMC registers (PMS block) */
  85
  86 #define PM_SSD                  0x00
  87 #define PM_SCXA                 0x04
  88 #define PM_SCYA                 0x08
  89 #define PM_OUT_SLPCTL           0x0C
  90 #define PM_SCLK                 0x10
  91 #define PM_SED                  0x1
  92 #define PM_SCXD                 0x18
  93 #define PM_SCYD                 0x1C
  94 #define PM_IN_SLPCTL            0x20
  95 #define PM_WKD                  0x30
  96 #define PM_WKXD                 0x34
  97 #define PM_RD                   0x38
  98 #define PM_WKXA                 0x3C
  99 #define PM_FSD                  0x40
 100 #define PM_TSD                  0x44
 101 #define PM_PSD                  0x48
 102 #define PM_NWKD                 0x4C
 103 #define PM_AWKD                 0x50
 104 #define PM_SSC                  0x54
 105
 106 /* VSA2 magic values */
 107
 108 #define VSA_VRC_INDEX           0xAC1C
 109 #define VSA_VRC_DATA            0xAC1E
 110 #define VSA_VR_UNLOCK           0xFC53  /* unlock virtual register */
 111 #define VSA_VR_SIGNATURE        0x0003
 112 #define VSA_VR_MEM_SIZE         0x0200
 113 #define VSA_SIG                 0x4132  /* signature is ascii 'VSA2' */
 114
 115 /* GPIO */
 116
 117 #define GPIO_OUTPUT_VAL         0x00
 118 #define GPIO_OUTPUT_ENABLE      0x04
 119 #define GPIO_OUTPUT_OPEN_DRAIN  0x08
 120 #define GPIO_OUTPUT_INVERT      0x0C
 121 #define GPIO_OUTPUT_AUX1        0x10
 122 #define GPIO_OUTPUT_AUX2        0x14
 123 #define GPIO_PULL_UP            0x18
 124 #define GPIO_PULL_DOWN          0x1C
 125 #define GPIO_INPUT_ENABLE       0x20
 126 #define GPIO_INPUT_INVERT       0x24
 127 #define GPIO_INPUT_FILTER       0x28
 128 #define GPIO_INPUT_EVENT_COUNT  0x2C
 129 #define GPIO_READ_BACK          0x30
 130 #define GPIO_INPUT_AUX1         0x34
 131 #define GPIO_EVENTS_ENABLE      0x38
 132 #define GPIO_LOCK_ENABLE        0x3C
 133 #define GPIO_POSITIVE_EDGE_EN   0x40
 134 #define GPIO_NEGATIVE_EDGE_EN   0x44
 135 #define GPIO_POSITIVE_EDGE_STS  0x48
 136 #define GPIO_NEGATIVE_EDGE_STS  0x4C
 137
 138 #define GPIO_MAP_X              0xE0
 139 #define GPIO_MAP_Y              0xE4
 140 #define GPIO_MAP_Z              0xE8
 141 #define GPIO_MAP_W              0xEC
 142
 143 static inline u32 geode_gpio(unsigned int nr)
 144 {
 145         BUG_ON(nr > 28);
 146         return 1 << nr;
 147 }
 148
 149 extern void geode_gpio_set(u32, unsigned int);
 150 extern void geode_gpio_clear(u32, unsigned int);
 151 extern int geode_gpio_isset(u32, unsigned int);
 152 extern void geode_gpio_setup_event(unsigned int, int, int);
 153 extern void geode_gpio_set_irq(unsigned int, unsigned int);
 154
 155 static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
 156 {
 157         geode_gpio_setup_event(gpio, pair, 0);
 158 }
 159
 160 static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
 161 {
 162         geode_gpio_setup_event(gpio, pair, 1);
 163 }
 164
 165 /* Specific geode tests */
 166
 167 static inline int is_geode_gx(void)
 168 {
 169         return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
 170                 (boot_cpu_data.x86 == 5) &&
 171                 (boot_cpu_data.x86_model == 5));
 172 }
 173
 174 static inline int is_geode_lx(void)
 175 {
 176         return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
 177                 (boot_cpu_data.x86 == 5) &&
 178                 (boot_cpu_data.x86_model == 10));
 179 }
 180
 181 static inline int is_geode(void)
 182 {
 183         return (is_geode_gx() || is_geode_lx());
 184 }
 185
 186 /*
 187  * The VSA has virtual registers that we can query for a signature.
 188  */
 189 static inline int geode_has_vsa2(void)
 190 {
 191         outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
 192         outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
 193
 194         return (inw(VSA_VRC_DATA) == VSA_SIG);
 195 }
 196
 197 /* MFGPTs */
 198
 199 #define MFGPT_MAX_TIMERS        8
 200 #define MFGPT_TIMER_ANY         (-1)
 201
 202 #define MFGPT_DOMAIN_WORKING    1
 203 #define MFGPT_DOMAIN_STANDBY    2
 204 #define MFGPT_DOMAIN_ANY        (MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY)
 205
 206 #define MFGPT_CMP1              0
 207 #define MFGPT_CMP2              1
 208
 209 #define MFGPT_EVENT_IRQ         0
 210 #define MFGPT_EVENT_NMI         1
 211 #define MFGPT_EVENT_RESET       3
 212
 213 #define MFGPT_REG_CMP1          0
 214 #define MFGPT_REG_CMP2          2
 215 #define MFGPT_REG_COUNTER       4
 216 #define MFGPT_REG_SETUP         6
 217
 218 #define MFGPT_SETUP_CNTEN       (1 << 15)
 219 #define MFGPT_SETUP_CMP2        (1 << 14)
 220 #define MFGPT_SETUP_CMP1        (1 << 13)
 221 #define MFGPT_SETUP_SETUP       (1 << 12)
 222 #define MFGPT_SETUP_STOPEN      (1 << 11)
 223 #define MFGPT_SETUP_EXTEN       (1 << 10)
 224 #define MFGPT_SETUP_REVEN       (1 << 5)
 225 #define MFGPT_SETUP_CLKSEL      (1 << 4)
 226
 227 static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
 228 {
 229         u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
 230         outw(value, base + reg + (timer * 8));
 231 }
 232
 233 static inline u16 geode_mfgpt_read(int timer, u16 reg)
 234 {
 235         u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
 236         return inw(base + reg + (timer * 8));
 237 }
 238
 239 extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
 240 extern int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable);
 241 extern int geode_mfgpt_alloc_timer(int timer, int domain);
 242
 243 #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
 244 #define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
 245
 246 #ifdef CONFIG_GEODE_MFGPT_TIMER
 247 extern int __init mfgpt_timer_setup(void);
 248 #else
 249 static inline int mfgpt_timer_setup(void) { return 0; }
 250 #endif
 251
 252 #endif