| commit | ea76a1295e44ace82062690bca71436f03b26c39 | |
| author | Hendrik Brueckner <brueckner@linux.vnet.ibm.com> | |
| Mon, 7 Dec 2009 11:44:42 +0000 (7 12:44 +0100) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Fri, 18 Dec 2009 22:03:51 +0000 (18 14:03 -0800) | ||
| tree | c694b57f9074ae853689cf2da859f0b9a7a91c90 | treesnapshot (tar.gz zip) |
| parent | effa97cc19cf828bc21c950c1c19e2deef11e874 | commitdiff |
s390: clear high-order bits of registers after sam64
commit cf87b7439ec81b9374e7772e44e9cb2eb9e57160 upstream.
When the kernel is IPLed without the CLEAR option and switches
to 64-bit, the high-order half of the registers might contain
random values. This can cause addressing exceptions and the
kernel enters an interrupt loop.
Initialize the high-order half of the general purpose registers
with zeros after switching to 64-bit mode.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit cf87b7439ec81b9374e7772e44e9cb2eb9e57160 upstream.
When the kernel is IPLed without the CLEAR option and switches
to 64-bit, the high-order half of the registers might contain
random values. This can cause addressing exceptions and the
kernel enters an interrupt loop.
Initialize the high-order half of the general purpose registers
with zeros after switching to 64-bit mode.
Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| arch/s390/kernel/head64.S | diffblobblamehistory |