| commit | a789ed5fb6d0256c4177c2cc27e06520ddbe4d4c | |
| author | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | |
| Fri, 24 Apr 2009 07:26:50 +0000 (24 00:26 -0700) | ||
| committer | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | |
| Fri, 8 May 2009 22:55:24 +0000 (8 15:55 -0700) | ||
| tree | afdbb0c64c15ec522eae260949bfec02df2291b2 | treesnapshot (tar.gz zip) |
| parent | b80119bb35a49a4e8dbfb9708872adfd5cf38dee | commitdiff |
xen: cache cr0 value to avoid trap'n'emulate for read_cr0
stts() is implemented in terms of read_cr0/write_cr0 to update the
state of the TS bit. This happens during context switch, and so
is fairly performance critical. Rather than falling back to
a trap-and-emulate native read_cr0, implement our own by caching
the last-written value from write_cr0 (the TS bit is the only one
we really care about).
Impact: optimise Xen context switches
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
stts() is implemented in terms of read_cr0/write_cr0 to update the
state of the TS bit. This happens during context switch, and so
is fairly performance critical. Rather than falling back to
a trap-and-emulate native read_cr0, implement our own by caching
the last-written value from write_cr0 (the TS bit is the only one
we really care about).
Impact: optimise Xen context switches
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
| arch/x86/xen/enlighten.c | diffblobblamehistory |