| commit | 82a1c0522cf747742461ac7874f463af46e3ba18 | |
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | |
| Mon, 19 Oct 2009 07:43:48 +0000 (19 15:43 +0800) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Tue, 10 Nov 2009 00:22:37 +0000 (9 16:22 -0800) | ||
| tree | 19442afe0f30644e03ae0793ed94fbf6affe1246 | treesnapshot (tar.gz zip) |
| parent | a9d48b3eae33aeb6bc1c366913778d77267e17b7 | commitdiff |
drm/i915: fix to setup display reference clock control on Ironlake
commit c038e51e841581cc3fb9a76e5e16331331e9c85c upstream.
For new stepping of PCH, the display reference clock
is fully under driver's control. This one trys to setup
all needed reference clock for different outputs. Older
stepping of PCH chipset should be ignoring this.
This fixes output failure issue on newer PCH which requires
driver to take control of reference clock enabling.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit c038e51e841581cc3fb9a76e5e16331331e9c85c upstream.
For new stepping of PCH, the display reference clock
is fully under driver's control. This one trys to setup
all needed reference clock for different outputs. Older
stepping of PCH chipset should be ignoring this.
This fixes output failure issue on newer PCH which requires
driver to take control of reference clock enabling.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| drivers/gpu/drm/i915/i915_reg.h | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_display.c | diffblobblamehistory |