| commit | 324ff2c1793b6d3d5c377cf6de2ada9b49af227a | |
| author | Byron Bradley <byron.bbradley@gmail.com> | |
| Tue, 5 Feb 2008 07:47:15 +0000 (4 23:47 -0800) | ||
| committer | Jeff Garzik <jeff@garzik.org> | |
| Tue, 5 Feb 2008 18:31:11 +0000 (5 13:31 -0500) | ||
| tree | e512aa45a121841f2f989aa5201b17533a97bee4 | treesnapshot (tar.gz zip) |
| parent | 39dbd9587bebedbd72be9a8a30a8c4783f3ef7eb | commitdiff |
mv643xx_eth: fix byte order when checksum offload is enabled
The Marvell Orion system on chips have an integrated mv643xx MAC. On these
little endian ARM devices mv643xx will oops when checksum offload is
enabled. Swapping the byte order of the protocol and checksum solves this
problem.
Signed-off-by: Byron Bradley <byron.bbradley@gmail.com>
Cc: Dale Farnsworth <dale@farnsworth.org>
Cc: Manish Lachwani <mlachwani@mvista.com>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The Marvell Orion system on chips have an integrated mv643xx MAC. On these
little endian ARM devices mv643xx will oops when checksum offload is
enabled. Swapping the byte order of the protocol and checksum solves this
problem.
Signed-off-by: Byron Bradley <byron.bbradley@gmail.com>
Cc: Dale Farnsworth <dale@farnsworth.org>
Cc: Manish Lachwani <mlachwani@mvista.com>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
| drivers/net/mv643xx_eth.c | diffblobblamehistory |