2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
47 * Include the apic definitions for x86 to have the APIC timer related defines
48 * available also for UP (on SMP it gets magically included via linux/smp.h).
49 * asm/acpi.h is not an option, as it would require more include magic. Also
50 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
57 #include <asm/uaccess.h>
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
63 #define ACPI_PROCESSOR_CLASS "processor"
64 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
65 ACPI_MODULE_NAME("processor_idle");
66 #define ACPI_PROCESSOR_FILE_POWER "power"
67 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
68 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
69 #define C2_OVERHEAD 1 /* 1us */
70 #define C3_OVERHEAD 1 /* 1us */
71 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
73 static unsigned int max_cstate __read_mostly
= ACPI_PROCESSOR_MAX_POWER
;
74 module_param(max_cstate
, uint
, 0000);
75 static unsigned int nocst __read_mostly
;
76 module_param(nocst
, uint
, 0000);
78 static unsigned int latency_factor __read_mostly
= 2;
79 module_param(latency_factor
, uint
, 0644);
82 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
83 * For now disable this. Probably a bug somewhere else.
85 * To skip this limit, boot/load with a large max_cstate limit.
87 static int set_max_cstate(const struct dmi_system_id
*id
)
89 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
92 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
93 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
94 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
96 max_cstate
= (long)id
->driver_data
;
101 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
102 callers to only run once -AK */
103 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
104 { set_max_cstate
, "IBM ThinkPad R40e", {
105 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
106 DMI_MATCH(DMI_BIOS_VERSION
,"1SET70WW")}, (void *)1},
107 { set_max_cstate
, "IBM ThinkPad R40e", {
108 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
109 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW")}, (void *)1},
110 { set_max_cstate
, "IBM ThinkPad R40e", {
111 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
112 DMI_MATCH(DMI_BIOS_VERSION
,"1SET43WW") }, (void*)1},
113 { set_max_cstate
, "IBM ThinkPad R40e", {
114 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
115 DMI_MATCH(DMI_BIOS_VERSION
,"1SET45WW") }, (void*)1},
116 { set_max_cstate
, "IBM ThinkPad R40e", {
117 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
118 DMI_MATCH(DMI_BIOS_VERSION
,"1SET47WW") }, (void*)1},
119 { set_max_cstate
, "IBM ThinkPad R40e", {
120 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
121 DMI_MATCH(DMI_BIOS_VERSION
,"1SET50WW") }, (void*)1},
122 { set_max_cstate
, "IBM ThinkPad R40e", {
123 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
124 DMI_MATCH(DMI_BIOS_VERSION
,"1SET52WW") }, (void*)1},
125 { set_max_cstate
, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION
,"1SET55WW") }, (void*)1},
128 { set_max_cstate
, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION
,"1SET56WW") }, (void*)1},
131 { set_max_cstate
, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION
,"1SET59WW") }, (void*)1},
134 { set_max_cstate
, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW") }, (void*)1},
137 { set_max_cstate
, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION
,"1SET61WW") }, (void*)1},
140 { set_max_cstate
, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION
,"1SET62WW") }, (void*)1},
143 { set_max_cstate
, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION
,"1SET64WW") }, (void*)1},
146 { set_max_cstate
, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION
,"1SET65WW") }, (void*)1},
149 { set_max_cstate
, "IBM ThinkPad R40e", {
150 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
151 DMI_MATCH(DMI_BIOS_VERSION
,"1SET68WW") }, (void*)1},
152 { set_max_cstate
, "Medion 41700", {
153 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
154 DMI_MATCH(DMI_BIOS_VERSION
,"R01-A1J")}, (void *)1},
155 { set_max_cstate
, "Clevo 5600D", {
156 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
157 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
162 static inline u32
ticks_elapsed(u32 t1
, u32 t2
)
166 else if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_32BIT_TIMER
))
167 return (((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
169 return ((0xFFFFFFFF - t1
) + t2
);
172 static inline u32
ticks_elapsed_in_us(u32 t1
, u32 t2
)
175 return PM_TIMER_TICKS_TO_US(t2
- t1
);
176 else if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_32BIT_TIMER
))
177 return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
179 return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1
) + t2
);
183 * Callers should disable interrupts before the call and enable
184 * interrupts after return.
186 static void acpi_safe_halt(void)
188 current_thread_info()->status
&= ~TS_POLLING
;
190 * TS_POLLING-cleared state must be visible before we
194 if (!need_resched()) {
198 current_thread_info()->status
|= TS_POLLING
;
201 #ifdef ARCH_APICTIMER_STOPS_ON_C3
204 * Some BIOS implementations switch to C3 in the published C2 state.
205 * This seems to be a common problem on AMD boxen, but other vendors
206 * are affected too. We pick the most conservative approach: we assume
207 * that the local APIC stops in both C2 and C3.
209 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
210 struct acpi_processor_cx
*cx
)
212 struct acpi_processor_power
*pwr
= &pr
->power
;
213 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
215 if (boot_cpu_has(X86_FEATURE_AMDC1E
))
216 type
= ACPI_STATE_C1
;
219 * Check, if one of the previous states already marked the lapic
222 if (pwr
->timer_broadcast_on_state
< state
)
225 if (cx
->type
>= type
)
226 pr
->power
.timer_broadcast_on_state
= state
;
229 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
)
231 unsigned long reason
;
233 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
234 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
236 clockevents_notify(reason
, &pr
->id
);
239 /* Power(C) State timer broadcast control */
240 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
241 struct acpi_processor_cx
*cx
,
244 int state
= cx
- pr
->power
.states
;
246 if (state
>= pr
->power
.timer_broadcast_on_state
) {
247 unsigned long reason
;
249 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
250 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
251 clockevents_notify(reason
, &pr
->id
);
257 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
258 struct acpi_processor_cx
*cstate
) { }
259 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
) { }
260 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
261 struct acpi_processor_cx
*cx
,
269 * Suspend / resume control
271 static int acpi_idle_suspend
;
273 int acpi_processor_suspend(struct acpi_device
* device
, pm_message_t state
)
275 acpi_idle_suspend
= 1;
279 int acpi_processor_resume(struct acpi_device
* device
)
281 acpi_idle_suspend
= 0;
285 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
286 static int tsc_halts_in_c(int state
)
288 switch (boot_cpu_data
.x86_vendor
) {
290 case X86_VENDOR_INTEL
:
292 * AMD Fam10h TSC will tick in all
293 * C/P/S0/S1 states when this bit is set.
295 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
300 return state
> ACPI_STATE_C1
;
305 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
314 /* if info is obtained from pblk/fadt, type equals state */
315 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
316 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
318 #ifndef CONFIG_HOTPLUG_CPU
320 * Check for P_LVL2_UP flag before entering C2 and above on
323 if ((num_online_cpus() > 1) &&
324 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
328 /* determine C2 and C3 address from pblk */
329 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
330 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
332 /* determine latencies from FADT */
333 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
334 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
336 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
337 "lvl2[0x%08x] lvl3[0x%08x]\n",
338 pr
->power
.states
[ACPI_STATE_C2
].address
,
339 pr
->power
.states
[ACPI_STATE_C3
].address
));
344 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
346 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
347 /* set the first C-State to C1 */
348 /* all processors need to support C1 */
349 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
350 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
351 pr
->power
.states
[ACPI_STATE_C1
].entry_method
= ACPI_CSTATE_HALT
;
353 /* the C0 state only exists as a filler in our array */
354 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
358 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
360 acpi_status status
= 0;
364 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
365 union acpi_object
*cst
;
373 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
374 if (ACPI_FAILURE(status
)) {
375 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
379 cst
= buffer
.pointer
;
381 /* There must be at least 2 elements */
382 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
383 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
388 count
= cst
->package
.elements
[0].integer
.value
;
390 /* Validate number of power states. */
391 if (count
< 1 || count
!= cst
->package
.count
- 1) {
392 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
397 /* Tell driver that at least _CST is supported. */
398 pr
->flags
.has_cst
= 1;
400 for (i
= 1; i
<= count
; i
++) {
401 union acpi_object
*element
;
402 union acpi_object
*obj
;
403 struct acpi_power_register
*reg
;
404 struct acpi_processor_cx cx
;
406 memset(&cx
, 0, sizeof(cx
));
408 element
= &(cst
->package
.elements
[i
]);
409 if (element
->type
!= ACPI_TYPE_PACKAGE
)
412 if (element
->package
.count
!= 4)
415 obj
= &(element
->package
.elements
[0]);
417 if (obj
->type
!= ACPI_TYPE_BUFFER
)
420 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
422 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
423 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
426 /* There should be an easy way to extract an integer... */
427 obj
= &(element
->package
.elements
[1]);
428 if (obj
->type
!= ACPI_TYPE_INTEGER
)
431 cx
.type
= obj
->integer
.value
;
433 * Some buggy BIOSes won't list C1 in _CST -
434 * Let acpi_processor_get_power_info_default() handle them later
436 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
439 cx
.address
= reg
->address
;
440 cx
.index
= current_count
+ 1;
442 cx
.entry_method
= ACPI_CSTATE_SYSTEMIO
;
443 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
444 if (acpi_processor_ffh_cstate_probe
445 (pr
->id
, &cx
, reg
) == 0) {
446 cx
.entry_method
= ACPI_CSTATE_FFH
;
447 } else if (cx
.type
== ACPI_STATE_C1
) {
449 * C1 is a special case where FIXED_HARDWARE
450 * can be handled in non-MWAIT way as well.
451 * In that case, save this _CST entry info.
452 * Otherwise, ignore this info and continue.
454 cx
.entry_method
= ACPI_CSTATE_HALT
;
455 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
459 if (cx
.type
== ACPI_STATE_C1
&&
460 (idle_halt
|| idle_nomwait
)) {
462 * In most cases the C1 space_id obtained from
463 * _CST object is FIXED_HARDWARE access mode.
464 * But when the option of idle=halt is added,
465 * the entry_method type should be changed from
466 * CSTATE_FFH to CSTATE_HALT.
467 * When the option of idle=nomwait is added,
468 * the C1 entry_method type should be
471 cx
.entry_method
= ACPI_CSTATE_HALT
;
472 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
475 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI IOPORT 0x%x",
479 if (cx
.type
== ACPI_STATE_C1
) {
483 obj
= &(element
->package
.elements
[2]);
484 if (obj
->type
!= ACPI_TYPE_INTEGER
)
487 cx
.latency
= obj
->integer
.value
;
489 obj
= &(element
->package
.elements
[3]);
490 if (obj
->type
!= ACPI_TYPE_INTEGER
)
493 cx
.power
= obj
->integer
.value
;
496 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
499 * We support total ACPI_PROCESSOR_MAX_POWER - 1
500 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
502 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
504 "Limiting number of power states to max (%d)\n",
505 ACPI_PROCESSOR_MAX_POWER
);
507 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
512 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
515 /* Validate number of power states discovered */
516 if (current_count
< 2)
520 kfree(buffer
.pointer
);
525 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
532 * C2 latency must be less than or equal to 100
535 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
536 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
537 "latency too large [%d]\n", cx
->latency
));
542 * Otherwise we've met all of our C2 requirements.
543 * Normalize the C2 latency to expidite policy
547 cx
->latency_ticks
= cx
->latency
;
552 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
553 struct acpi_processor_cx
*cx
)
555 static int bm_check_flag
;
562 * C3 latency must be less than or equal to 1000
565 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
566 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
567 "latency too large [%d]\n", cx
->latency
));
572 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
573 * DMA transfers are used by any ISA device to avoid livelock.
574 * Note that we could disable Type-F DMA (as recommended by
575 * the erratum), but this is known to disrupt certain ISA
576 * devices thus we take the conservative approach.
578 else if (errata
.piix4
.fdma
) {
579 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
580 "C3 not supported on PIIX4 with Type-F DMA\n"));
584 /* All the logic here assumes flags.bm_check is same across all CPUs */
585 if (!bm_check_flag
) {
586 /* Determine whether bm_check is needed based on CPU */
587 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
588 bm_check_flag
= pr
->flags
.bm_check
;
590 pr
->flags
.bm_check
= bm_check_flag
;
593 if (pr
->flags
.bm_check
) {
594 if (!pr
->flags
.bm_control
) {
595 if (pr
->flags
.has_cst
!= 1) {
596 /* bus mastering control is necessary */
597 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
598 "C3 support requires BM control\n"));
601 /* Here we enter C3 without bus mastering */
602 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
603 "C3 support without BM control\n"));
608 * WBINVD should be set in fadt, for C3 state to be
609 * supported on when bm_check is not required.
611 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
612 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
613 "Cache invalidation should work properly"
614 " for C3 to be enabled on SMP systems\n"));
620 * Otherwise we've met all of our C3 requirements.
621 * Normalize the C3 latency to expidite policy. Enable
622 * checking of bus mastering status (bm_check) so we can
623 * use this in our C3 policy
627 cx
->latency_ticks
= cx
->latency
;
629 * On older chipsets, BM_RLD needs to be set
630 * in order for Bus Master activity to wake the
631 * system from C3. Newer chipsets handle DMA
632 * during C3 automatically and BM_RLD is a NOP.
633 * In either case, the proper way to
634 * handle BM_RLD is to set it and leave it set.
636 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
641 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
644 unsigned int working
= 0;
646 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
648 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
649 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
654 acpi_timer_check_state(i
, pr
, cx
);
658 acpi_processor_power_verify_c2(cx
);
660 acpi_timer_check_state(i
, pr
, cx
);
664 acpi_processor_power_verify_c3(pr
, cx
);
666 acpi_timer_check_state(i
, pr
, cx
);
674 acpi_propagate_timer_broadcast(pr
);
679 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
685 /* NOTE: the idle thread may not be running while calling
688 /* Zero initialize all the C-states info. */
689 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
691 result
= acpi_processor_get_power_info_cst(pr
);
692 if (result
== -ENODEV
)
693 result
= acpi_processor_get_power_info_fadt(pr
);
698 acpi_processor_get_power_info_default(pr
);
700 pr
->power
.count
= acpi_processor_power_verify(pr
);
703 * if one state of type C2 or C3 is available, mark this
704 * CPU as being "idle manageable"
706 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
707 if (pr
->power
.states
[i
].valid
) {
709 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
717 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
719 struct acpi_processor
*pr
= seq
->private;
726 seq_printf(seq
, "active state: C%zd\n"
728 "bus master activity: %08x\n"
729 "maximum allowed latency: %d usec\n",
730 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
731 max_cstate
, (unsigned)pr
->power
.bm_activity
,
732 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY
));
734 seq_puts(seq
, "states:\n");
736 for (i
= 1; i
<= pr
->power
.count
; i
++) {
737 seq_printf(seq
, " %cC%d: ",
738 (&pr
->power
.states
[i
] ==
739 pr
->power
.state
? '*' : ' '), i
);
741 if (!pr
->power
.states
[i
].valid
) {
742 seq_puts(seq
, "<not supported>\n");
746 switch (pr
->power
.states
[i
].type
) {
748 seq_printf(seq
, "type[C1] ");
751 seq_printf(seq
, "type[C2] ");
754 seq_printf(seq
, "type[C3] ");
757 seq_printf(seq
, "type[--] ");
761 if (pr
->power
.states
[i
].promotion
.state
)
762 seq_printf(seq
, "promotion[C%zd] ",
763 (pr
->power
.states
[i
].promotion
.state
-
766 seq_puts(seq
, "promotion[--] ");
768 if (pr
->power
.states
[i
].demotion
.state
)
769 seq_printf(seq
, "demotion[C%zd] ",
770 (pr
->power
.states
[i
].demotion
.state
-
773 seq_puts(seq
, "demotion[--] ");
775 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
776 pr
->power
.states
[i
].latency
,
777 pr
->power
.states
[i
].usage
,
778 (unsigned long long)pr
->power
.states
[i
].time
);
785 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
787 return single_open(file
, acpi_processor_power_seq_show
,
791 static const struct file_operations acpi_processor_power_fops
= {
792 .owner
= THIS_MODULE
,
793 .open
= acpi_processor_power_open_fs
,
796 .release
= single_release
,
801 * acpi_idle_bm_check - checks if bus master activity was detected
803 static int acpi_idle_bm_check(void)
807 acpi_get_register_unlocked(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
809 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
811 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
812 * the true state of bus mastering activity; forcing us to
813 * manually check the BMIDEA bit of each IDE channel.
815 else if (errata
.piix4
.bmisx
) {
816 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
817 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
824 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
827 * Caller disables interrupt before call and enables interrupt after return.
829 static inline void acpi_idle_do_entry(struct acpi_processor_cx
*cx
)
831 /* Don't trace irqs off for idle */
832 stop_critical_timings();
833 if (cx
->entry_method
== ACPI_CSTATE_FFH
) {
834 /* Call into architectural FFH based C-state */
835 acpi_processor_ffh_cstate_enter(cx
);
836 } else if (cx
->entry_method
== ACPI_CSTATE_HALT
) {
840 /* IO port based C-state */
842 /* Dummy wait op - must do something useless after P_LVL2 read
843 because chipsets cannot guarantee that STPCLK# signal
844 gets asserted in time to freeze execution properly. */
845 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
847 start_critical_timings();
851 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
852 * @dev: the target CPU
853 * @state: the state data
855 * This is equivalent to the HALT instruction.
857 static int acpi_idle_enter_c1(struct cpuidle_device
*dev
,
858 struct cpuidle_state
*state
)
861 struct acpi_processor
*pr
;
862 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
864 pr
= __get_cpu_var(processors
);
871 /* Do not access any ACPI IO ports in suspend path */
872 if (acpi_idle_suspend
) {
878 acpi_state_timer_broadcast(pr
, cx
, 1);
879 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
880 acpi_idle_do_entry(cx
);
881 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
885 acpi_state_timer_broadcast(pr
, cx
, 0);
887 return ticks_elapsed_in_us(t1
, t2
);
891 * acpi_idle_enter_simple - enters an ACPI state without BM handling
892 * @dev: the target CPU
893 * @state: the state data
895 static int acpi_idle_enter_simple(struct cpuidle_device
*dev
,
896 struct cpuidle_state
*state
)
898 struct acpi_processor
*pr
;
899 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
903 pr
= __get_cpu_var(processors
);
908 if (acpi_idle_suspend
)
909 return(acpi_idle_enter_c1(dev
, state
));
912 current_thread_info()->status
&= ~TS_POLLING
;
914 * TS_POLLING-cleared state must be visible before we test
919 if (unlikely(need_resched())) {
920 current_thread_info()->status
|= TS_POLLING
;
926 * Must be done before busmaster disable as we might need to
929 acpi_state_timer_broadcast(pr
, cx
, 1);
931 if (cx
->type
== ACPI_STATE_C3
)
932 ACPI_FLUSH_CPU_CACHE();
934 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
935 /* Tell the scheduler that we are going deep-idle: */
936 sched_clock_idle_sleep_event();
937 acpi_idle_do_entry(cx
);
938 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
940 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
941 /* TSC could halt in idle, so notify users */
942 if (tsc_halts_in_c(cx
->type
))
943 mark_tsc_unstable("TSC halts in idle");;
945 sleep_ticks
= ticks_elapsed(t1
, t2
);
947 /* Tell the scheduler how much we idled: */
948 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
951 current_thread_info()->status
|= TS_POLLING
;
955 acpi_state_timer_broadcast(pr
, cx
, 0);
956 cx
->time
+= sleep_ticks
;
957 return ticks_elapsed_in_us(t1
, t2
);
960 static int c3_cpu_count
;
961 static DEFINE_SPINLOCK(c3_lock
);
964 * acpi_idle_enter_bm - enters C3 with proper BM handling
965 * @dev: the target CPU
966 * @state: the state data
968 * If BM is detected, the deepest non-C3 idle state is entered instead.
970 static int acpi_idle_enter_bm(struct cpuidle_device
*dev
,
971 struct cpuidle_state
*state
)
973 struct acpi_processor
*pr
;
974 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
978 pr
= __get_cpu_var(processors
);
983 if (acpi_idle_suspend
)
984 return(acpi_idle_enter_c1(dev
, state
));
986 if (acpi_idle_bm_check()) {
987 if (dev
->safe_state
) {
988 dev
->last_state
= dev
->safe_state
;
989 return dev
->safe_state
->enter(dev
, dev
->safe_state
);
999 current_thread_info()->status
&= ~TS_POLLING
;
1001 * TS_POLLING-cleared state must be visible before we test
1006 if (unlikely(need_resched())) {
1007 current_thread_info()->status
|= TS_POLLING
;
1012 acpi_unlazy_tlb(smp_processor_id());
1014 /* Tell the scheduler that we are going deep-idle: */
1015 sched_clock_idle_sleep_event();
1017 * Must be done before busmaster disable as we might need to
1020 acpi_state_timer_broadcast(pr
, cx
, 1);
1023 * disable bus master
1024 * bm_check implies we need ARB_DIS
1025 * !bm_check implies we need cache flush
1026 * bm_control implies whether we can do ARB_DIS
1028 * That leaves a case where bm_check is set and bm_control is
1029 * not set. In that case we cannot do much, we enter C3
1030 * without doing anything.
1032 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
1033 spin_lock(&c3_lock
);
1035 /* Disable bus master arbitration when all CPUs are in C3 */
1036 if (c3_cpu_count
== num_online_cpus())
1037 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 1);
1038 spin_unlock(&c3_lock
);
1039 } else if (!pr
->flags
.bm_check
) {
1040 ACPI_FLUSH_CPU_CACHE();
1043 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
1044 acpi_idle_do_entry(cx
);
1045 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
1047 /* Re-enable bus master arbitration */
1048 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
1049 spin_lock(&c3_lock
);
1050 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 0);
1052 spin_unlock(&c3_lock
);
1055 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1056 /* TSC could halt in idle, so notify users */
1057 if (tsc_halts_in_c(ACPI_STATE_C3
))
1058 mark_tsc_unstable("TSC halts in idle");
1060 sleep_ticks
= ticks_elapsed(t1
, t2
);
1061 /* Tell the scheduler how much we idled: */
1062 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
1065 current_thread_info()->status
|= TS_POLLING
;
1069 acpi_state_timer_broadcast(pr
, cx
, 0);
1070 cx
->time
+= sleep_ticks
;
1071 return ticks_elapsed_in_us(t1
, t2
);
1074 struct cpuidle_driver acpi_idle_driver
= {
1075 .name
= "acpi_idle",
1076 .owner
= THIS_MODULE
,
1080 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1081 * @pr: the ACPI processor
1083 static int acpi_processor_setup_cpuidle(struct acpi_processor
*pr
)
1085 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
1086 struct acpi_processor_cx
*cx
;
1087 struct cpuidle_state
*state
;
1088 struct cpuidle_device
*dev
= &pr
->power
.dev
;
1090 if (!pr
->flags
.power_setup_done
)
1093 if (pr
->flags
.power
== 0) {
1098 for (i
= 0; i
< CPUIDLE_STATE_MAX
; i
++) {
1099 dev
->states
[i
].name
[0] = '\0';
1100 dev
->states
[i
].desc
[0] = '\0';
1103 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
1104 cx
= &pr
->power
.states
[i
];
1105 state
= &dev
->states
[count
];
1110 #ifdef CONFIG_HOTPLUG_CPU
1111 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
1112 !pr
->flags
.has_cst
&&
1113 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
1116 cpuidle_set_statedata(state
, cx
);
1118 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C%d", i
);
1119 strncpy(state
->desc
, cx
->desc
, CPUIDLE_DESC_LEN
);
1120 state
->exit_latency
= cx
->latency
;
1121 state
->target_residency
= cx
->latency
* latency_factor
;
1122 state
->power_usage
= cx
->power
;
1127 state
->flags
|= CPUIDLE_FLAG_SHALLOW
;
1128 if (cx
->entry_method
== ACPI_CSTATE_FFH
)
1129 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1131 state
->enter
= acpi_idle_enter_c1
;
1132 dev
->safe_state
= state
;
1136 state
->flags
|= CPUIDLE_FLAG_BALANCED
;
1137 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1138 state
->enter
= acpi_idle_enter_simple
;
1139 dev
->safe_state
= state
;
1143 state
->flags
|= CPUIDLE_FLAG_DEEP
;
1144 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1145 state
->flags
|= CPUIDLE_FLAG_CHECK_BM
;
1146 state
->enter
= pr
->flags
.bm_check
?
1147 acpi_idle_enter_bm
:
1148 acpi_idle_enter_simple
;
1153 if (count
== CPUIDLE_STATE_MAX
)
1157 dev
->state_count
= count
;
1165 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1169 if (boot_option_idle_override
)
1179 if (!pr
->flags
.power_setup_done
)
1182 cpuidle_pause_and_lock();
1183 cpuidle_disable_device(&pr
->power
.dev
);
1184 acpi_processor_get_power_info(pr
);
1185 if (pr
->flags
.power
) {
1186 acpi_processor_setup_cpuidle(pr
);
1187 ret
= cpuidle_enable_device(&pr
->power
.dev
);
1189 cpuidle_resume_and_unlock();
1194 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1195 struct acpi_device
*device
)
1197 acpi_status status
= 0;
1198 static int first_run
;
1199 struct proc_dir_entry
*entry
= NULL
;
1202 if (boot_option_idle_override
)
1208 * When the boot option of "idle=halt" is added, halt
1209 * is used for CPU IDLE.
1210 * In such case C2/C3 is meaningless. So the max_cstate
1215 dmi_check_system(processor_power_dmi_table
);
1216 max_cstate
= acpi_processor_cstate_check(max_cstate
);
1217 if (max_cstate
< ACPI_C_STATES_MAX
)
1219 "ACPI: processor limited to max C-state %d\n",
1227 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1229 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1230 if (ACPI_FAILURE(status
)) {
1231 ACPI_EXCEPTION((AE_INFO
, status
,
1232 "Notifying BIOS of _CST ability failed"));
1236 acpi_processor_get_power_info(pr
);
1237 pr
->flags
.power_setup_done
= 1;
1240 * Install the idle handler if processor power management is supported.
1241 * Note that we use previously set idle handler will be used on
1242 * platforms that only support C1.
1244 if (pr
->flags
.power
) {
1245 acpi_processor_setup_cpuidle(pr
);
1246 if (cpuidle_register_device(&pr
->power
.dev
))
1249 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1250 for (i
= 1; i
<= pr
->power
.count
; i
++)
1251 if (pr
->power
.states
[i
].valid
)
1252 printk(" C%d[C%d]", i
,
1253 pr
->power
.states
[i
].type
);
1258 entry
= proc_create_data(ACPI_PROCESSOR_FILE_POWER
,
1259 S_IRUGO
, acpi_device_dir(device
),
1260 &acpi_processor_power_fops
,
1261 acpi_driver_data(device
));
1267 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1268 struct acpi_device
*device
)
1270 if (boot_option_idle_override
)
1273 cpuidle_unregister_device(&pr
->power
.dev
);
1274 pr
->flags
.power_setup_done
= 0;
1276 if (acpi_device_dir(device
))
1277 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1278 acpi_device_dir(device
));