2 * Copyright 1995, Russell King.
3 * Various bits and pieces copyrights include:
4 * Linus Torvalds (test_bit).
5 * Big endian support: Copyright 2001, Nicolas Pitre
8 * bit 0 is the LSB of an "unsigned long" quantity.
10 * Please note that the code in this file should never be included
11 * from user space. Many of these are not implemented in assembler
12 * since they would be too costly. Also, they require privileged
13 * instructions (which are not available from user mode) to ensure
14 * that they are atomic.
17 #ifndef __ASM_ARM_BITOPS_H
18 #define __ASM_ARM_BITOPS_H
22 #include <asm/system.h>
24 #define smp_mb__before_clear_bit() do { } while (0)
25 #define smp_mb__after_clear_bit() do { } while (0)
28 * These functions are the basis of our bit ops.
30 * First, the atomic bitops. These use native endian.
32 static inline void ____atomic_set_bit(unsigned int bit
, unsigned long *p
)
35 unsigned long mask
= 1UL << (bit
& 31);
39 local_irq_save(flags
);
41 local_irq_restore(flags
);
44 static inline void ____atomic_clear_bit(unsigned int bit
, unsigned long *p
)
47 unsigned long mask
= 1UL << (bit
& 31);
51 local_irq_save(flags
);
53 local_irq_restore(flags
);
56 static inline void ____atomic_change_bit(unsigned int bit
, unsigned long *p
)
59 unsigned long mask
= 1UL << (bit
& 31);
63 local_irq_save(flags
);
65 local_irq_restore(flags
);
69 ____atomic_test_and_set_bit(unsigned int bit
, unsigned long *p
)
73 unsigned long mask
= 1UL << (bit
& 31);
77 local_irq_save(flags
);
80 local_irq_restore(flags
);
86 ____atomic_test_and_clear_bit(unsigned int bit
, unsigned long *p
)
90 unsigned long mask
= 1UL << (bit
& 31);
94 local_irq_save(flags
);
97 local_irq_restore(flags
);
103 ____atomic_test_and_change_bit(unsigned int bit
, unsigned long *p
)
107 unsigned long mask
= 1UL << (bit
& 31);
111 local_irq_save(flags
);
114 local_irq_restore(flags
);
120 * Now the non-atomic variants. We let the compiler handle all
121 * optimisations for these. These are all _native_ endian.
123 static inline void __set_bit(int nr
, volatile unsigned long *p
)
125 p
[nr
>> 5] |= (1UL << (nr
& 31));
128 static inline void __clear_bit(int nr
, volatile unsigned long *p
)
130 p
[nr
>> 5] &= ~(1UL << (nr
& 31));
133 static inline void __change_bit(int nr
, volatile unsigned long *p
)
135 p
[nr
>> 5] ^= (1UL << (nr
& 31));
138 static inline int __test_and_set_bit(int nr
, volatile unsigned long *p
)
140 unsigned long oldval
, mask
= 1UL << (nr
& 31);
146 return oldval
& mask
;
149 static inline int __test_and_clear_bit(int nr
, volatile unsigned long *p
)
151 unsigned long oldval
, mask
= 1UL << (nr
& 31);
157 return oldval
& mask
;
160 static inline int __test_and_change_bit(int nr
, volatile unsigned long *p
)
162 unsigned long oldval
, mask
= 1UL << (nr
& 31);
168 return oldval
& mask
;
172 * This routine doesn't need to be atomic.
174 static inline int __test_bit(int nr
, const unsigned long * p
)
176 return (p
[nr
>> 5] >> (nr
& 31)) & 1UL;
180 * A note about Endian-ness.
181 * -------------------------
183 * When the ARM is put into big endian mode via CR15, the processor
184 * merely swaps the order of bytes within words, thus:
186 * ------------ physical data bus bits -----------
187 * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
188 * little byte 3 byte 2 byte 1 byte 0
189 * big byte 0 byte 1 byte 2 byte 3
191 * This means that reading a 32-bit word at address 0 returns the same
192 * value irrespective of the endian mode bit.
194 * Peripheral devices should be connected with the data bus reversed in
195 * "Big Endian" mode. ARM Application Note 61 is applicable, and is
196 * available from http://www.arm.com/.
198 * The following assumes that the data bus connectivity for big endian
199 * mode has been followed.
201 * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
205 * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
207 extern void _set_bit_le(int nr
, unsigned long * p
);
208 extern void _clear_bit_le(int nr
, unsigned long * p
);
209 extern void _change_bit_le(int nr
, unsigned long * p
);
210 extern int _test_and_set_bit_le(int nr
, unsigned long * p
);
211 extern int _test_and_clear_bit_le(int nr
, unsigned long * p
);
212 extern int _test_and_change_bit_le(int nr
, unsigned long * p
);
213 extern int _find_first_zero_bit_le(void * p
, unsigned size
);
214 extern int _find_next_zero_bit_le(void * p
, int size
, int offset
);
217 * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
219 extern void _set_bit_be(int nr
, unsigned long * p
);
220 extern void _clear_bit_be(int nr
, unsigned long * p
);
221 extern void _change_bit_be(int nr
, unsigned long * p
);
222 extern int _test_and_set_bit_be(int nr
, unsigned long * p
);
223 extern int _test_and_clear_bit_be(int nr
, unsigned long * p
);
224 extern int _test_and_change_bit_be(int nr
, unsigned long * p
);
225 extern int _find_first_zero_bit_be(void * p
, unsigned size
);
226 extern int _find_next_zero_bit_be(void * p
, int size
, int offset
);
230 * The __* form of bitops are non-atomic and may be reordered.
232 #define ATOMIC_BITOP_LE(name,nr,p) \
233 (__builtin_constant_p(nr) ? \
234 ____atomic_##name(nr, p) : \
237 #define ATOMIC_BITOP_BE(name,nr,p) \
238 (__builtin_constant_p(nr) ? \
239 ____atomic_##name(nr, p) : \
242 #define NONATOMIC_BITOP(name,nr,p) \
243 (____nonatomic_##name(nr, p))
247 * These are the little endian, atomic definitions.
249 #define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p)
250 #define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p)
251 #define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p)
252 #define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
253 #define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
254 #define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
255 #define test_bit(nr,p) __test_bit(nr,p)
256 #define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
257 #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
259 #define WORD_BITOFF_TO_LE(x) ((x))
264 * These are the big endian, atomic definitions.
266 #define set_bit(nr,p) ATOMIC_BITOP_BE(set_bit,nr,p)
267 #define clear_bit(nr,p) ATOMIC_BITOP_BE(clear_bit,nr,p)
268 #define change_bit(nr,p) ATOMIC_BITOP_BE(change_bit,nr,p)
269 #define test_and_set_bit(nr,p) ATOMIC_BITOP_BE(test_and_set_bit,nr,p)
270 #define test_and_clear_bit(nr,p) ATOMIC_BITOP_BE(test_and_clear_bit,nr,p)
271 #define test_and_change_bit(nr,p) ATOMIC_BITOP_BE(test_and_change_bit,nr,p)
272 #define test_bit(nr,p) __test_bit(nr,p)
273 #define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz)
274 #define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off)
276 #define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18)
280 #if __LINUX_ARM_ARCH__ < 5
283 * ffz = Find First Zero in word. Undefined if no zero exists,
284 * so code should check against ~0UL first..
286 static inline unsigned long ffz(unsigned long word
)
292 if (word
& 0x0000ffff) { k
-= 16; word
<<= 16; }
293 if (word
& 0x00ff0000) { k
-= 8; word
<<= 8; }
294 if (word
& 0x0f000000) { k
-= 4; word
<<= 4; }
295 if (word
& 0x30000000) { k
-= 2; word
<<= 2; }
296 if (word
& 0x40000000) { k
-= 1; }
301 * ffz = Find First Zero in word. Undefined if no zero exists,
302 * so code should check against ~0UL first..
304 static inline unsigned long __ffs(unsigned long word
)
309 if (word
& 0x0000ffff) { k
-= 16; word
<<= 16; }
310 if (word
& 0x00ff0000) { k
-= 8; word
<<= 8; }
311 if (word
& 0x0f000000) { k
-= 4; word
<<= 4; }
312 if (word
& 0x30000000) { k
-= 2; word
<<= 2; }
313 if (word
& 0x40000000) { k
-= 1; }
318 * fls: find last bit set.
321 #define fls(x) generic_fls(x)
324 * ffs: find first bit set. This is defined the same way as
325 * the libc and compiler builtin ffs routines, therefore
326 * differs in spirit from the above ffz (man ffs).
329 #define ffs(x) generic_ffs(x)
334 * On ARMv5 and above those functions can be implemented around
335 * the clz instruction for much better code efficiency.
338 extern __inline__
int generic_fls(int x
);
340 ( __builtin_constant_p(x) ? generic_fls(x) : \
341 ({ int __r; asm("clz%?\t%0, %1" : "=r"(__r) : "r"(x)); 32-__r; }) )
342 #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
343 #define __ffs(x) (ffs(x) - 1)
344 #define ffz(x) __ffs( ~(x) )
349 * Find first bit set in a 168-bit bitmap, where the first
350 * 128 bits are unlikely to be set.
352 static inline int sched_find_first_bit(unsigned long *b
)
357 for (off
= 0; v
= b
[off
], off
< 4; off
++) {
361 return __ffs(v
) + off
* 32;
365 * hweightN: returns the hamming weight (i.e. the number
366 * of bits set) of a N-bit word
369 #define hweight32(x) generic_hweight32(x)
370 #define hweight16(x) generic_hweight16(x)
371 #define hweight8(x) generic_hweight8(x)
374 * Ext2 is defined to use little-endian byte ordering.
375 * These do not need to be atomic.
377 #define ext2_set_bit(nr,p) \
378 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
379 #define ext2_set_bit_atomic(lock,nr,p) \
380 test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
381 #define ext2_clear_bit(nr,p) \
382 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
383 #define ext2_clear_bit_atomic(lock,nr,p) \
384 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
385 #define ext2_test_bit(nr,p) \
386 __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
387 #define ext2_find_first_zero_bit(p,sz) \
388 _find_first_zero_bit_le(p,sz)
389 #define ext2_find_next_zero_bit(p,sz,off) \
390 _find_next_zero_bit_le(p,sz,off)
393 * Minix is defined to use little-endian byte ordering.
394 * These do not need to be atomic.
396 #define minix_set_bit(nr,p) \
397 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
398 #define minix_test_bit(nr,p) \
399 __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
400 #define minix_test_and_set_bit(nr,p) \
401 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
402 #define minix_test_and_clear_bit(nr,p) \
403 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
404 #define minix_find_first_zero_bit(p,sz) \
405 _find_first_zero_bit_le(p,sz)
407 #endif /* __KERNEL__ */
409 #endif /* _ARM_BITOPS_H */