Merge with Linux 2.4.0-test4-pre3.
[linux-2.6/linux-mips.git] / arch / sparc64 / kernel / time.c
blobf229ea9889b868ed38b17fa71ee419dad704d13a
1 /* $Id: time.c,v 1.28 2000/07/11 02:21:12 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/config.h>
13 #include <linux/errno.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/timex.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
24 #include <asm/oplib.h>
25 #include <asm/mostek.h>
26 #include <asm/timer.h>
27 #include <asm/irq.h>
28 #include <asm/io.h>
29 #include <asm/sbus.h>
30 #include <asm/fhc.h>
31 #include <asm/pbm.h>
32 #include <asm/ebus.h>
34 extern rwlock_t xtime_lock;
36 unsigned long mstk48t02_regs = 0UL;
37 static unsigned long mstk48t08_regs = 0UL;
38 static unsigned long mstk48t59_regs = 0UL;
40 static int set_rtc_mmss(unsigned long);
42 /* timer_interrupt() needs to keep up the real-time clock,
43 * as well as call the "do_timer()" routine every clocktick
45 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
46 * interrupts, one at level14 and one with softint bit 0.
48 unsigned long timer_tick_offset;
49 unsigned long timer_tick_compare;
50 unsigned long timer_ticks_per_usec_quotient;
52 static __inline__ void timer_check_rtc(void)
54 /* last time the cmos clock got updated */
55 static long last_rtc_update=0;
57 /* Determine when to update the Mostek clock. */
58 if ((time_status & STA_UNSYNC) == 0 &&
59 xtime.tv_sec > last_rtc_update + 660 &&
60 xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 &&
61 xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) {
62 if (set_rtc_mmss(xtime.tv_sec) == 0)
63 last_rtc_update = xtime.tv_sec;
64 else
65 last_rtc_update = xtime.tv_sec - 600;
66 /* do it again in 60 s */
70 void sparc64_do_profile(unsigned long pc, unsigned long o7)
72 if (prof_buffer && current->pid) {
73 extern int _stext;
74 extern int rwlock_impl_begin, rwlock_impl_end;
75 extern int atomic_impl_begin, atomic_impl_end;
76 extern int __memcpy_begin, __memcpy_end;
77 extern int __bitops_begin, __bitops_end;
79 if ((pc >= (unsigned long) &atomic_impl_begin &&
80 pc < (unsigned long) &atomic_impl_end) ||
81 (pc >= (unsigned long) &rwlock_impl_begin &&
82 pc < (unsigned long) &rwlock_impl_end) ||
83 (pc >= (unsigned long) &__memcpy_begin &&
84 pc < (unsigned long) &__memcpy_end) ||
85 (pc >= (unsigned long) &__bitops_begin &&
86 pc < (unsigned long) &__bitops_end))
87 pc = o7;
89 pc -= (unsigned long) &_stext;
90 pc >>= prof_shift;
92 if(pc >= prof_len)
93 pc = prof_len - 1;
94 atomic_inc((atomic_t *)&prof_buffer[pc]);
98 static void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
100 unsigned long ticks, pstate;
102 write_lock(&xtime_lock);
104 do {
105 #ifndef CONFIG_SMP
106 if ((regs->tstate & TSTATE_PRIV) != 0)
107 sparc64_do_profile(regs->tpc, regs->u_regs[UREG_RETPC]);
108 #endif
109 do_timer(regs);
111 /* Guarentee that the following sequences execute
112 * uninterrupted.
114 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
115 "wrpr %0, %1, %%pstate"
116 : "=r" (pstate)
117 : "i" (PSTATE_IE));
119 /* Workaround for Spitfire Errata (#54 I think??), I discovered
120 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
121 * number 103640.
123 * On Blackbird writes to %tick_cmpr can fail, the
124 * workaround seems to be to execute the wr instruction
125 * at the start of an I-cache line, and perform a dummy
126 * read back from %tick_cmpr right after writing to it. -DaveM
128 * Just to be anal we add a workaround for Spitfire
129 * Errata 50 by preventing pipeline bypasses on the
130 * final read of the %tick register into a compare
131 * instruction. The Errata 50 description states
132 * that %tick is not prone to this bug, but I am not
133 * taking any chances.
135 __asm__ __volatile__("
136 rd %%tick_cmpr, %0
137 ba,pt %%xcc, 1f
138 add %0, %2, %0
139 .align 64
140 1: wr %0, 0, %%tick_cmpr
141 rd %%tick_cmpr, %%g0
142 rd %%tick, %1
143 mov %1, %1"
144 : "=&r" (timer_tick_compare), "=r" (ticks)
145 : "r" (timer_tick_offset));
147 /* Restore PSTATE_IE. */
148 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
149 : /* no outputs */
150 : "r" (pstate));
151 } while (ticks >= timer_tick_compare);
153 timer_check_rtc();
155 write_unlock(&xtime_lock);
158 #ifdef CONFIG_SMP
159 void timer_tick_interrupt(struct pt_regs *regs)
161 write_lock(&xtime_lock);
163 do_timer(regs);
166 * Only keep timer_tick_offset uptodate, but don't set TICK_CMPR.
168 __asm__ __volatile__("
169 rd %%tick_cmpr, %0
170 add %0, %1, %0"
171 : "=&r" (timer_tick_compare)
172 : "r" (timer_tick_offset));
174 timer_check_rtc();
176 write_unlock(&xtime_lock);
178 #endif
180 /* Converts Gregorian date to seconds since 1970-01-01 00:00:00.
181 * Assumes input in normal date format, i.e. 1980-12-31 23:59:59
182 * => year=1980, mon=12, day=31, hour=23, min=59, sec=59.
184 * [For the Julian calendar (which was used in Russia before 1917,
185 * Britain & colonies before 1752, anywhere else before 1582,
186 * and is still in use by some communities) leave out the
187 * -year/100+year/400 terms, and add 10.]
189 * This algorithm was first published by Gauss (I think).
191 * WARNING: this function will overflow on 2106-02-07 06:28:16 on
192 * machines were long is 32-bit! (However, as time_t is signed, we
193 * will already get problems at other places on 2038-01-19 03:14:08)
195 static inline unsigned long mktime(unsigned int year, unsigned int mon,
196 unsigned int day, unsigned int hour,
197 unsigned int min, unsigned int sec)
199 if (0 >= (int) (mon -= 2)) { /* 1..12 -> 11,12,1..10 */
200 mon += 12; /* Puts Feb last since it has leap day */
201 year -= 1;
203 return (((
204 (unsigned long)(year/4 - year/100 + year/400 + 367*mon/12 + day) +
205 year*365 - 719499
206 )*24 + hour /* now have hours */
207 )*60 + min /* now have minutes */
208 )*60 + sec; /* finally seconds */
211 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
212 static void __init kick_start_clock(void)
214 unsigned long regs = mstk48t02_regs;
215 u8 sec, tmp;
216 int i, count;
218 prom_printf("CLOCK: Clock was stopped. Kick start ");
220 /* Turn on the kick start bit to start the oscillator. */
221 tmp = mostek_read(regs + MOSTEK_CREG);
222 tmp |= MSTK_CREG_WRITE;
223 mostek_write(regs + MOSTEK_CREG, tmp);
224 tmp = mostek_read(regs + MOSTEK_SEC);
225 tmp &= ~MSTK_STOP;
226 mostek_write(regs + MOSTEK_SEC, tmp);
227 tmp = mostek_read(regs + MOSTEK_HOUR);
228 tmp |= MSTK_KICK_START;
229 mostek_write(regs + MOSTEK_HOUR, tmp);
230 tmp = mostek_read(regs + MOSTEK_CREG);
231 tmp &= ~MSTK_CREG_WRITE;
232 mostek_write(regs + MOSTEK_CREG, tmp);
234 /* Delay to allow the clock oscillator to start. */
235 sec = MSTK_REG_SEC(regs);
236 for (i = 0; i < 3; i++) {
237 while (sec == MSTK_REG_SEC(regs))
238 for (count = 0; count < 100000; count++)
239 /* nothing */ ;
240 prom_printf(".");
241 sec = MSTK_REG_SEC(regs);
243 prom_printf("\n");
245 /* Turn off kick start and set a "valid" time and date. */
246 tmp = mostek_read(regs + MOSTEK_CREG);
247 tmp |= MSTK_CREG_WRITE;
248 mostek_write(regs + MOSTEK_CREG, tmp);
249 tmp = mostek_read(regs + MOSTEK_HOUR);
250 tmp &= ~MSTK_KICK_START;
251 mostek_write(regs + MOSTEK_HOUR, tmp);
252 MSTK_SET_REG_SEC(regs,0);
253 MSTK_SET_REG_MIN(regs,0);
254 MSTK_SET_REG_HOUR(regs,0);
255 MSTK_SET_REG_DOW(regs,5);
256 MSTK_SET_REG_DOM(regs,1);
257 MSTK_SET_REG_MONTH(regs,8);
258 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
259 tmp = mostek_read(regs + MOSTEK_CREG);
260 tmp &= ~MSTK_CREG_WRITE;
261 mostek_write(regs + MOSTEK_CREG, tmp);
263 /* Ensure the kick start bit is off. If it isn't, turn it off. */
264 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
265 prom_printf("CLOCK: Kick start still on!\n");
266 tmp = mostek_read(regs + MOSTEK_CREG);
267 tmp |= MSTK_CREG_WRITE;
268 mostek_write(regs + MOSTEK_CREG, tmp);
270 tmp = mostek_read(regs + MOSTEK_HOUR);
271 tmp &= ~MSTK_KICK_START;
272 mostek_write(regs + MOSTEK_HOUR, tmp);
274 tmp = mostek_read(regs + MOSTEK_CREG);
275 tmp &= ~MSTK_CREG_WRITE;
276 mostek_write(regs + MOSTEK_CREG, tmp);
279 prom_printf("CLOCK: Kick start procedure successful.\n");
282 /* Return nonzero if the clock chip battery is low. */
283 static int __init has_low_battery(void)
285 unsigned long regs = mstk48t02_regs;
286 u8 data1, data2;
288 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
289 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
290 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
291 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
293 return (data1 == data2); /* Was the write blocked? */
297 /* Probe for the real time clock chip. */
298 static void __init set_system_time(void)
300 unsigned int year, mon, day, hour, min, sec;
301 unsigned long mregs = mstk48t02_regs;
302 u8 tmp;
304 do_get_fast_time = do_gettimeofday;
306 if(!mregs) {
307 prom_printf("Something wrong, clock regs not mapped yet.\n");
308 prom_halt();
311 tmp = mostek_read(mregs + MOSTEK_CREG);
312 tmp |= MSTK_CREG_READ;
313 mostek_write(mregs + MOSTEK_CREG, tmp);
315 sec = MSTK_REG_SEC(mregs);
316 min = MSTK_REG_MIN(mregs);
317 hour = MSTK_REG_HOUR(mregs);
318 day = MSTK_REG_DOM(mregs);
319 mon = MSTK_REG_MONTH(mregs);
320 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
321 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
322 xtime.tv_usec = 0;
324 tmp = mostek_read(mregs + MOSTEK_CREG);
325 tmp &= ~MSTK_CREG_READ;
326 mostek_write(mregs + MOSTEK_CREG, tmp);
329 void __init clock_probe(void)
331 struct linux_prom_registers clk_reg[2];
332 char model[128];
333 int node, busnd = -1, err;
334 unsigned long flags;
335 #ifdef CONFIG_PCI
336 struct linux_ebus *ebus = NULL;
337 #endif
339 __save_and_cli(flags);
341 if(central_bus != NULL) {
342 busnd = central_bus->child->prom_node;
344 #ifdef CONFIG_PCI
345 else if (ebus_chain != NULL) {
346 ebus = ebus_chain;
347 busnd = ebus->prom_node;
349 #endif
350 else if (sbus_root != NULL) {
351 busnd = sbus_root->prom_node;
354 if(busnd == -1) {
355 prom_printf("clock_probe: problem, cannot find bus to search.\n");
356 prom_halt();
359 node = prom_getchild(busnd);
361 while(1) {
362 if (!node)
363 model[0] = 0;
364 else
365 prom_getstring(node, "model", model, sizeof(model));
366 if(strcmp(model, "mk48t02") &&
367 strcmp(model, "mk48t08") &&
368 strcmp(model, "mk48t59")) {
369 if (node)
370 node = prom_getsibling(node);
371 #ifdef CONFIG_PCI
372 while ((node == 0) && ebus != NULL) {
373 ebus = ebus->next;
374 if (ebus != NULL) {
375 busnd = ebus->prom_node;
376 node = prom_getchild(busnd);
379 #endif
380 if(node == 0) {
381 prom_printf("clock_probe: Cannot find timer chip\n");
382 prom_halt();
384 continue;
387 err = prom_getproperty(node, "reg", (char *)clk_reg,
388 sizeof(clk_reg));
389 if(err == -1) {
390 prom_printf("clock_probe: Cannot get Mostek reg property\n");
391 prom_halt();
394 if(central_bus) {
395 apply_fhc_ranges(central_bus->child, clk_reg, 1);
396 apply_central_ranges(central_bus, clk_reg, 1);
398 #ifdef CONFIG_PCI
399 else if (ebus_chain != NULL) {
400 struct linux_ebus_device *edev;
402 for_each_ebusdev(edev, ebus)
403 if (edev->prom_node == node)
404 break;
405 if (edev == NULL) {
406 prom_printf("%s: Mostek not probed by EBUS\n",
407 __FUNCTION__);
408 prom_halt();
411 mstk48t59_regs = edev->resource[0].start;
412 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
413 break;
415 #endif
416 else {
417 if (sbus_root->num_sbus_ranges) {
418 int nranges = sbus_root->num_sbus_ranges;
419 int rngc;
421 for (rngc = 0; rngc < nranges; rngc++)
422 if (clk_reg[0].which_io ==
423 sbus_root->sbus_ranges[rngc].ot_child_space)
424 break;
425 if (rngc == nranges) {
426 prom_printf("clock_probe: Cannot find ranges for "
427 "clock regs.\n");
428 prom_halt();
430 clk_reg[0].which_io =
431 sbus_root->sbus_ranges[rngc].ot_parent_space;
432 clk_reg[0].phys_addr +=
433 sbus_root->sbus_ranges[rngc].ot_parent_base;
437 if(model[5] == '0' && model[6] == '2') {
438 mstk48t02_regs = (((u64)clk_reg[0].phys_addr) |
439 (((u64)clk_reg[0].which_io)<<32UL));
440 } else if(model[5] == '0' && model[6] == '8') {
441 mstk48t08_regs = (((u64)clk_reg[0].phys_addr) |
442 (((u64)clk_reg[0].which_io)<<32UL));
443 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
444 } else {
445 mstk48t59_regs = (((u64)clk_reg[0].phys_addr) |
446 (((u64)clk_reg[0].which_io)<<32UL));
447 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
449 break;
452 /* Report a low battery voltage condition. */
453 if (has_low_battery())
454 prom_printf("NVRAM: Low battery voltage!\n");
456 /* Kick start the clock if it is completely stopped. */
457 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
458 kick_start_clock();
460 set_system_time();
462 __restore_flags(flags);
465 #ifndef BCD_TO_BIN
466 #define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10)
467 #endif
469 #ifndef BIN_TO_BCD
470 #define BIN_TO_BCD(val) ((((val)/10)<<4) + (val)%10)
471 #endif
473 extern void init_timers(void (*func)(int, void *, struct pt_regs *),
474 unsigned long *);
476 void __init time_init(void)
478 /* clock_probe() is now done at end of [se]bus_init on sparc64
479 * so that sbus, fhc and ebus bus information is probed and
480 * available.
482 unsigned long clock;
484 init_timers(timer_interrupt, &clock);
485 timer_tick_offset = clock / HZ;
486 timer_ticks_per_usec_quotient = ((1UL<<32) / (clock / 1000020));
489 static __inline__ unsigned long do_gettimeoffset(void)
491 unsigned long ticks;
493 __asm__ __volatile__("
494 rd %%tick, %%g1
495 add %1, %%g1, %0
496 sub %0, %2, %0
498 : "=r" (ticks)
499 : "r" (timer_tick_offset), "r" (timer_tick_compare)
500 : "g1", "g2");
502 return (ticks * timer_ticks_per_usec_quotient) >> 32UL;
505 void do_settimeofday(struct timeval *tv)
507 write_lock_irq(&xtime_lock);
509 tv->tv_usec -= do_gettimeoffset();
510 if(tv->tv_usec < 0) {
511 tv->tv_usec += 1000000;
512 tv->tv_sec--;
515 xtime = *tv;
516 time_adjust = 0; /* stop active adjtime() */
517 time_status |= STA_UNSYNC;
518 time_maxerror = NTP_PHASE_LIMIT;
519 time_esterror = NTP_PHASE_LIMIT;
521 write_unlock_irq(&xtime_lock);
524 static int set_rtc_mmss(unsigned long nowtime)
526 int real_seconds, real_minutes, mostek_minutes;
527 unsigned long regs = mstk48t02_regs;
528 u8 tmp;
530 /* Not having a register set can lead to trouble. */
531 if (!regs)
532 return -1;
534 /* Read the current RTC minutes. */
535 tmp = mostek_read(regs + MOSTEK_CREG);
536 tmp |= MSTK_CREG_READ;
537 mostek_write(regs + MOSTEK_CREG, tmp);
539 mostek_minutes = MSTK_REG_MIN(regs);
541 tmp = mostek_read(regs + MOSTEK_CREG);
542 tmp &= ~MSTK_CREG_READ;
543 mostek_write(regs + MOSTEK_CREG, tmp);
546 * since we're only adjusting minutes and seconds,
547 * don't interfere with hour overflow. This avoids
548 * messing with unknown time zones but requires your
549 * RTC not to be off by more than 15 minutes
551 real_seconds = nowtime % 60;
552 real_minutes = nowtime / 60;
553 if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
554 real_minutes += 30; /* correct for half hour time zone */
555 real_minutes %= 60;
557 if (abs(real_minutes - mostek_minutes) < 30) {
558 tmp = mostek_read(regs + MOSTEK_CREG);
559 tmp |= MSTK_CREG_WRITE;
560 mostek_write(regs + MOSTEK_CREG, tmp);
562 MSTK_SET_REG_SEC(regs,real_seconds);
563 MSTK_SET_REG_MIN(regs,real_minutes);
565 tmp = mostek_read(regs + MOSTEK_CREG);
566 tmp &= ~MSTK_CREG_WRITE;
567 mostek_write(regs + MOSTEK_CREG, tmp);
568 } else
569 return -1;
571 return 0;