Merge with Linu 2.4.0-test6-pre6.
[linux-2.6/linux-mips.git] / drivers / isdn / hisax / hfc_2bs0.c
blobf28585a84360df38cb926cbf9b8ff5109e3669cf
1 /* $Id: hfc_2bs0.c,v 1.14 2000/06/26 08:59:13 keil Exp $
3 * specific routines for CCD's HFC 2BS0
5 * Author Karsten Keil (keil@isdn4linux.de)
7 * This file is (c) under GNU PUBLIC LICENSE
9 */
11 #define __NO_VERSION__
12 #include "hisax.h"
13 #include "hfc_2bs0.h"
14 #include "isac.h"
15 #include "isdnl1.h"
16 #include <linux/interrupt.h>
18 static inline int
19 WaitForBusy(struct IsdnCardState *cs)
21 int to = 130;
22 long flags;
23 u_char val;
25 save_flags(flags);
26 cli();
27 while (!(cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
28 val = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2 |
29 (cs->hw.hfc.cip & 3));
30 udelay(1);
31 to--;
33 restore_flags(flags);
34 if (!to) {
35 printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
36 return (0);
37 } else
38 return (to);
41 static inline int
42 WaitNoBusy(struct IsdnCardState *cs)
44 int to = 125;
46 while ((cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
47 udelay(1);
48 to--;
50 if (!to) {
51 printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
52 return (0);
53 } else
54 return (to);
57 int
58 GetFreeFifoBytes(struct BCState *bcs)
60 int s;
62 if (bcs->hw.hfc.f1 == bcs->hw.hfc.f2)
63 return (bcs->cs->hw.hfc.fifosize);
64 s = bcs->hw.hfc.send[bcs->hw.hfc.f1] - bcs->hw.hfc.send[bcs->hw.hfc.f2];
65 if (s <= 0)
66 s += bcs->cs->hw.hfc.fifosize;
67 s = bcs->cs->hw.hfc.fifosize - s;
68 return (s);
71 int
72 ReadZReg(struct BCState *bcs, u_char reg)
74 int val;
76 WaitNoBusy(bcs->cs);
77 val = 256 * bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_HIGH);
78 WaitNoBusy(bcs->cs);
79 val += bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_LOW);
80 return (val);
83 void
84 hfc_sched_event(struct BCState *bcs, int event)
86 bcs->event |= 1 << event;
87 queue_task(&bcs->tqueue, &tq_immediate);
88 mark_bh(IMMEDIATE_BH);
91 static void
92 hfc_clear_fifo(struct BCState *bcs)
94 struct IsdnCardState *cs = bcs->cs;
95 long flags;
96 int idx, cnt;
97 int rcnt, z1, z2;
98 u_char cip, f1, f2;
100 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
101 debugl1(cs, "hfc_clear_fifo");
102 save_flags(flags);
103 cli();
104 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
105 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
106 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
107 WaitForBusy(cs);
109 WaitNoBusy(cs);
110 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
111 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
112 WaitNoBusy(cs);
113 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
114 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
115 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
116 cnt = 32;
117 while (((f1 != f2) || (z1 != z2)) && cnt--) {
118 if (cs->debug & L1_DEB_HSCX)
119 debugl1(cs, "hfc clear %d f1(%d) f2(%d)",
120 bcs->channel, f1, f2);
121 rcnt = z1 - z2;
122 if (rcnt < 0)
123 rcnt += cs->hw.hfc.fifosize;
124 if (rcnt)
125 rcnt++;
126 if (cs->debug & L1_DEB_HSCX)
127 debugl1(cs, "hfc clear %d z1(%x) z2(%x) cnt(%d)",
128 bcs->channel, z1, z2, rcnt);
129 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
130 idx = 0;
131 while ((idx < rcnt) && WaitNoBusy(cs)) {
132 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
133 idx++;
135 if (f1 != f2) {
136 WaitNoBusy(cs);
137 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
138 HFC_CHANNEL(bcs->channel));
139 WaitForBusy(cs);
141 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
142 WaitNoBusy(cs);
143 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
144 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
145 WaitNoBusy(cs);
146 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
147 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
148 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
150 restore_flags(flags);
151 return;
155 static struct sk_buff
157 hfc_empty_fifo(struct BCState *bcs, int count)
159 u_char *ptr;
160 struct sk_buff *skb;
161 struct IsdnCardState *cs = bcs->cs;
162 int idx;
163 int chksum;
164 u_char stat, cip;
166 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
167 debugl1(cs, "hfc_empty_fifo");
168 idx = 0;
169 if (count > HSCX_BUFMAX + 3) {
170 if (cs->debug & L1_DEB_WARN)
171 debugl1(cs, "hfc_empty_fifo: incoming packet too large");
172 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
173 while ((idx++ < count) && WaitNoBusy(cs))
174 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
175 WaitNoBusy(cs);
176 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
177 HFC_CHANNEL(bcs->channel));
178 WaitForBusy(cs);
179 return (NULL);
181 if ((count < 4) && (bcs->mode != L1_MODE_TRANS)) {
182 if (cs->debug & L1_DEB_WARN)
183 debugl1(cs, "hfc_empty_fifo: incoming packet too small");
184 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
185 while ((idx++ < count) && WaitNoBusy(cs))
186 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
187 WaitNoBusy(cs);
188 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
189 HFC_CHANNEL(bcs->channel));
190 WaitForBusy(cs);
191 #ifdef ERROR_STATISTIC
192 bcs->err_inv++;
193 #endif
194 return (NULL);
196 if (bcs->mode == L1_MODE_TRANS)
197 count -= 1;
198 else
199 count -= 3;
200 if (!(skb = dev_alloc_skb(count)))
201 printk(KERN_WARNING "HFC: receive out of memory\n");
202 else {
203 ptr = skb_put(skb, count);
204 idx = 0;
205 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
206 while ((idx < count - 3) && WaitNoBusy(cs)) {
207 *ptr++ = cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
208 idx++;
210 if (idx != count) {
211 debugl1(cs, "RFIFO BUSY error");
212 printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel);
213 dev_kfree_skb_any(skb);
214 if (bcs->mode != L1_MODE_TRANS) {
215 WaitNoBusy(cs);
216 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
217 HFC_CHANNEL(bcs->channel));
218 WaitForBusy(cs);
220 return (NULL);
222 if (bcs->mode != L1_MODE_TRANS) {
223 WaitNoBusy(cs);
224 chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8);
225 WaitNoBusy(cs);
226 chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip);
227 WaitNoBusy(cs);
228 stat = cs->BC_Read_Reg(cs, HFC_DATA, cip);
229 if (cs->debug & L1_DEB_HSCX)
230 debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
231 bcs->channel, chksum, stat);
232 if (stat) {
233 debugl1(cs, "FIFO CRC error");
234 dev_kfree_skb_any(skb);
235 skb = NULL;
236 #ifdef ERROR_STATISTIC
237 bcs->err_crc++;
238 #endif
240 WaitNoBusy(cs);
241 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
242 HFC_CHANNEL(bcs->channel));
243 WaitForBusy(cs);
246 return (skb);
249 static void
250 hfc_fill_fifo(struct BCState *bcs)
252 struct IsdnCardState *cs = bcs->cs;
253 long flags;
254 int idx, fcnt;
255 int count;
256 int z1, z2;
257 u_char cip;
259 if (!bcs->tx_skb)
260 return;
261 if (bcs->tx_skb->len <= 0)
262 return;
264 save_flags(flags);
265 cli();
266 cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel);
267 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
268 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
269 WaitForBusy(cs);
271 WaitNoBusy(cs);
272 if (bcs->mode != L1_MODE_TRANS) {
273 bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
274 cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel);
275 WaitNoBusy(cs);
276 bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
277 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel));
278 if (cs->debug & L1_DEB_HSCX)
279 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
280 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
281 bcs->hw.hfc.send[bcs->hw.hfc.f1]);
282 fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2;
283 if (fcnt < 0)
284 fcnt += 32;
285 if (fcnt > 30) {
286 if (cs->debug & L1_DEB_HSCX)
287 debugl1(cs, "hfc_fill_fifo more as 30 frames");
288 restore_flags(flags);
289 return;
291 count = GetFreeFifoBytes(bcs);
293 else {
294 WaitForBusy(cs);
295 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
296 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
297 count = z1 - z2;
298 if (count < 0)
299 count += cs->hw.hfc.fifosize;
300 } /* L1_MODE_TRANS */
301 if (cs->debug & L1_DEB_HSCX)
302 debugl1(cs, "hfc_fill_fifo %d count(%ld/%d)",
303 bcs->channel, bcs->tx_skb->len,
304 count);
305 if (count < bcs->tx_skb->len) {
306 if (cs->debug & L1_DEB_HSCX)
307 debugl1(cs, "hfc_fill_fifo no fifo mem");
308 restore_flags(flags);
309 return;
311 cip = HFC_CIP | HFC_FIFO_IN | HFC_SEND | HFC_CHANNEL(bcs->channel);
312 idx = 0;
313 while ((idx < bcs->tx_skb->len) && WaitNoBusy(cs))
314 cs->BC_Write_Reg(cs, HFC_DATA_NODEB, cip, bcs->tx_skb->data[idx++]);
315 if (idx != bcs->tx_skb->len) {
316 debugl1(cs, "FIFO Send BUSY error");
317 printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel);
318 } else {
319 count = bcs->tx_skb->len;
320 bcs->tx_cnt -= count;
321 if (PACKET_NOACK == bcs->tx_skb->pkt_type)
322 count = -1;
323 dev_kfree_skb_any(bcs->tx_skb);
324 bcs->tx_skb = NULL;
325 if (bcs->mode != L1_MODE_TRANS) {
326 WaitForBusy(cs);
327 WaitNoBusy(cs);
328 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel));
330 if (bcs->st->lli.l1writewakeup && (count >= 0))
331 bcs->st->lli.l1writewakeup(bcs->st, count);
332 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
334 restore_flags(flags);
335 return;
338 void
339 main_irq_hfc(struct BCState *bcs)
341 long flags;
342 struct IsdnCardState *cs = bcs->cs;
343 int z1, z2, rcnt;
344 u_char f1, f2, cip;
345 int receive, transmit, count = 5;
346 struct sk_buff *skb;
348 save_flags(flags);
349 Begin:
350 cli();
351 count--;
352 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
353 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
354 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
355 WaitForBusy(cs);
357 WaitNoBusy(cs);
358 receive = 0;
359 if (bcs->mode == L1_MODE_HDLC) {
360 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
361 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
362 WaitNoBusy(cs);
363 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
364 if (f1 != f2) {
365 if (cs->debug & L1_DEB_HSCX)
366 debugl1(cs, "hfc rec %d f1(%d) f2(%d)",
367 bcs->channel, f1, f2);
368 receive = 1;
371 if (receive || (bcs->mode == L1_MODE_TRANS)) {
372 WaitForBusy(cs);
373 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
374 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
375 rcnt = z1 - z2;
376 if (rcnt < 0)
377 rcnt += cs->hw.hfc.fifosize;
378 if ((bcs->mode == L1_MODE_HDLC) || (rcnt)) {
379 rcnt++;
380 if (cs->debug & L1_DEB_HSCX)
381 debugl1(cs, "hfc rec %d z1(%x) z2(%x) cnt(%d)",
382 bcs->channel, z1, z2, rcnt);
383 /* sti(); */
384 if ((skb = hfc_empty_fifo(bcs, rcnt))) {
385 skb_queue_tail(&bcs->rqueue, skb);
386 hfc_sched_event(bcs, B_RCVBUFREADY);
389 receive = 1;
391 restore_flags(flags);
392 udelay(1);
393 cli();
394 if (bcs->tx_skb) {
395 transmit = 1;
396 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
397 hfc_fill_fifo(bcs);
398 if (test_bit(BC_FLG_BUSY, &bcs->Flag))
399 transmit = 0;
400 } else {
401 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
402 transmit = 1;
403 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
404 hfc_fill_fifo(bcs);
405 if (test_bit(BC_FLG_BUSY, &bcs->Flag))
406 transmit = 0;
407 } else {
408 transmit = 0;
409 hfc_sched_event(bcs, B_XMTBUFREADY);
412 restore_flags(flags);
413 if ((receive || transmit) && count)
414 goto Begin;
415 return;
418 void
419 mode_hfc(struct BCState *bcs, int mode, int bc)
421 struct IsdnCardState *cs = bcs->cs;
423 if (cs->debug & L1_DEB_HSCX)
424 debugl1(cs, "HFC 2BS0 mode %d bchan %d/%d",
425 mode, bc, bcs->channel);
426 bcs->mode = mode;
427 bcs->channel = bc;
429 switch (mode) {
430 case (L1_MODE_NULL):
431 if (bc) {
432 cs->hw.hfc.ctmt &= ~1;
433 cs->hw.hfc.isac_spcr &= ~0x03;
435 else {
436 cs->hw.hfc.ctmt &= ~2;
437 cs->hw.hfc.isac_spcr &= ~0x0c;
439 break;
440 case (L1_MODE_TRANS):
441 cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */
442 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
443 hfc_clear_fifo(bcs); /* complete fifo clear */
444 if (bc) {
445 cs->hw.hfc.ctmt |= 1;
446 cs->hw.hfc.isac_spcr &= ~0x03;
447 cs->hw.hfc.isac_spcr |= 0x02;
448 } else {
449 cs->hw.hfc.ctmt |= 2;
450 cs->hw.hfc.isac_spcr &= ~0x0c;
451 cs->hw.hfc.isac_spcr |= 0x08;
453 break;
454 case (L1_MODE_HDLC):
455 if (bc) {
456 cs->hw.hfc.ctmt &= ~1;
457 cs->hw.hfc.isac_spcr &= ~0x03;
458 cs->hw.hfc.isac_spcr |= 0x02;
459 } else {
460 cs->hw.hfc.ctmt &= ~2;
461 cs->hw.hfc.isac_spcr &= ~0x0c;
462 cs->hw.hfc.isac_spcr |= 0x08;
464 break;
466 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
467 cs->writeisac(cs, ISAC_SPCR, cs->hw.hfc.isac_spcr);
468 if (mode == L1_MODE_HDLC)
469 hfc_clear_fifo(bcs);
472 static void
473 hfc_l2l1(struct PStack *st, int pr, void *arg)
475 struct sk_buff *skb = arg;
476 long flags;
478 switch (pr) {
479 case (PH_DATA | REQUEST):
480 save_flags(flags);
481 cli();
482 if (st->l1.bcs->tx_skb) {
483 skb_queue_tail(&st->l1.bcs->squeue, skb);
484 restore_flags(flags);
485 } else {
486 st->l1.bcs->tx_skb = skb;
487 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
488 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
489 restore_flags(flags);
491 break;
492 case (PH_PULL | INDICATION):
493 if (st->l1.bcs->tx_skb) {
494 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
495 break;
497 save_flags(flags);
498 cli();
499 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
500 st->l1.bcs->tx_skb = skb;
501 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
502 restore_flags(flags);
503 break;
504 case (PH_PULL | REQUEST):
505 if (!st->l1.bcs->tx_skb) {
506 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
507 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
508 } else
509 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
510 break;
511 case (PH_ACTIVATE | REQUEST):
512 test_and_set_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
513 mode_hfc(st->l1.bcs, st->l1.mode, st->l1.bc);
514 l1_msg_b(st, pr, arg);
515 break;
516 case (PH_DEACTIVATE | REQUEST):
517 l1_msg_b(st, pr, arg);
518 break;
519 case (PH_DEACTIVATE | CONFIRM):
520 test_and_clear_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
521 test_and_clear_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
522 mode_hfc(st->l1.bcs, 0, st->l1.bc);
523 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
524 break;
529 void
530 close_hfcstate(struct BCState *bcs)
532 mode_hfc(bcs, 0, bcs->channel);
533 if (test_bit(BC_FLG_INIT, &bcs->Flag)) {
534 discard_queue(&bcs->rqueue);
535 discard_queue(&bcs->squeue);
536 if (bcs->tx_skb) {
537 dev_kfree_skb_any(bcs->tx_skb);
538 bcs->tx_skb = NULL;
539 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
542 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
545 static int
546 open_hfcstate(struct IsdnCardState *cs, struct BCState *bcs)
548 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
549 skb_queue_head_init(&bcs->rqueue);
550 skb_queue_head_init(&bcs->squeue);
552 bcs->tx_skb = NULL;
553 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
554 bcs->event = 0;
555 bcs->tx_cnt = 0;
556 return (0);
560 setstack_hfc(struct PStack *st, struct BCState *bcs)
562 bcs->channel = st->l1.bc;
563 if (open_hfcstate(st->l1.hardware, bcs))
564 return (-1);
565 st->l1.bcs = bcs;
566 st->l2.l2l1 = hfc_l2l1;
567 setstack_manager(st);
568 bcs->st = st;
569 setstack_l1_B(st);
570 return (0);
573 __initfunc(void
574 init_send(struct BCState *bcs))
576 int i;
578 if (!(bcs->hw.hfc.send = kmalloc(32 * sizeof(unsigned int), GFP_ATOMIC))) {
579 printk(KERN_WARNING
580 "HiSax: No memory for hfc.send\n");
581 return;
583 for (i = 0; i < 32; i++)
584 bcs->hw.hfc.send[i] = 0x1fff;
587 __initfunc(void
588 inithfc(struct IsdnCardState *cs))
590 init_send(&cs->bcs[0]);
591 init_send(&cs->bcs[1]);
592 cs->BC_Send_Data = &hfc_fill_fifo;
593 cs->bcs[0].BC_SetStack = setstack_hfc;
594 cs->bcs[1].BC_SetStack = setstack_hfc;
595 cs->bcs[0].BC_Close = close_hfcstate;
596 cs->bcs[1].BC_Close = close_hfcstate;
597 mode_hfc(cs->bcs, 0, 0);
598 mode_hfc(cs->bcs + 1, 0, 0);
601 void
602 releasehfc(struct IsdnCardState *cs)
604 if (cs->bcs[0].hw.hfc.send) {
605 kfree(cs->bcs[0].hw.hfc.send);
606 cs->bcs[0].hw.hfc.send = NULL;
608 if (cs->bcs[1].hw.hfc.send) {
609 kfree(cs->bcs[1].hw.hfc.send);
610 cs->bcs[1].hw.hfc.send = NULL;