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Merge with Linux 2.5.74.
[linux-2.6/linux-mips.git] / drivers / serial / sunsu.c
blob57fc1906a4c1f799a3aeaf4b376091c7666584e6
1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
34 #ifdef CONFIG_SERIO
35 #include <linux/serio.h>
36 #endif
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/oplib.h>
44 #include <asm/ebus.h>
45 #ifdef CONFIG_SPARC64
46 #include <asm/isa.h>
47 #endif
48
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50 #define SUPPORT_SYSRQ
51 #endif
52
53 #include <linux/serial_core.h>
54
55 #include "suncore.h"
56
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
59 */
60 #define SU_BASE_BAUD (1846200 / 16)
61
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
64
65 /*
66 * Here we define the default xmit fifo size used for each type of UART.
67 */
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
69 { "unknown", 1, 0 },
70 { "8250", 1, 0 },
71 { "16450", 1, 0 },
72 { "16550", 1, 0 },
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
74 { "Cirrus", 1, 0 },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
78 { "Startech", 1, 0 },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
83 };
84
85 struct uart_sunsu_port {
86 struct uart_port port;
87 unsigned char acr;
88 unsigned char ier;
89 unsigned char rev;
90 unsigned char lcr;
91 unsigned int lsr_break_flag;
92 unsigned int cflag;
93
94 /* Probing information. */
95 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */
97 int port_node;
98 unsigned int irq;
99
100 /* L1-A keyboard break state. */
101 int kbd_id;
102 int l1_down;
103 #ifdef CONFIG_SERIO
104 struct serio serio;
105 #endif
106 };
107
108 #define _INLINE_
109
110 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
111 {
112 offset <<= up->port.regshift;
113
114 switch (up->port.iotype) {
115 case SERIAL_IO_HUB6:
116 outb(up->port.hub6 - 1 + offset, up->port.iobase);
117 return inb(up->port.iobase + 1);
118
119 case SERIAL_IO_MEM:
120 return readb(up->port.membase + offset);
121
122 default:
123 return inb(up->port.iobase + offset);
124 }
125 }
126
127 static _INLINE_ void
128 serial_out(struct uart_sunsu_port *up, int offset, int value)
129 {
130 #ifndef CONFIG_SPARC64
131 /*
132 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
133 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
134 * gate outputs a logical one. Since we use level triggered interrupts
135 * we have lockup and watchdog reset. We cannot mask IRQ because
136 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
137 * This problem is similar to what Alpha people suffer, see serial.c.
138 */
139 if (offset == UART_MCR)
140 value |= UART_MCR_OUT2;
141 #endif
142 offset <<= up->port.regshift;
143
144 switch (up->port.iotype) {
145 case SERIAL_IO_HUB6:
146 outb(up->port.hub6 - 1 + offset, up->port.iobase);
147 outb(value, up->port.iobase + 1);
148 break;
149
150 case SERIAL_IO_MEM:
151 writeb(value, up->port.membase + offset);
152 break;
153
154 default:
155 outb(value, up->port.iobase + offset);
156 }
157 }
158
159 /*
160 * We used to support using pause I/O for certain machines. We
161 * haven't supported this for a while, but just in case it's badly
162 * needed for certain old 386 machines, I've left these #define's
163 * in....
164 */
165 #define serial_inp(up, offset) serial_in(up, offset)
166 #define serial_outp(up, offset, value) serial_out(up, offset, value)
167
168
169 /*
170 * For the 16C950
171 */
172 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
173 {
174 serial_out(up, UART_SCR, offset);
175 serial_out(up, UART_ICR, value);
176 }
177
178 #if 0 /* Unused currently */
179 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
180 {
181 unsigned int value;
182
183 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
184 serial_out(up, UART_SCR, offset);
185 value = serial_in(up, UART_ICR);
186 serial_icr_write(up, UART_ACR, up->acr);
187
188 return value;
189 }
190 #endif
191
192 #ifdef CONFIG_SERIAL_8250_RSA
193 /*
194 * Attempts to turn on the RSA FIFO. Returns zero on failure.
195 * We set the port uart clock rate if we succeed.
196 */
197 static int __enable_rsa(struct uart_sunsu_port *up)
198 {
199 unsigned char mode;
200 int result;
201
202 mode = serial_inp(up, UART_RSA_MSR);
203 result = mode & UART_RSA_MSR_FIFO;
204
205 if (!result) {
206 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
207 mode = serial_inp(up, UART_RSA_MSR);
208 result = mode & UART_RSA_MSR_FIFO;
209 }
210
211 if (result)
212 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
213
214 return result;
215 }
216
217 static void enable_rsa(struct uart_sunsu_port *up)
218 {
219 if (up->port.type == PORT_RSA) {
220 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
221 spin_lock_irq(&up->port.lock);
222 __enable_rsa(up);
223 spin_unlock_irq(&up->port.lock);
224 }
225 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
226 serial_outp(up, UART_RSA_FRR, 0);
227 }
228 }
229
230 /*
231 * Attempts to turn off the RSA FIFO. Returns zero on failure.
232 * It is unknown why interrupts were disabled in here. However,
233 * the caller is expected to preserve this behaviour by grabbing
234 * the spinlock before calling this function.
235 */
236 static void disable_rsa(struct uart_sunsu_port *up)
237 {
238 unsigned char mode;
239 int result;
240
241 if (up->port.type == PORT_RSA &&
242 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
243 spin_lock_irq(&up->port.lock);
244
245 mode = serial_inp(up, UART_RSA_MSR);
246 result = !(mode & UART_RSA_MSR_FIFO);
247
248 if (!result) {
249 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
250 mode = serial_inp(up, UART_RSA_MSR);
251 result = !(mode & UART_RSA_MSR_FIFO);
252 }
253
254 if (result)
255 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
256 spin_unlock_irq(&up->port.lock);
257 }
258 }
259 #endif /* CONFIG_SERIAL_8250_RSA */
260
261 static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop)
262 {
263 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
264
265 if (up->ier & UART_IER_THRI) {
266 up->ier &= ~UART_IER_THRI;
267 serial_out(up, UART_IER, up->ier);
268 }
269 if (up->port.type == PORT_16C950 && tty_stop) {
270 up->acr |= UART_ACR_TXDIS;
271 serial_icr_write(up, UART_ACR, up->acr);
272 }
273 }
274
275 static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
276 {
277 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
278
279 if (!(up->ier & UART_IER_THRI)) {
280 up->ier |= UART_IER_THRI;
281 serial_out(up, UART_IER, up->ier);
282 }
283 /*
284 * We only do this from uart_start
285 */
286 if (tty_start && up->port.type == PORT_16C950) {
287 up->acr &= ~UART_ACR_TXDIS;
288 serial_icr_write(up, UART_ACR, up->acr);
289 }
290 }
291
292 static void sunsu_stop_rx(struct uart_port *port)
293 {
294 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
295 unsigned long flags;
296
297 spin_lock_irqsave(&up->port.lock, flags);
298 up->ier &= ~UART_IER_RLSI;
299 up->port.read_status_mask &= ~UART_LSR_DR;
300 serial_out(up, UART_IER, up->ier);
301 spin_unlock_irqrestore(&up->port.lock, flags);
302 }
303
304 static void sunsu_enable_ms(struct uart_port *port)
305 {
306 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
307 unsigned long flags;
308
309 spin_lock_irqsave(&up->port.lock, flags);
310 up->ier |= UART_IER_MSI;
311 serial_out(up, UART_IER, up->ier);
312 spin_unlock_irqrestore(&up->port.lock, flags);
313 }
314
315 static _INLINE_ void
316 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
317 {
318 struct tty_struct *tty = up->port.info->tty;
319 unsigned char ch;
320 int max_count = 256;
321 int saw_console_brk = 0;
322
323 do {
324 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
325 tty->flip.work.func((void *)tty);
326 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
327 return; // if TTY_DONT_FLIP is set
328 }
329 ch = serial_inp(up, UART_RX);
330 *tty->flip.char_buf_ptr = ch;
331 *tty->flip.flag_buf_ptr = TTY_NORMAL;
332 up->port.icount.rx++;
333
334 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
335 UART_LSR_FE | UART_LSR_OE))) {
336 /*
337 * For statistics only
338 */
339 if (*status & UART_LSR_BI) {
340 *status &= ~(UART_LSR_FE | UART_LSR_PE);
341 up->port.icount.brk++;
342 if (up->port.cons != NULL &&
343 up->port.line == up->port.cons->index)
344 saw_console_brk = 1;
345 /*
346 * We do the SysRQ and SAK checking
347 * here because otherwise the break
348 * may get masked by ignore_status_mask
349 * or read_status_mask.
350 */
351 if (uart_handle_break(&up->port))
352 goto ignore_char;
353 } else if (*status & UART_LSR_PE)
354 up->port.icount.parity++;
355 else if (*status & UART_LSR_FE)
356 up->port.icount.frame++;
357 if (*status & UART_LSR_OE)
358 up->port.icount.overrun++;
359
360 /*
361 * Mask off conditions which should be ingored.
362 */
363 *status &= up->port.read_status_mask;
364
365 if (up->port.cons != NULL &&
366 up->port.line == up->port.cons->index) {
367 /* Recover the break flag from console xmit */
368 *status |= up->lsr_break_flag;
369 up->lsr_break_flag = 0;
370 }
371
372 if (*status & UART_LSR_BI) {
373 *tty->flip.flag_buf_ptr = TTY_BREAK;
374 } else if (*status & UART_LSR_PE)
375 *tty->flip.flag_buf_ptr = TTY_PARITY;
376 else if (*status & UART_LSR_FE)
377 *tty->flip.flag_buf_ptr = TTY_FRAME;
378 }
379 if (uart_handle_sysrq_char(&up->port, ch, regs))
380 goto ignore_char;
381 if ((*status & up->port.ignore_status_mask) == 0) {
382 tty->flip.flag_buf_ptr++;
383 tty->flip.char_buf_ptr++;
384 tty->flip.count++;
385 }
386 if ((*status & UART_LSR_OE) &&
387 tty->flip.count < TTY_FLIPBUF_SIZE) {
388 /*
389 * Overrun is special, since it's reported
390 * immediately, and doesn't affect the current
391 * character.
392 */
393 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
394 tty->flip.flag_buf_ptr++;
395 tty->flip.char_buf_ptr++;
396 tty->flip.count++;
397 }
398 ignore_char:
399 *status = serial_inp(up, UART_LSR);
400 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
401 tty_flip_buffer_push(tty);
402
403 if (saw_console_brk)
404 sun_do_break();
405 }
406
407 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
408 {
409 struct circ_buf *xmit = &up->port.info->xmit;
410 int count;
411
412 if (up->port.x_char) {
413 serial_outp(up, UART_TX, up->port.x_char);
414 up->port.icount.tx++;
415 up->port.x_char = 0;
416 return;
417 }
418 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
419 sunsu_stop_tx(&up->port, 0);
420 return;
421 }
422
423 count = up->port.fifosize;
424 do {
425 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
426 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
427 up->port.icount.tx++;
428 if (uart_circ_empty(xmit))
429 break;
430 } while (--count > 0);
431
432 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
433 uart_write_wakeup(&up->port);
434
435 if (uart_circ_empty(xmit))
436 sunsu_stop_tx(&up->port, 0);
437 }
438
439 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
440 {
441 int status;
442
443 status = serial_in(up, UART_MSR);
444
445 if ((status & UART_MSR_ANY_DELTA) == 0)
446 return;
447
448 if (status & UART_MSR_TERI)
449 up->port.icount.rng++;
450 if (status & UART_MSR_DDSR)
451 up->port.icount.dsr++;
452 if (status & UART_MSR_DDCD)
453 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
454 if (status & UART_MSR_DCTS)
455 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
456
457 wake_up_interruptible(&up->port.info->delta_msr_wait);
458 }
459
460 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
461 {
462 struct uart_sunsu_port *up = dev_id;
463 unsigned long flags;
464 unsigned char status;
465
466 spin_lock_irqsave(&up->port.lock, flags);
467
468 do {
469 status = serial_inp(up, UART_LSR);
470 if (status & UART_LSR_DR)
471 receive_chars(up, &status, regs);
472 check_modem_status(up);
473 if (status & UART_LSR_THRE)
474 transmit_chars(up);
475 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
476
477 spin_unlock_irqrestore(&up->port.lock, flags);
478
479 return IRQ_HANDLED;
480 }
481
482 /* Separate interrupt handling path for keyboard/mouse ports. */
483
484 static void
485 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
486 unsigned int iflag, unsigned int quot);
487
488 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
489 {
490 unsigned int cur_cflag = up->cflag;
491 int quot, new_baud;
492
493 up->cflag &= ~CBAUD;
494 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
495
496 quot = up->port.uartclk / (16 * new_baud);
497
498 spin_unlock(&up->port.lock);
499
500 sunsu_change_speed(&up->port, up->cflag, 0, quot);
501
502 spin_lock(&up->port.lock);
503 }
504
505 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
506 {
507 do {
508 unsigned char ch = serial_inp(up, UART_RX);
509
510 if (up->su_type == SU_PORT_KBD) {
511 if (ch == SUNKBD_RESET) {
512 up->kbd_id = 1;
513 up->l1_down = 0;
514 } else if (up->kbd_id) {
515 up->kbd_id = 0;
516 } else if (ch == SUNKBD_L1) {
517 up->l1_down = 1;
518 } else if (ch == (SUNKBD_L1|SUNKBD_UP)) {
519 up->l1_down = 0;
520 } else if (ch == SUNKBD_A && up->l1_down) {
521 /* whee... */
522 sun_do_break();
523
524 /* Continue execution... */
525 up->l1_down = 0;
526 up->kbd_id = 0;
527 return;
528 }
529 #ifdef CONFIG_SERIO
530 serio_interrupt(&up->serio, ch, 0, regs);
531 #endif
532 } else if (up->su_type == SU_PORT_MS) {
533 int ret = suncore_mouse_baud_detection(ch, is_break);
534
535 switch (ret) {
536 case 2:
537 sunsu_change_mouse_baud(up);
538 /* fallthru */
539 case 1:
540 break;
541
542 case 0:
543 #ifdef CONFIG_SERIO
544 serio_interrupt(&up->serio, ch, 0, regs);
545 #endif
546 break;
547 };
548 }
549 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
550 }
551
552 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
553 {
554 struct uart_sunsu_port *up = dev_id;
555
556 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
557 unsigned char status = serial_inp(up, UART_LSR);
558
559 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
560 receive_kbd_ms_chars(up, regs,
561 (status & UART_LSR_BI) != 0);
562 }
563
564 return IRQ_HANDLED;
565 }
566
567 static unsigned int sunsu_tx_empty(struct uart_port *port)
568 {
569 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
570 unsigned long flags;
571 unsigned int ret;
572
573 spin_lock_irqsave(&up->port.lock, flags);
574 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
575 spin_unlock_irqrestore(&up->port.lock, flags);
576
577 return ret;
578 }
579
580 static unsigned int sunsu_get_mctrl(struct uart_port *port)
581 {
582 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
583 unsigned long flags;
584 unsigned char status;
585 unsigned int ret;
586
587 spin_lock_irqsave(&up->port.lock, flags);
588 status = serial_in(up, UART_MSR);
589 spin_unlock_irqrestore(&up->port.lock, flags);
590
591 ret = 0;
592 if (status & UART_MSR_DCD)
593 ret |= TIOCM_CAR;
594 if (status & UART_MSR_RI)
595 ret |= TIOCM_RNG;
596 if (status & UART_MSR_DSR)
597 ret |= TIOCM_DSR;
598 if (status & UART_MSR_CTS)
599 ret |= TIOCM_CTS;
600 return ret;
601 }
602
603 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
604 {
605 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
606 unsigned char mcr = 0;
607
608 if (mctrl & TIOCM_RTS)
609 mcr |= UART_MCR_RTS;
610 if (mctrl & TIOCM_DTR)
611 mcr |= UART_MCR_DTR;
612 if (mctrl & TIOCM_OUT1)
613 mcr |= UART_MCR_OUT1;
614 if (mctrl & TIOCM_OUT2)
615 mcr |= UART_MCR_OUT2;
616 if (mctrl & TIOCM_LOOP)
617 mcr |= UART_MCR_LOOP;
618
619 serial_out(up, UART_MCR, mcr);
620 }
621
622 static void sunsu_break_ctl(struct uart_port *port, int break_state)
623 {
624 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
625 unsigned long flags;
626
627 spin_lock_irqsave(&up->port.lock, flags);
628 if (break_state == -1)
629 up->lcr |= UART_LCR_SBC;
630 else
631 up->lcr &= ~UART_LCR_SBC;
632 serial_out(up, UART_LCR, up->lcr);
633 spin_unlock_irqrestore(&up->port.lock, flags);
634 }
635
636 static int sunsu_startup(struct uart_port *port)
637 {
638 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
639 unsigned long flags;
640 int retval;
641
642 if (up->port.type == PORT_16C950) {
643 /* Wake up and initialize UART */
644 up->acr = 0;
645 serial_outp(up, UART_LCR, 0xBF);
646 serial_outp(up, UART_EFR, UART_EFR_ECB);
647 serial_outp(up, UART_IER, 0);
648 serial_outp(up, UART_LCR, 0);
649 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
650 serial_outp(up, UART_LCR, 0xBF);
651 serial_outp(up, UART_EFR, UART_EFR_ECB);
652 serial_outp(up, UART_LCR, 0);
653 }
654
655 #ifdef CONFIG_SERIAL_8250_RSA
656 /*
657 * If this is an RSA port, see if we can kick it up to the
658 * higher speed clock.
659 */
660 enable_rsa(up);
661 #endif
662
663 /*
664 * Clear the FIFO buffers and disable them.
665 * (they will be reeanbled in set_termios())
666 */
667 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
668 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
669 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
670 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
671 serial_outp(up, UART_FCR, 0);
672 }
673
674 /*
675 * Clear the interrupt registers.
676 */
677 (void) serial_inp(up, UART_LSR);
678 (void) serial_inp(up, UART_RX);
679 (void) serial_inp(up, UART_IIR);
680 (void) serial_inp(up, UART_MSR);
681
682 /*
683 * At this point, there's no way the LSR could still be 0xff;
684 * if it is, then bail out, because there's likely no UART
685 * here.
686 */
687 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
688 (serial_inp(up, UART_LSR) == 0xff)) {
689 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
690 return -ENODEV;
691 }
692
693 if (up->su_type != SU_PORT_PORT) {
694 retval = request_irq(up->irq, sunsu_kbd_ms_interrupt,
695 SA_SHIRQ, su_typev[up->su_type], up);
696 } else {
697 retval = request_irq(up->irq, sunsu_serial_interrupt,
698 SA_SHIRQ, su_typev[up->su_type], up);
699 }
700 if (retval) {
701 printk("su: Cannot register IRQ %d\n", up->irq);
702 return retval;
703 }
704
705 /*
706 * Now, initialize the UART
707 */
708 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
709
710 spin_lock_irqsave(&up->port.lock, flags);
711
712 up->port.mctrl |= TIOCM_OUT2;
713
714 sunsu_set_mctrl(&up->port, up->port.mctrl);
715 spin_unlock_irqrestore(&up->port.lock, flags);
716
717 /*
718 * Finally, enable interrupts. Note: Modem status interrupts
719 * are set via set_termios(), which will be occurring imminently
720 * anyway, so we don't enable them here.
721 */
722 up->ier = UART_IER_RLSI | UART_IER_RDI;
723 serial_outp(up, UART_IER, up->ier);
724
725 if (up->port.flags & ASYNC_FOURPORT) {
726 unsigned int icp;
727 /*
728 * Enable interrupts on the AST Fourport board
729 */
730 icp = (up->port.iobase & 0xfe0) | 0x01f;
731 outb_p(0x80, icp);
732 (void) inb_p(icp);
733 }
734
735 /*
736 * And clear the interrupt registers again for luck.
737 */
738 (void) serial_inp(up, UART_LSR);
739 (void) serial_inp(up, UART_RX);
740 (void) serial_inp(up, UART_IIR);
741 (void) serial_inp(up, UART_MSR);
742
743 return 0;
744 }
745
746 static void sunsu_shutdown(struct uart_port *port)
747 {
748 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
749 unsigned long flags;
750
751 /*
752 * Disable interrupts from this port
753 */
754 up->ier = 0;
755 serial_outp(up, UART_IER, 0);
756
757 spin_lock_irqsave(&up->port.lock, flags);
758 if (up->port.flags & ASYNC_FOURPORT) {
759 /* reset interrupts on the AST Fourport board */
760 inb((up->port.iobase & 0xfe0) | 0x1f);
761 up->port.mctrl |= TIOCM_OUT1;
762 } else
763 up->port.mctrl &= ~TIOCM_OUT2;
764
765 sunsu_set_mctrl(&up->port, up->port.mctrl);
766 spin_unlock_irqrestore(&up->port.lock, flags);
767
768 /*
769 * Disable break condition and FIFOs
770 */
771 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
772 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
773 UART_FCR_CLEAR_RCVR |
774 UART_FCR_CLEAR_XMIT);
775 serial_outp(up, UART_FCR, 0);
776
777 #ifdef CONFIG_SERIAL_8250_RSA
778 /*
779 * Reset the RSA board back to 115kbps compat mode.
780 */
781 disable_rsa(up);
782 #endif
783
784 /*
785 * Read data port to reset things.
786 */
787 (void) serial_in(up, UART_RX);
788
789 free_irq(up->irq, up);
790 }
791
792 static void
793 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
794 unsigned int iflag, unsigned int quot)
795 {
796 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
797 unsigned char cval, fcr = 0;
798 unsigned long flags;
799
800 switch (cflag & CSIZE) {
801 case CS5:
802 cval = 0x00;
803 break;
804 case CS6:
805 cval = 0x01;
806 break;
807 case CS7:
808 cval = 0x02;
809 break;
810 default:
811 case CS8:
812 cval = 0x03;
813 break;
814 }
815
816 if (cflag & CSTOPB)
817 cval |= 0x04;
818 if (cflag & PARENB)
819 cval |= UART_LCR_PARITY;
820 if (!(cflag & PARODD))
821 cval |= UART_LCR_EPAR;
822 #ifdef CMSPAR
823 if (cflag & CMSPAR)
824 cval |= UART_LCR_SPAR;
825 #endif
826
827 /*
828 * Work around a bug in the Oxford Semiconductor 952 rev B
829 * chip which causes it to seriously miscalculate baud rates
830 * when DLL is 0.
831 */
832 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
833 up->rev == 0x5201)
834 quot ++;
835
836 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
837 if ((up->port.uartclk / quot) < (2400 * 16))
838 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
839 #ifdef CONFIG_SERIAL_8250_RSA
840 else if (up->port.type == PORT_RSA)
841 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
842 #endif
843 else
844 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
845 }
846 if (up->port.type == PORT_16750)
847 fcr |= UART_FCR7_64BYTE;
848
849 /*
850 * Ok, we're now changing the port state. Do it with
851 * interrupts disabled.
852 */
853 spin_lock_irqsave(&up->port.lock, flags);
854
855 /*
856 * Update the per-port timeout.
857 */
858 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
859
860 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
861 if (iflag & INPCK)
862 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
863 if (iflag & (BRKINT | PARMRK))
864 up->port.read_status_mask |= UART_LSR_BI;
865
866 /*
867 * Characteres to ignore
868 */
869 up->port.ignore_status_mask = 0;
870 if (iflag & IGNPAR)
871 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
872 if (iflag & IGNBRK) {
873 up->port.ignore_status_mask |= UART_LSR_BI;
874 /*
875 * If we're ignoring parity and break indicators,
876 * ignore overruns too (for real raw support).
877 */
878 if (iflag & IGNPAR)
879 up->port.ignore_status_mask |= UART_LSR_OE;
880 }
881
882 /*
883 * ignore all characters if CREAD is not set
884 */
885 if ((cflag & CREAD) == 0)
886 up->port.ignore_status_mask |= UART_LSR_DR;
887
888 /*
889 * CTS flow control flag and modem status interrupts
890 */
891 up->ier &= ~UART_IER_MSI;
892 if (UART_ENABLE_MS(&up->port, cflag))
893 up->ier |= UART_IER_MSI;
894
895 serial_out(up, UART_IER, up->ier);
896
897 if (uart_config[up->port.type].flags & UART_STARTECH) {
898 serial_outp(up, UART_LCR, 0xBF);
899 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
900 }
901 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
902 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
903 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
904 if (up->port.type == PORT_16750)
905 serial_outp(up, UART_FCR, fcr); /* set fcr */
906 serial_outp(up, UART_LCR, cval); /* reset DLAB */
907 up->lcr = cval; /* Save LCR */
908 if (up->port.type != PORT_16750) {
909 if (fcr & UART_FCR_ENABLE_FIFO) {
910 /* emulated UARTs (Lucent Venus 167x) need two steps */
911 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
912 }
913 serial_outp(up, UART_FCR, fcr); /* set fcr */
914 }
915
916 up->cflag = cflag;
917
918 spin_unlock_irqrestore(&up->port.lock, flags);
919 }
920
921 static void
922 sunsu_set_termios(struct uart_port *port, struct termios *termios,
923 struct termios *old)
924 {
925 unsigned int baud, quot;
926
927 /*
928 * Ask the core to calculate the divisor for us.
929 */
930 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
931 quot = uart_get_divisor(port, baud);
932
933 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
934 }
935
936 static void sunsu_release_port(struct uart_port *port)
937 {
938 }
939
940 static int sunsu_request_port(struct uart_port *port)
941 {
942 return 0;
943 }
944
945 static void sunsu_config_port(struct uart_port *port, int flags)
946 {
947 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
948
949 if (flags & UART_CONFIG_TYPE) {
950 /*
951 * We are supposed to call autoconfig here, but this requires
952 * splitting all the OBP probing crap from the UART probing.
953 * We'll do it when we kill sunsu.c altogether.
954 */
955 port->type = up->type_probed; /* XXX */
956 }
957 }
958
959 static int
960 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
961 {
962 return -EINVAL;
963 }
964
965 static const char *
966 sunsu_type(struct uart_port *port)
967 {
968 int type = port->type;
969
970 if (type >= ARRAY_SIZE(uart_config))
971 type = 0;
972 return uart_config[type].name;
973 }
974
975 static struct uart_ops sunsu_pops = {
976 .tx_empty = sunsu_tx_empty,
977 .set_mctrl = sunsu_set_mctrl,
978 .get_mctrl = sunsu_get_mctrl,
979 .stop_tx = sunsu_stop_tx,
980 .start_tx = sunsu_start_tx,
981 .stop_rx = sunsu_stop_rx,
982 .enable_ms = sunsu_enable_ms,
983 .break_ctl = sunsu_break_ctl,
984 .startup = sunsu_startup,
985 .shutdown = sunsu_shutdown,
986 .set_termios = sunsu_set_termios,
987 .type = sunsu_type,
988 .release_port = sunsu_release_port,
989 .request_port = sunsu_request_port,
990 .config_port = sunsu_config_port,
991 .verify_port = sunsu_verify_port,
992 };
993
994 #define UART_NR 4
995
996 static struct uart_sunsu_port sunsu_ports[UART_NR];
997
998 #ifdef CONFIG_SERIO
999
1000 static spinlock_t sunsu_serio_lock = SPIN_LOCK_UNLOCKED;
1001
1002 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
1003 {
1004 struct uart_sunsu_port *up = serio->driver;
1005 unsigned long flags;
1006 int lsr;
1007
1008 spin_lock_irqsave(&sunsu_serio_lock, flags);
1009
1010 do {
1011 lsr = serial_in(up, UART_LSR);
1012 } while (!(lsr & UART_LSR_THRE));
1013
1014 /* Send the character out. */
1015 serial_out(up, UART_TX, ch);
1016
1017 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1018
1019 return 0;
1020 }
1021
1022 static int sunsu_serio_open(struct serio *serio)
1023 {
1024 unsigned long flags;
1025 int ret;
1026
1027 spin_lock_irqsave(&sunsu_serio_lock, flags);
1028 if (serio->private == NULL) {
1029 serio->private = (void *) -1L;
1030 ret = 0;
1031 } else
1032 ret = -EBUSY;
1033 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1034
1035 return ret;
1036 }
1037
1038 static void sunsu_serio_close(struct serio *serio)
1039 {
1040 unsigned long flags;
1041
1042 spin_lock_irqsave(&sunsu_serio_lock, flags);
1043 serio->private = NULL;
1044 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1045 }
1046
1047 #endif /* CONFIG_SERIO */
1048
1049 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1050 {
1051 unsigned char status1, status2, scratch, scratch2, scratch3;
1052 unsigned char save_lcr, save_mcr;
1053 struct linux_ebus_device *dev = 0;
1054 struct linux_ebus *ebus;
1055 #ifdef CONFIG_SPARC64
1056 struct sparc_isa_bridge *isa_br;
1057 struct sparc_isa_device *isa_dev;
1058 #endif
1059 #ifndef CONFIG_SPARC64
1060 struct linux_prom_registers reg0;
1061 #endif
1062 unsigned long flags;
1063
1064 if (!up->port_node || !up->su_type)
1065 return;
1066
1067 up->type_probed = PORT_UNKNOWN;
1068 up->port.iotype = SERIAL_IO_MEM;
1069
1070 /*
1071 * First we look for Ebus-bases su's
1072 */
1073 for_each_ebus(ebus) {
1074 for_each_ebusdev(dev, ebus) {
1075 if (dev->prom_node == up->port_node) {
1076 /*
1077 * The EBus is broken on sparc; it delivers
1078 * virtual addresses in resources. Oh well...
1079 * This is correct on sparc64, though.
1080 */
1081 up->port.membase = (char *) dev->resource[0].start;
1082 /*
1083 * This is correct on both architectures.
1084 */
1085 up->port.mapbase = dev->resource[0].start;
1086 up->irq = dev->irqs[0];
1087 goto ebus_done;
1088 }
1089 }
1090 }
1091
1092 #ifdef CONFIG_SPARC64
1093 for_each_isa(isa_br) {
1094 for_each_isadev(isa_dev, isa_br) {
1095 if (isa_dev->prom_node == up->port_node) {
1096 /* Same on sparc64. Cool architecure... */
1097 up->port.membase = (char *) isa_dev->resource.start;
1098 up->port.mapbase = isa_dev->resource.start;
1099 up->irq = isa_dev->irq;
1100 goto ebus_done;
1101 }
1102 }
1103 }
1104 #endif
1105
1106 #ifdef CONFIG_SPARC64
1107 /*
1108 * Not on Ebus, bailing.
1109 */
1110 return;
1111 #else
1112 /*
1113 * Not on Ebus, must be OBIO.
1114 */
1115 if (prom_getproperty(up->port_node, "reg",
1116 (char *)&reg0, sizeof(reg0)) == -1) {
1117 prom_printf("sunsu: no \"reg\" property\n");
1118 return;
1119 }
1120 prom_apply_obio_ranges(&reg0, 1);
1121 if (reg0.which_io != 0) { /* Just in case... */
1122 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1123 reg0.which_io, reg0.phys_addr);
1124 return;
1125 }
1126 up->port.mapbase = reg0.phys_addr;
1127 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1128 prom_printf("sunsu: Cannot map registers.\n");
1129 return;
1130 }
1131
1132 /*
1133 * 0x20 is sun4m thing, Dave Redman heritage.
1134 * See arch/sparc/kernel/irq.c.
1135 */
1136 #define IRQ_4M(n) ((n)|0x20)
1137
1138 /*
1139 * There is no intr property on MrCoffee, so hardwire it.
1140 */
1141 up->irq = IRQ_4M(13);
1142 #endif
1143
1144 ebus_done:
1145
1146 spin_lock_irqsave(&up->port.lock, flags);
1147
1148 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1149 /*
1150 * Do a simple existence test first; if we fail this, there's
1151 * no point trying anything else.
1152 *
1153 * 0x80 is used as a nonsense port to prevent against false
1154 * positives due to ISA bus float. The assumption is that
1155 * 0x80 is a non-existent port; which should be safe since
1156 * include/asm/io.h also makes this assumption.
1157 */
1158 scratch = serial_inp(up, UART_IER);
1159 serial_outp(up, UART_IER, 0);
1160 #ifdef __i386__
1161 outb(0xff, 0x080);
1162 #endif
1163 scratch2 = serial_inp(up, UART_IER);
1164 serial_outp(up, UART_IER, 0x0f);
1165 #ifdef __i386__
1166 outb(0, 0x080);
1167 #endif
1168 scratch3 = serial_inp(up, UART_IER);
1169 serial_outp(up, UART_IER, scratch);
1170 if (scratch2 != 0 || scratch3 != 0x0F)
1171 goto out; /* We failed; there's nothing here */
1172 }
1173
1174 save_mcr = serial_in(up, UART_MCR);
1175 save_lcr = serial_in(up, UART_LCR);
1176
1177 /*
1178 * Check to see if a UART is really there. Certain broken
1179 * internal modems based on the Rockwell chipset fail this
1180 * test, because they apparently don't implement the loopback
1181 * test mode. So this test is skipped on the COM 1 through
1182 * COM 4 ports. This *should* be safe, since no board
1183 * manufacturer would be stupid enough to design a board
1184 * that conflicts with COM 1-4 --- we hope!
1185 */
1186 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1187 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1188 status1 = serial_inp(up, UART_MSR) & 0xF0;
1189 serial_outp(up, UART_MCR, save_mcr);
1190 if (status1 != 0x90)
1191 goto out; /* We failed loopback test */
1192 }
1193 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1194 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1195 serial_outp(up, UART_LCR, 0);
1196 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1197 scratch = serial_in(up, UART_IIR) >> 6;
1198 switch (scratch) {
1199 case 0:
1200 up->port.type = PORT_16450;
1201 break;
1202 case 1:
1203 up->port.type = PORT_UNKNOWN;
1204 break;
1205 case 2:
1206 up->port.type = PORT_16550;
1207 break;
1208 case 3:
1209 up->port.type = PORT_16550A;
1210 break;
1211 }
1212 if (up->port.type == PORT_16550A) {
1213 /* Check for Startech UART's */
1214 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1215 if (serial_in(up, UART_EFR) == 0) {
1216 up->port.type = PORT_16650;
1217 } else {
1218 serial_outp(up, UART_LCR, 0xBF);
1219 if (serial_in(up, UART_EFR) == 0)
1220 up->port.type = PORT_16650V2;
1221 }
1222 }
1223 if (up->port.type == PORT_16550A) {
1224 /* Check for TI 16750 */
1225 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1226 serial_outp(up, UART_FCR,
1227 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1228 scratch = serial_in(up, UART_IIR) >> 5;
1229 if (scratch == 7) {
1230 /*
1231 * If this is a 16750, and not a cheap UART
1232 * clone, then it should only go into 64 byte
1233 * mode if the UART_FCR7_64BYTE bit was set
1234 * while UART_LCR_DLAB was latched.
1235 */
1236 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1237 serial_outp(up, UART_LCR, 0);
1238 serial_outp(up, UART_FCR,
1239 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1240 scratch = serial_in(up, UART_IIR) >> 5;
1241 if (scratch == 6)
1242 up->port.type = PORT_16750;
1243 }
1244 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1245 }
1246 serial_outp(up, UART_LCR, save_lcr);
1247 if (up->port.type == PORT_16450) {
1248 scratch = serial_in(up, UART_SCR);
1249 serial_outp(up, UART_SCR, 0xa5);
1250 status1 = serial_in(up, UART_SCR);
1251 serial_outp(up, UART_SCR, 0x5a);
1252 status2 = serial_in(up, UART_SCR);
1253 serial_outp(up, UART_SCR, scratch);
1254
1255 if ((status1 != 0xa5) || (status2 != 0x5a))
1256 up->port.type = PORT_8250;
1257 }
1258
1259 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1260
1261 if (up->port.type == PORT_UNKNOWN)
1262 goto out;
1263 up->type_probed = up->port.type; /* XXX */
1264
1265 /*
1266 * Reset the UART.
1267 */
1268 #ifdef CONFIG_SERIAL_8250_RSA
1269 if (up->port.type == PORT_RSA)
1270 serial_outp(up, UART_RSA_FRR, 0);
1271 #endif
1272 serial_outp(up, UART_MCR, save_mcr);
1273 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1274 UART_FCR_CLEAR_RCVR |
1275 UART_FCR_CLEAR_XMIT));
1276 serial_outp(up, UART_FCR, 0);
1277 (void)serial_in(up, UART_RX);
1278 serial_outp(up, UART_IER, 0);
1279
1280 out:
1281 spin_unlock_irqrestore(&up->port.lock, flags);
1282 }
1283
1284 static struct uart_driver sunsu_reg = {
1285 .owner = THIS_MODULE,
1286 .driver_name = "serial",
1287 .devfs_name = "tts/",
1288 .dev_name = "ttyS",
1289 .major = TTY_MAJOR,
1290 };
1291
1292 static int __init sunsu_kbd_ms_init(void)
1293 {
1294 struct uart_sunsu_port *up;
1295 int i;
1296
1297 for (i = 0, up = sunsu_ports; i < 2; i++, up++) {
1298 up->port.line = i;
1299 up->port.type = PORT_UNKNOWN;
1300 up->port.uartclk = (SU_BASE_BAUD * 16);
1301
1302 if (up->su_type == SU_PORT_KBD)
1303 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1304 else
1305 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1306
1307 sunsu_autoconfig(up);
1308 if (up->port.type == PORT_UNKNOWN)
1309 continue;
1310
1311 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1312 i,
1313 up->port.membase, __irq_itoa(up->irq),
1314 sunsu_type(&up->port));
1315
1316 #ifdef CONFIG_SERIO
1317 memset(&up->serio, 0, sizeof(up->serio));
1318
1319 up->serio.driver = up;
1320
1321 up->serio.type = SERIO_RS232;
1322 if (up->su_type == SU_PORT_KBD) {
1323 up->serio.type |= SERIO_SUNKBD;
1324 up->serio.name = "sukbd";
1325 } else {
1326 up->serio.type |= SERIO_SUN;
1327 up->serio.name = "sums";
1328 }
1329 up->serio.phys = (i == 0 ? "su/serio0" : "su/serio1");
1330
1331 up->serio.write = sunsu_serio_write;
1332 up->serio.open = sunsu_serio_open;
1333 up->serio.close = sunsu_serio_close;
1334
1335 serio_register_port(&up->serio);
1336 #endif
1337
1338 sunsu_startup(&up->port);
1339 }
1340 return 0;
1341 }
1342
1343 /*
1344 * ------------------------------------------------------------
1345 * Serial console driver
1346 * ------------------------------------------------------------
1347 */
1348
1349 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1350
1351 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1352
1353 /*
1354 * Wait for transmitter & holding register to empty
1355 */
1356 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1357 {
1358 unsigned int status, tmout = 10000;
1359
1360 /* Wait up to 10ms for the character(s) to be sent. */
1361 do {
1362 status = serial_in(up, UART_LSR);
1363
1364 if (status & UART_LSR_BI)
1365 up->lsr_break_flag = UART_LSR_BI;
1366
1367 if (--tmout == 0)
1368 break;
1369 udelay(1);
1370 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1371
1372 /* Wait up to 1s for flow control if necessary */
1373 if (up->port.flags & ASYNC_CONS_FLOW) {
1374 tmout = 1000000;
1375 while (--tmout &&
1376 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1377 udelay(1);
1378 }
1379 }
1380
1381 /*
1382 * Print a string to the serial port trying not to disturb
1383 * any possible real use of the port...
1384 */
1385 static void sunsu_console_write(struct console *co, const char *s,
1386 unsigned int count)
1387 {
1388 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1389 unsigned int ier;
1390 int i;
1391
1392 /*
1393 * First save the UER then disable the interrupts
1394 */
1395 ier = serial_in(up, UART_IER);
1396 serial_out(up, UART_IER, 0);
1397
1398 /*
1399 * Now, do each character
1400 */
1401 for (i = 0; i < count; i++, s++) {
1402 wait_for_xmitr(up);
1403
1404 /*
1405 * Send the character out.
1406 * If a LF, also do CR...
1407 */
1408 serial_out(up, UART_TX, *s);
1409 if (*s == 10) {
1410 wait_for_xmitr(up);
1411 serial_out(up, UART_TX, 13);
1412 }
1413 }
1414
1415 /*
1416 * Finally, wait for transmitter to become empty
1417 * and restore the IER
1418 */
1419 wait_for_xmitr(up);
1420 serial_out(up, UART_IER, ier);
1421 }
1422
1423 /*
1424 * Setup initial baud/bits/parity. We do two things here:
1425 * - construct a cflag setting for the first su_open()
1426 * - initialize the serial port
1427 * Return non-zero if we didn't find a serial port.
1428 */
1429 static int __init sunsu_console_setup(struct console *co, char *options)
1430 {
1431 struct uart_port *port;
1432 int baud = 9600;
1433 int bits = 8;
1434 int parity = 'n';
1435 int flow = 'n';
1436
1437 printk("Console: ttyS%d (SU)\n",
1438 (sunsu_reg.minor - 64) + co->index);
1439
1440 /*
1441 * Check whether an invalid uart number has been specified, and
1442 * if so, search for the first available port that does have
1443 * console support.
1444 */
1445 if (co->index >= UART_NR)
1446 co->index = 0;
1447 port = &sunsu_ports[co->index].port;
1448
1449 /*
1450 * Temporary fix.
1451 */
1452 spin_lock_init(&port->lock);
1453
1454 if (options)
1455 uart_parse_options(options, &baud, &parity, &bits, &flow);
1456
1457 return uart_set_options(port, co, baud, parity, bits, flow);
1458 }
1459
1460 static struct console sunsu_cons = {
1461 .name = "ttyS",
1462 .write = sunsu_console_write,
1463 .device = uart_console_device,
1464 .setup = sunsu_console_setup,
1465 .flags = CON_PRINTBUFFER,
1466 .index = -1,
1467 .data = &sunsu_reg,
1468 };
1469 #define SUNSU_CONSOLE (&sunsu_cons)
1470
1471 /*
1472 * Register console.
1473 */
1474
1475 static int __init sunsu_serial_console_init(void)
1476 {
1477 int i;
1478
1479 if (con_is_present())
1480 return 0;
1481
1482 for (i = 0; i < UART_NR; i++) {
1483 int this_minor = sunsu_reg.minor + i;
1484
1485 if ((this_minor - 64) == (serial_console - 1))
1486 break;
1487 }
1488 if (i == UART_NR)
1489 return 0;
1490 if (sunsu_ports[i].port_node == 0)
1491 return 0;
1492
1493 sunsu_cons.index = i;
1494 register_console(&sunsu_cons);
1495 return 0;
1496 }
1497 #else
1498 #define SUNSU_CONSOLE (NULL)
1499 #define sunsu_serial_console_init() do { } while (0)
1500 #endif
1501
1502 static int __init sunsu_serial_init(void)
1503 {
1504 int instance, ret, i;
1505
1506 /* How many instances do we need? */
1507 instance = 0;
1508 for (i = 0; i < UART_NR; i++) {
1509 struct uart_sunsu_port *up = &sunsu_ports[i];
1510
1511 if (up->su_type == SU_PORT_MS ||
1512 up->su_type == SU_PORT_KBD)
1513 continue;
1514
1515 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1516 up->port.type = PORT_UNKNOWN;
1517 up->port.uartclk = (SU_BASE_BAUD * 16);
1518
1519 sunsu_autoconfig(up);
1520 if (up->port.type == PORT_UNKNOWN)
1521 continue;
1522
1523 up->port.line = instance++;
1524 up->port.ops = &sunsu_pops;
1525 }
1526
1527 sunsu_reg.minor = sunserial_current_minor;
1528 sunserial_current_minor += instance;
1529
1530 sunsu_reg.nr = instance;
1531 sunsu_reg.cons = SUNSU_CONSOLE;
1532
1533 ret = uart_register_driver(&sunsu_reg);
1534 if (ret < 0)
1535 return ret;
1536
1537 for (i = 0; i < UART_NR; i++) {
1538 struct uart_sunsu_port *up = &sunsu_ports[i];
1539
1540 /* Do not register Keyboard/Mouse lines with UART
1541 * layer.
1542 */
1543 if (up->su_type == SU_PORT_MS ||
1544 up->su_type == SU_PORT_KBD)
1545 continue;
1546
1547 if (up->port.type == PORT_UNKNOWN)
1548 continue;
1549
1550 uart_add_one_port(&sunsu_reg, &up->port);
1551 }
1552
1553 return 0;
1554 }
1555
1556 static int su_node_ok(int node, char *name, int namelen)
1557 {
1558 if (strncmp(name, "su", namelen) == 0 ||
1559 strncmp(name, "su_pnp", namelen) == 0)
1560 return 1;
1561
1562 if (strncmp(name, "serial", namelen) == 0) {
1563 char compat[32];
1564 int clen;
1565
1566 /* Is it _really_ a 'su' device? */
1567 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1568 if (clen > 0) {
1569 if (strncmp(compat, "sab82532", 8) == 0) {
1570 /* Nope, Siemens serial, not for us. */
1571 return 0;
1572 }
1573 }
1574 return 1;
1575 }
1576
1577 return 0;
1578 }
1579
1580 #define SU_PROPSIZE 128
1581
1582 /*
1583 * Scan status structure.
1584 * "prop" is a local variable but it eats stack to keep it in each
1585 * stack frame of a recursive procedure.
1586 */
1587 struct su_probe_scan {
1588 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1589 int msx, kbx; /* minors for mouse and keyboard */
1590 int devices; /* scan index */
1591 char prop[SU_PROPSIZE];
1592 };
1593
1594 /*
1595 * We have several platforms which present 'su' in different parts
1596 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1597 * We walk over the tree and find them wherever PROM hides them.
1598 */
1599 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1600 {
1601 struct uart_sunsu_port *up;
1602 int len;
1603
1604 if (t->devices >= UART_NR)
1605 return;
1606
1607 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1608 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1609 if (len <= 1)
1610 continue; /* Broken PROM node */
1611
1612 if (su_node_ok(sunode, t->prop, len)) {
1613 up = &sunsu_ports[t->devices];
1614 if (t->kbnode != 0 && sunode == t->kbnode) {
1615 t->kbx = t->devices;
1616 up->su_type = SU_PORT_KBD;
1617 } else if (t->msnode != 0 && sunode == t->msnode) {
1618 t->msx = t->devices;
1619 up->su_type = SU_PORT_MS;
1620 } else {
1621 #ifdef CONFIG_SPARC64
1622 /*
1623 * Do not attempt to use the truncated
1624 * keyboard/mouse ports as serial ports
1625 * on Ultras with PC keyboard attached.
1626 */
1627 if (prom_getbool(sunode, "mouse"))
1628 continue;
1629 if (prom_getbool(sunode, "keyboard"))
1630 continue;
1631 #endif
1632 up->su_type = SU_PORT_PORT;
1633 }
1634 up->port_node = sunode;
1635 ++t->devices;
1636 } else {
1637 su_probe_any(t, prom_getchild(sunode));
1638 }
1639 }
1640 }
1641
1642 static int __init sunsu_probe(void)
1643 {
1644 int node;
1645 int len;
1646 struct su_probe_scan scan;
1647
1648 /*
1649 * First, we scan the tree.
1650 */
1651 scan.devices = 0;
1652 scan.msx = -1;
1653 scan.kbx = -1;
1654 scan.kbnode = 0;
1655 scan.msnode = 0;
1656
1657 /*
1658 * Get the nodes for keyboard and mouse from 'aliases'...
1659 */
1660 node = prom_getchild(prom_root_node);
1661 node = prom_searchsiblings(node, "aliases");
1662 if (node != 0) {
1663 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1664 if (len > 0) {
1665 scan.prop[len] = 0;
1666 scan.kbnode = prom_finddevice(scan.prop);
1667 }
1668
1669 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1670 if (len > 0) {
1671 scan.prop[len] = 0;
1672 scan.msnode = prom_finddevice(scan.prop);
1673 }
1674 }
1675
1676 su_probe_any(&scan, prom_getchild(prom_root_node));
1677
1678 /*
1679 * Second, we process the special case of keyboard and mouse.
1680 *
1681 * Currently if we got keyboard and mouse hooked to "su" ports
1682 * we do not use any possible remaining "su" as a serial port.
1683 * Thus, we ignore values of .msx and .kbx, then compact ports.
1684 */
1685 if (scan.msx != -1 && scan.kbx != -1) {
1686 sunsu_ports[0].su_type = SU_PORT_MS;
1687 sunsu_ports[0].port_node = scan.msnode;
1688 sunsu_ports[1].su_type = SU_PORT_KBD;
1689 sunsu_ports[1].port_node = scan.kbnode;
1690
1691 sunsu_kbd_ms_init();
1692 return 0;
1693 }
1694
1695 if (scan.msx != -1 || scan.kbx != -1) {
1696 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1697 return -ENODEV;
1698 }
1699
1700 if (scan.devices == 0)
1701 return -ENODEV;
1702
1703 /*
1704 * Console must be initiated after the generic initialization.
1705 */
1706 sunsu_serial_init();
1707 sunsu_serial_console_init();
1708
1709 return 0;
1710 }
1711
1712 static void __exit sunsu_exit(void)
1713 {
1714 int i, saw_uart;
1715
1716 saw_uart = 0;
1717 for (i = 0; i < UART_NR; i++) {
1718 struct uart_sunsu_port *up = &sunsu_ports[i];
1719
1720 if (up->su_type == SU_PORT_MS ||
1721 up->su_type == SU_PORT_KBD) {
1722 #ifdef CONFIG_SERIO
1723 serio_unregister_port(&up->serio);
1724 #endif
1725 } else if (up->port.type != PORT_UNKNOWN) {
1726 uart_remove_one_port(&sunsu_reg, &up->port);
1727 saw_uart++;
1728 }
1729 }
1730
1731 if (saw_uart)
1732 uart_unregister_driver(&sunsu_reg);
1733 }
1734
1735 module_init(sunsu_probe);
1736 module_exit(sunsu_exit);
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