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Merge with Linux 2.5.74.
[linux-2.6/linux-mips.git] / drivers / net / e1000 / e1000_ethtool.c
blobc979393d92502b66ea229ffbe076ddba9cf5e0e9
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for e1000 */
30
31 #include "e1000.h"
32
33 #include <asm/uaccess.h>
34
35 extern char e1000_driver_name[];
36 extern char e1000_driver_version[];
37
38 extern int e1000_up(struct e1000_adapter *adapter);
39 extern void e1000_down(struct e1000_adapter *adapter);
40 extern void e1000_reset(struct e1000_adapter *adapter);
41 extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
42
43 struct e1000_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
47 };
48
49 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
50 offsetof(struct e1000_adapter, m)
51 static struct e1000_stats e1000_gstrings_stats[] = {
52 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
53 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
54 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
55 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
56 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
57 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
58 { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
59 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
60 { "multicast", E1000_STAT(net_stats.multicast) },
61 { "collisions", E1000_STAT(net_stats.collisions) },
62 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
63 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
64 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
65 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
66 { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
67 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
68 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
69 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
70 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
71 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
72 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
73 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
74 { "tx_deferred_ok", E1000_STAT(stats.dc) },
75 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
76 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
77 { "rx_long_length_errors", E1000_STAT(stats.roc) },
78 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
79 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
80 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
81 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
82 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
83 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
84 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
85 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
86 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
87 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }
88 };
89 #define E1000_STATS_LEN \
90 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
91 static char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
92 "Register test (offline)", "Eeprom test (offline)",
93 "Interrupt test (offline)", "Loopback test (offline)",
94 "Link test (on/offline)"
95 };
96 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
97
98 static void
99 e1000_ethtool_gset(struct e1000_adapter *adapter, struct ethtool_cmd *ecmd)
100 {
101 struct e1000_hw *hw = &adapter->hw;
102
103 if(hw->media_type == e1000_media_type_copper) {
104
105 ecmd->supported = (SUPPORTED_10baseT_Half |
106 SUPPORTED_10baseT_Full |
107 SUPPORTED_100baseT_Half |
108 SUPPORTED_100baseT_Full |
109 SUPPORTED_1000baseT_Full|
110 SUPPORTED_Autoneg |
111 SUPPORTED_TP);
112
113 ecmd->advertising = ADVERTISED_TP;
114
115 if(hw->autoneg == 1) {
116 ecmd->advertising |= ADVERTISED_Autoneg;
117
118 /* the e1000 autoneg seems to match ethtool nicely */
119
120 ecmd->advertising |= hw->autoneg_advertised;
121 }
122
123 ecmd->port = PORT_TP;
124 ecmd->phy_address = hw->phy_addr;
125
126 if(hw->mac_type == e1000_82543)
127 ecmd->transceiver = XCVR_EXTERNAL;
128 else
129 ecmd->transceiver = XCVR_INTERNAL;
130
131 } else {
132 ecmd->supported = (SUPPORTED_1000baseT_Full |
133 SUPPORTED_FIBRE |
134 SUPPORTED_Autoneg);
135
136 ecmd->advertising = (SUPPORTED_1000baseT_Full |
137 SUPPORTED_FIBRE |
138 SUPPORTED_Autoneg);
139
140 ecmd->port = PORT_FIBRE;
141
142 if(hw->mac_type >= e1000_82545)
143 ecmd->transceiver = XCVR_INTERNAL;
144 else
145 ecmd->transceiver = XCVR_EXTERNAL;
146 }
147
148 if(netif_carrier_ok(adapter->netdev)) {
149
150 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
151 &adapter->link_duplex);
152 ecmd->speed = adapter->link_speed;
153
154 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
155 * and HALF_DUPLEX != DUPLEX_HALF */
156
157 if(adapter->link_duplex == FULL_DUPLEX)
158 ecmd->duplex = DUPLEX_FULL;
159 else
160 ecmd->duplex = DUPLEX_HALF;
161 } else {
162 ecmd->speed = -1;
163 ecmd->duplex = -1;
164 }
165
166 ecmd->autoneg = (hw->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
167 }
168
169 static int
170 e1000_ethtool_sset(struct e1000_adapter *adapter, struct ethtool_cmd *ecmd)
171 {
172 struct e1000_hw *hw = &adapter->hw;
173
174 if(ecmd->autoneg == AUTONEG_ENABLE) {
175 hw->autoneg = 1;
176 hw->autoneg_advertised = 0x002F;
177 ecmd->advertising = 0x002F;
178 } else
179 if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
180 return -EINVAL;
181
182 /* reset the link */
183
184 if(netif_running(adapter->netdev)) {
185 e1000_down(adapter);
186 e1000_up(adapter);
187 } else
188 e1000_reset(adapter);
189
190 return 0;
191 }
192
193 static void
194 e1000_ethtool_gdrvinfo(struct e1000_adapter *adapter,
195 struct ethtool_drvinfo *drvinfo)
196 {
197 strncpy(drvinfo->driver, e1000_driver_name, 32);
198 strncpy(drvinfo->version, e1000_driver_version, 32);
199 strncpy(drvinfo->fw_version, "N/A", 32);
200 strncpy(drvinfo->bus_info, adapter->pdev->slot_name, 32);
201 drvinfo->n_stats = E1000_STATS_LEN;
202 drvinfo->testinfo_len = E1000_TEST_LEN;
203 #define E1000_REGS_LEN 32
204 drvinfo->regdump_len = E1000_REGS_LEN * sizeof(uint32_t);
205 drvinfo->eedump_len = adapter->hw.eeprom.word_size * 2;
206 }
207
208 static void
209 e1000_ethtool_gregs(struct e1000_adapter *adapter,
210 struct ethtool_regs *regs, uint32_t *regs_buff)
211 {
212 struct e1000_hw *hw = &adapter->hw;
213 uint16_t phy_data;
214
215 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
216
217 regs_buff[0] = E1000_READ_REG(hw, CTRL);
218 regs_buff[1] = E1000_READ_REG(hw, STATUS);
219
220 regs_buff[2] = E1000_READ_REG(hw, RCTL);
221 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
222 regs_buff[4] = E1000_READ_REG(hw, RDH);
223 regs_buff[5] = E1000_READ_REG(hw, RDT);
224 regs_buff[6] = E1000_READ_REG(hw, RDTR);
225
226 regs_buff[7] = E1000_READ_REG(hw, TCTL);
227 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
228 regs_buff[9] = E1000_READ_REG(hw, TDH);
229 regs_buff[10] = E1000_READ_REG(hw, TDT);
230 regs_buff[11] = E1000_READ_REG(hw, TIDV);
231
232 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
233 if(hw->phy_type == e1000_phy_igp) {
234 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
235 IGP01E1000_PHY_AGC_A);
236 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
237 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
238 regs_buff[13] = (uint32_t)phy_data; /* cable length */
239 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
240 IGP01E1000_PHY_AGC_B);
241 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
242 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
243 regs_buff[14] = (uint32_t)phy_data; /* cable length */
244 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
245 IGP01E1000_PHY_AGC_C);
246 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
247 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
248 regs_buff[15] = (uint32_t)phy_data; /* cable length */
249 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
250 IGP01E1000_PHY_AGC_D);
251 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
252 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
253 regs_buff[16] = (uint32_t)phy_data; /* cable length */
254 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
255 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
256 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
257 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
258 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
259 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
260 IGP01E1000_PHY_PCS_INIT_REG);
261 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
262 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
263 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
264 regs_buff[20] = 0; /* polarity correction enabled (always) */
265 regs_buff[22] = 0; /* phy receive errors (unavailable) */
266 regs_buff[23] = regs_buff[18]; /* mdix mode */
267 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
268 } else {
269 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
270 regs_buff[13] = (uint32_t)phy_data; /* cable length */
271 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
272 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
273 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
274 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
275 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
276 regs_buff[18] = regs_buff[13]; /* cable polarity */
277 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
278 regs_buff[20] = regs_buff[17]; /* polarity correction */
279 /* phy receive errors */
280 regs_buff[22] = adapter->phy_stats.receive_errors;
281 regs_buff[23] = regs_buff[13]; /* mdix mode */
282 }
283 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
284 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
285 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
286 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
287
288 return;
289 }
290
291 static int
292 e1000_ethtool_geeprom(struct e1000_adapter *adapter,
293 struct ethtool_eeprom *eeprom, uint16_t *eeprom_buff)
294 {
295 struct e1000_hw *hw = &adapter->hw;
296 int first_word, last_word;
297 int ret_val = 0;
298
299 if(eeprom->len == 0) {
300 ret_val = -EINVAL;
301 goto geeprom_error;
302 }
303
304 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
305
306 if(eeprom->offset > eeprom->offset + eeprom->len) {
307 ret_val = -EINVAL;
308 goto geeprom_error;
309 }
310
311 if((eeprom->offset + eeprom->len) > (hw->eeprom.word_size * 2))
312 eeprom->len = ((hw->eeprom.word_size * 2) - eeprom->offset);
313
314 first_word = eeprom->offset >> 1;
315 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
316
317 if(hw->eeprom.type == e1000_eeprom_spi)
318 ret_val = e1000_read_eeprom(hw, first_word,
319 last_word - first_word + 1,
320 eeprom_buff);
321 else {
322 uint16_t i;
323 for (i = 0; i < last_word - first_word + 1; i++)
324 if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
325 &eeprom_buff[i])))
326 break;
327 }
328 geeprom_error:
329 return ret_val;
330 }
331
332 static int
333 e1000_ethtool_seeprom(struct e1000_adapter *adapter,
334 struct ethtool_eeprom *eeprom, void *user_data)
335 {
336 struct e1000_hw *hw = &adapter->hw;
337 uint16_t *eeprom_buff;
338 void *ptr;
339 int max_len, first_word, last_word, ret_val = 0;
340
341 if(eeprom->len == 0)
342 return -EOPNOTSUPP;
343
344 if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
345 return -EFAULT;
346
347 max_len = hw->eeprom.word_size * 2;
348
349 if((eeprom->offset + eeprom->len) > max_len)
350 eeprom->len = (max_len - eeprom->offset);
351
352 first_word = eeprom->offset >> 1;
353 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
354 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
355 if(!eeprom_buff)
356 return -ENOMEM;
357
358 ptr = (void *)eeprom_buff;
359
360 if(eeprom->offset & 1) {
361 /* need read/modify/write of first changed EEPROM word */
362 /* only the second byte of the word is being modified */
363 ret_val = e1000_read_eeprom(hw, first_word, 1,
364 &eeprom_buff[0]);
365 ptr++;
366 }
367 if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
368 /* need read/modify/write of last changed EEPROM word */
369 /* only the first byte of the word is being modified */
370 ret_val = e1000_read_eeprom(hw, last_word, 1,
371 &eeprom_buff[last_word - first_word]);
372 }
373 if((ret_val != 0) || copy_from_user(ptr, user_data, eeprom->len)) {
374 ret_val = -EFAULT;
375 goto seeprom_error;
376 }
377
378 ret_val = e1000_write_eeprom(hw, first_word,
379 last_word - first_word + 1, eeprom_buff);
380
381 /* Update the checksum over the first part of the EEPROM if needed */
382 if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
383 e1000_update_eeprom_checksum(hw);
384
385 seeprom_error:
386 kfree(eeprom_buff);
387 return ret_val;
388 }
389
390 #define REG_PATTERN_TEST(R, M, W) \
391 { \
392 uint32_t pat, value; \
393 uint32_t test[] = \
394 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
395 for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
396 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
397 value = E1000_READ_REG(&adapter->hw, R); \
398 if(value != (test[pat] & W & M)) { \
399 *data = (adapter->hw.mac_type < e1000_82543) ? \
400 E1000_82542_##R : E1000_##R; \
401 return 1; \
402 } \
403 } \
404 }
405
406 #define REG_SET_AND_CHECK(R, M, W) \
407 { \
408 uint32_t value; \
409 E1000_WRITE_REG(&adapter->hw, R, W & M); \
410 value = E1000_READ_REG(&adapter->hw, R); \
411 if ((W & M) != (value & M)) { \
412 *data = (adapter->hw.mac_type < e1000_82543) ? \
413 E1000_82542_##R : E1000_##R; \
414 return 1; \
415 } \
416 }
417
418 static int
419 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
420 {
421 uint32_t value;
422 uint32_t i;
423
424 /* The status register is Read Only, so a write should fail.
425 * Some bits that get toggled are ignored.
426 */
427 value = (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833));
428 E1000_WRITE_REG(&adapter->hw, STATUS, (0xFFFFFFFF));
429 if(value != (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833))) {
430 *data = 1;
431 return 1;
432 }
433
434 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
435 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
436 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
437 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
438 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
439 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
440 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
441 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
442 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
443 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
444 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
445 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
446 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
447 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
448
449 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
450 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
451 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
452
453 if(adapter->hw.mac_type >= e1000_82543) {
454
455 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
456 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
457 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
458 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
459 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
460
461 for(i = 0; i < E1000_RAR_ENTRIES; i++) {
462 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
463 0xFFFFFFFF);
464 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
465 0xFFFFFFFF);
466 }
467
468 } else {
469
470 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
471 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
472 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
473 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
474
475 }
476
477 for(i = 0; i < E1000_MC_TBL_SIZE; i++)
478 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
479
480 return 0;
481 }
482
483 static int
484 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
485 {
486 uint16_t temp;
487 uint16_t checksum = 0;
488 uint16_t i;
489
490 *data = 0;
491 /* Read and add up the contents of the EEPROM */
492 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
493 if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
494 *data = 1;
495 break;
496 }
497 checksum += temp;
498 }
499
500 /* If Checksum is not Correct return error else test passed */
501 if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
502 *data = 2;
503
504 return *data;
505 }
506
507 static irqreturn_t
508 e1000_test_intr(int irq,
509 void *data,
510 struct pt_regs *regs)
511 {
512 struct net_device *netdev = (struct net_device *) data;
513 struct e1000_adapter *adapter = netdev->priv;
514
515 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
516
517 return IRQ_HANDLED;
518 }
519
520 static int
521 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
522 {
523 struct net_device *netdev = adapter->netdev;
524 uint32_t icr, mask, i=0;
525
526 *data = 0;
527
528 /* Hook up test interrupt handler just for this test */
529 if(request_irq
530 (netdev->irq, &e1000_test_intr, SA_SHIRQ, netdev->name, netdev)) {
531 *data = 1;
532 return -1;
533 }
534
535 /* Disable all the interrupts */
536 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
537 msec_delay(10);
538
539 /* Interrupts are disabled, so read interrupt cause
540 * register (icr) twice to verify that there are no interrupts
541 * pending. icr is clear on read.
542 */
543 icr = E1000_READ_REG(&adapter->hw, ICR);
544 icr = E1000_READ_REG(&adapter->hw, ICR);
545
546 if(icr != 0) {
547 /* if icr is non-zero, there is no point
548 * running other interrupt tests.
549 */
550 *data = 2;
551 i = 10;
552 }
553
554 /* Test each interrupt */
555 for(; i < 10; i++) {
556
557 /* Interrupt to test */
558 mask = 1 << i;
559
560 /* Disable the interrupt to be reported in
561 * the cause register and then force the same
562 * interrupt and see if one gets posted. If
563 * an interrupt was posted to the bus, the
564 * test failed.
565 */
566 adapter->test_icr = 0;
567 E1000_WRITE_REG(&adapter->hw, IMC, mask);
568 E1000_WRITE_REG(&adapter->hw, ICS, mask);
569 msec_delay(10);
570
571 if(adapter->test_icr & mask) {
572 *data = 3;
573 break;
574 }
575
576 /* Enable the interrupt to be reported in
577 * the cause register and then force the same
578 * interrupt and see if one gets posted. If
579 * an interrupt was not posted to the bus, the
580 * test failed.
581 */
582 adapter->test_icr = 0;
583 E1000_WRITE_REG(&adapter->hw, IMS, mask);
584 E1000_WRITE_REG(&adapter->hw, ICS, mask);
585 msec_delay(10);
586
587 if(!(adapter->test_icr & mask)) {
588 *data = 4;
589 break;
590 }
591
592 /* Disable the other interrupts to be reported in
593 * the cause register and then force the other
594 * interrupts and see if any get posted. If
595 * an interrupt was posted to the bus, the
596 * test failed.
597 */
598 adapter->test_icr = 0;
599 E1000_WRITE_REG(&adapter->hw, IMC, ~mask);
600 E1000_WRITE_REG(&adapter->hw, ICS, ~mask);
601 msec_delay(10);
602
603 if(adapter->test_icr) {
604 *data = 5;
605 break;
606 }
607 }
608
609 /* Disable all the interrupts */
610 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
611 msec_delay(10);
612
613 /* Unhook test interrupt handler */
614 free_irq(netdev->irq, netdev);
615
616 return *data;
617 }
618
619 static void
620 e1000_free_desc_rings(struct e1000_adapter *adapter)
621 {
622 struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
623 struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
624 struct pci_dev *pdev = adapter->pdev;
625 int i;
626
627 if(txdr->desc && txdr->buffer_info) {
628 for(i = 0; i < txdr->count; i++) {
629 if(txdr->buffer_info[i].dma)
630 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
631 txdr->buffer_info[i].length,
632 PCI_DMA_TODEVICE);
633 if(txdr->buffer_info[i].skb)
634 dev_kfree_skb(txdr->buffer_info[i].skb);
635 }
636 }
637
638 if(rxdr->desc && rxdr->buffer_info) {
639 for(i = 0; i < rxdr->count; i++) {
640 if(rxdr->buffer_info[i].dma)
641 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
642 rxdr->buffer_info[i].length,
643 PCI_DMA_FROMDEVICE);
644 if(rxdr->buffer_info[i].skb)
645 dev_kfree_skb(rxdr->buffer_info[i].skb);
646 }
647 }
648
649 if(txdr->desc)
650 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
651 if(rxdr->desc)
652 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
653
654 if(txdr->buffer_info)
655 kfree(txdr->buffer_info);
656 if(rxdr->buffer_info)
657 kfree(rxdr->buffer_info);
658
659 return;
660 }
661
662 static int
663 e1000_setup_desc_rings(struct e1000_adapter *adapter)
664 {
665 struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
666 struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
667 struct pci_dev *pdev = adapter->pdev;
668 uint32_t rctl;
669 int size, i, ret_val;
670
671 /* Setup Tx descriptor ring and Tx buffers */
672
673 txdr->count = 80;
674
675 size = txdr->count * sizeof(struct e1000_buffer);
676 if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
677 ret_val = 1;
678 goto err_nomem;
679 }
680 memset(txdr->buffer_info, 0, size);
681
682 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
683 E1000_ROUNDUP(txdr->size, 4096);
684 if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
685 ret_val = 2;
686 goto err_nomem;
687 }
688 memset(txdr->desc, 0, txdr->size);
689 txdr->next_to_use = txdr->next_to_clean = 0;
690
691 E1000_WRITE_REG(&adapter->hw, TDBAL,
692 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
693 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
694 E1000_WRITE_REG(&adapter->hw, TDLEN,
695 txdr->count * sizeof(struct e1000_tx_desc));
696 E1000_WRITE_REG(&adapter->hw, TDH, 0);
697 E1000_WRITE_REG(&adapter->hw, TDT, 0);
698 E1000_WRITE_REG(&adapter->hw, TCTL,
699 E1000_TCTL_PSP | E1000_TCTL_EN |
700 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
701 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
702
703 for(i = 0; i < txdr->count; i++) {
704 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
705 struct sk_buff *skb;
706 unsigned int size = 1024;
707
708 if(!(skb = alloc_skb(size, GFP_KERNEL))) {
709 ret_val = 3;
710 goto err_nomem;
711 }
712 skb_put(skb, size);
713 txdr->buffer_info[i].skb = skb;
714 txdr->buffer_info[i].length = skb->len;
715 txdr->buffer_info[i].dma =
716 pci_map_single(pdev, skb->data, skb->len,
717 PCI_DMA_TODEVICE);
718 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
719 tx_desc->lower.data = cpu_to_le32(skb->len);
720 tx_desc->lower.data |= E1000_TXD_CMD_EOP;
721 tx_desc->lower.data |= E1000_TXD_CMD_IFCS;
722 tx_desc->lower.data |= E1000_TXD_CMD_RPS;
723 tx_desc->upper.data = 0;
724 }
725
726 /* Setup Rx descriptor ring and Rx buffers */
727
728 rxdr->count = 80;
729
730 size = rxdr->count * sizeof(struct e1000_buffer);
731 if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
732 ret_val = 4;
733 goto err_nomem;
734 }
735 memset(rxdr->buffer_info, 0, size);
736
737 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
738 if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
739 ret_val = 5;
740 goto err_nomem;
741 }
742 memset(rxdr->desc, 0, rxdr->size);
743 rxdr->next_to_use = rxdr->next_to_clean = 0;
744
745 rctl = E1000_READ_REG(&adapter->hw, RCTL);
746 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
747 E1000_WRITE_REG(&adapter->hw, RDBAL,
748 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
749 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
750 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
751 E1000_WRITE_REG(&adapter->hw, RDH, 0);
752 E1000_WRITE_REG(&adapter->hw, RDT, 0);
753 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
754 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
755 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
756 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
757
758 for(i = 0; i < rxdr->count; i++) {
759 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
760 struct sk_buff *skb;
761
762 if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + 2, GFP_KERNEL))) {
763 ret_val = 6;
764 goto err_nomem;
765 }
766 skb_reserve(skb, 2);
767 rxdr->buffer_info[i].skb = skb;
768 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
769 rxdr->buffer_info[i].dma =
770 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
771 PCI_DMA_FROMDEVICE);
772 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
773 memset(skb->data, 0x00, skb->len);
774 }
775
776 return 0;
777
778 err_nomem:
779 e1000_free_desc_rings(adapter);
780 return ret_val;
781 }
782
783 static void
784 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
785 {
786 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
787 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
788 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
789 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
790 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
791
792 return;
793 }
794
795 static void
796 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
797 {
798 uint16_t phy_reg;
799
800 /* Because we reset the PHY above, we need to re-force TX_CLK in the
801 * Extended PHY Specific Control Register to 25MHz clock. This
802 * value defaults back to a 2.5MHz clock when the PHY is reset.
803 */
804 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
805 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
806 e1000_write_phy_reg(&adapter->hw,
807 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
808
809 /* In addition, because of the s/w reset above, we need to enable
810 * CRS on TX. This must be set for both full and half duplex
811 * operation.
812 */
813 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
814 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
815 e1000_write_phy_reg(&adapter->hw,
816 M88E1000_PHY_SPEC_CTRL, phy_reg);
817 }
818
819 static int
820 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
821 {
822 uint32_t ctrl_reg;
823 uint16_t phy_reg;
824
825 /* Setup the Device Control Register for PHY loopback test. */
826
827 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
828 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
829 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
830 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
831 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
832 E1000_CTRL_FD); /* Force Duplex to FULL */
833
834 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
835
836 /* Read the PHY Specific Control Register (0x10) */
837 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
838
839 /* Clear Auto-Crossover bits in PHY Specific Control Register
840 * (bits 6:5).
841 */
842 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
843 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
844
845 /* Perform software reset on the PHY */
846 e1000_phy_reset(&adapter->hw);
847
848 /* Have to setup TX_CLK and TX_CRS after software reset */
849 e1000_phy_reset_clk_and_crs(adapter);
850
851 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
852
853 /* Wait for reset to complete. */
854 udelay(500);
855
856 /* Have to setup TX_CLK and TX_CRS after software reset */
857 e1000_phy_reset_clk_and_crs(adapter);
858
859 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
860 e1000_phy_disable_receiver(adapter);
861
862 /* Set the loopback bit in the PHY control register. */
863 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
864 phy_reg |= MII_CR_LOOPBACK;
865 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
866
867 /* Setup TX_CLK and TX_CRS one more time. */
868 e1000_phy_reset_clk_and_crs(adapter);
869
870 /* Check Phy Configuration */
871 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
872 if(phy_reg != 0x4100)
873 return 9;
874
875 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
876 if(phy_reg != 0x0070)
877 return 10;
878
879 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
880 if(phy_reg != 0x001A)
881 return 11;
882
883 return 0;
884 }
885
886 static int
887 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
888 {
889 uint32_t ctrl_reg = 0;
890 uint32_t stat_reg = 0;
891
892 adapter->hw.autoneg = FALSE;
893
894 if(adapter->hw.phy_type == e1000_phy_m88) {
895 /* Auto-MDI/MDIX Off */
896 e1000_write_phy_reg(&adapter->hw,
897 M88E1000_PHY_SPEC_CTRL, 0x0808);
898 /* reset to update Auto-MDI/MDIX */
899 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
900 /* autoneg off */
901 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
902 }
903 /* force 1000, set loopback */
904 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
905
906 /* Now set up the MAC to the same speed/duplex as the PHY. */
907 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
908 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
909 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
910 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
911 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
912 E1000_CTRL_FD); /* Force Duplex to FULL */
913
914 if(adapter->hw.media_type == e1000_media_type_copper &&
915 adapter->hw.phy_type == e1000_phy_m88) {
916 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
917 } else {
918 /* Set the ILOS bit on the fiber Nic is half
919 * duplex link is detected. */
920 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
921 if((stat_reg & E1000_STATUS_FD) == 0)
922 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
923 }
924
925 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
926
927 /* Disable the receiver on the PHY so when a cable is plugged in, the
928 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
929 */
930 if(adapter->hw.phy_type == e1000_phy_m88)
931 e1000_phy_disable_receiver(adapter);
932
933 udelay(500);
934
935 return 0;
936 }
937
938 static int
939 e1000_set_phy_loopback(struct e1000_adapter *adapter)
940 {
941 uint16_t phy_reg = 0;
942 uint16_t count = 0;
943
944 switch (adapter->hw.mac_type) {
945 case e1000_82543:
946 if(adapter->hw.media_type == e1000_media_type_copper) {
947 /* Attempt to setup Loopback mode on Non-integrated PHY.
948 * Some PHY registers get corrupted at random, so
949 * attempt this 10 times.
950 */
951 while(e1000_nonintegrated_phy_loopback(adapter) &&
952 count++ < 10);
953 if(count < 11)
954 return 0;
955 }
956 break;
957
958 case e1000_82544:
959 case e1000_82540:
960 case e1000_82545:
961 case e1000_82546:
962 case e1000_82541:
963 case e1000_82547:
964 return e1000_integrated_phy_loopback(adapter);
965 break;
966
967 default:
968 /* Default PHY loopback work is to read the MII
969 * control register and assert bit 14 (loopback mode).
970 */
971 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
972 phy_reg |= MII_CR_LOOPBACK;
973 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
974 return 0;
975 break;
976 }
977
978 return 8;
979 }
980
981 static int
982 e1000_setup_loopback_test(struct e1000_adapter *adapter)
983 {
984 uint32_t rctl;
985
986 if(adapter->hw.media_type == e1000_media_type_fiber) {
987 if(adapter->hw.mac_type == e1000_82545 ||
988 adapter->hw.mac_type == e1000_82546)
989 return e1000_set_phy_loopback(adapter);
990 else {
991 rctl = E1000_READ_REG(&adapter->hw, RCTL);
992 rctl |= E1000_RCTL_LBM_TCVR;
993 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
994 return 0;
995 }
996 } else if(adapter->hw.media_type == e1000_media_type_copper)
997 return e1000_set_phy_loopback(adapter);
998
999 return 7;
1000 }
1001
1002 static void
1003 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1004 {
1005 uint32_t rctl;
1006 uint16_t phy_reg;
1007
1008 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1009 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1010 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1011
1012 if(adapter->hw.media_type == e1000_media_type_copper ||
1013 (adapter->hw.media_type == e1000_media_type_fiber &&
1014 (adapter->hw.mac_type == e1000_82545 ||
1015 adapter->hw.mac_type == e1000_82546))) {
1016 adapter->hw.autoneg = TRUE;
1017 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1018 if(phy_reg & MII_CR_LOOPBACK) {
1019 phy_reg &= ~MII_CR_LOOPBACK;
1020 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1021 e1000_phy_reset(&adapter->hw);
1022 }
1023 }
1024 }
1025
1026 static void
1027 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1028 {
1029 memset(skb->data, 0xFF, frame_size);
1030 frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
1031 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1032 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1033 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1034 }
1035
1036 static int
1037 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1038 {
1039 frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
1040 if(*(skb->data + 3) == 0xFF) {
1041 if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1042 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1043 return 0;
1044 }
1045 }
1046 return 13;
1047 }
1048
1049 static int
1050 e1000_run_loopback_test(struct e1000_adapter *adapter)
1051 {
1052 struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
1053 struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
1054 struct pci_dev *pdev = adapter->pdev;
1055 int i;
1056
1057 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1058
1059 for(i = 0; i < 64; i++) {
1060 e1000_create_lbtest_frame(txdr->buffer_info[i].skb, 1024);
1061 pci_dma_sync_single(pdev, txdr->buffer_info[i].dma,
1062 txdr->buffer_info[i].length,
1063 PCI_DMA_TODEVICE);
1064 }
1065 E1000_WRITE_REG(&adapter->hw, TDT, i);
1066
1067 msec_delay(200);
1068
1069 pci_dma_sync_single(pdev, rxdr->buffer_info[0].dma,
1070 rxdr->buffer_info[0].length, PCI_DMA_FROMDEVICE);
1071
1072 return e1000_check_lbtest_frame(rxdr->buffer_info[0].skb, 1024);
1073 }
1074
1075 static int
1076 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1077 {
1078 if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
1079 if((*data = e1000_setup_loopback_test(adapter))) goto err_loopback;
1080 *data = e1000_run_loopback_test(adapter);
1081 e1000_loopback_cleanup(adapter);
1082 e1000_free_desc_rings(adapter);
1083 err_loopback:
1084 return *data;
1085 }
1086
1087 static int
1088 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1089 {
1090 *data = 0;
1091 e1000_check_for_link(&adapter->hw);
1092
1093 if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1094 *data = 1;
1095 }
1096 return *data;
1097 }
1098
1099 static int
1100 e1000_ethtool_test(struct e1000_adapter *adapter,
1101 struct ethtool_test *eth_test, uint64_t *data)
1102 {
1103 boolean_t if_running = netif_running(adapter->netdev);
1104
1105 if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
1106 /* Offline tests */
1107
1108 /* Link test performed before hardware reset so autoneg doesn't
1109 * interfere with test result */
1110 if(e1000_link_test(adapter, &data[4]))
1111 eth_test->flags |= ETH_TEST_FL_FAILED;
1112
1113 if(if_running)
1114 e1000_down(adapter);
1115
1116 e1000_reset(adapter);
1117 if(e1000_reg_test(adapter, &data[0]))
1118 eth_test->flags |= ETH_TEST_FL_FAILED;
1119
1120 e1000_reset(adapter);
1121 if(e1000_eeprom_test(adapter, &data[1]))
1122 eth_test->flags |= ETH_TEST_FL_FAILED;
1123
1124 e1000_reset(adapter);
1125 if(e1000_intr_test(adapter, &data[2]))
1126 eth_test->flags |= ETH_TEST_FL_FAILED;
1127
1128 e1000_reset(adapter);
1129 if(e1000_loopback_test(adapter, &data[3]))
1130 eth_test->flags |= ETH_TEST_FL_FAILED;
1131
1132 e1000_reset(adapter);
1133 if(if_running)
1134 e1000_up(adapter);
1135 } else {
1136 /* Online tests */
1137 if(e1000_link_test(adapter, &data[4]))
1138 eth_test->flags |= ETH_TEST_FL_FAILED;
1139
1140 /* Offline tests aren't run; pass by default */
1141 data[0] = 0;
1142 data[1] = 0;
1143 data[2] = 0;
1144 data[3] = 0;
1145 }
1146 return 0;
1147 }
1148
1149 static void
1150 e1000_ethtool_gwol(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1151 {
1152 struct e1000_hw *hw = &adapter->hw;
1153
1154 switch(adapter->hw.device_id) {
1155 case E1000_DEV_ID_82542:
1156 case E1000_DEV_ID_82543GC_FIBER:
1157 case E1000_DEV_ID_82543GC_COPPER:
1158 case E1000_DEV_ID_82544EI_FIBER:
1159 wol->supported = 0;
1160 wol->wolopts = 0;
1161 return;
1162
1163 case E1000_DEV_ID_82546EB_FIBER:
1164 /* Wake events only supported on port A for dual fiber */
1165 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1166 wol->supported = 0;
1167 wol->wolopts = 0;
1168 return;
1169 }
1170 /* Fall Through */
1171
1172 default:
1173 wol->supported = WAKE_UCAST | WAKE_MCAST |
1174 WAKE_BCAST | WAKE_MAGIC;
1175
1176 wol->wolopts = 0;
1177 if(adapter->wol & E1000_WUFC_EX)
1178 wol->wolopts |= WAKE_UCAST;
1179 if(adapter->wol & E1000_WUFC_MC)
1180 wol->wolopts |= WAKE_MCAST;
1181 if(adapter->wol & E1000_WUFC_BC)
1182 wol->wolopts |= WAKE_BCAST;
1183 if(adapter->wol & E1000_WUFC_MAG)
1184 wol->wolopts |= WAKE_MAGIC;
1185 return;
1186 }
1187 }
1188
1189 static int
1190 e1000_ethtool_swol(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1191 {
1192 struct e1000_hw *hw = &adapter->hw;
1193
1194 switch(adapter->hw.device_id) {
1195 case E1000_DEV_ID_82542:
1196 case E1000_DEV_ID_82543GC_FIBER:
1197 case E1000_DEV_ID_82543GC_COPPER:
1198 case E1000_DEV_ID_82544EI_FIBER:
1199 return wol->wolopts ? -EOPNOTSUPP : 0;
1200
1201 case E1000_DEV_ID_82546EB_FIBER:
1202 /* Wake events only supported on port A for dual fiber */
1203 if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1204 return wol->wolopts ? -EOPNOTSUPP : 0;
1205 /* Fall Through */
1206
1207 default:
1208 if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1209 return -EOPNOTSUPP;
1210
1211 adapter->wol = 0;
1212
1213 if(wol->wolopts & WAKE_UCAST)
1214 adapter->wol |= E1000_WUFC_EX;
1215 if(wol->wolopts & WAKE_MCAST)
1216 adapter->wol |= E1000_WUFC_MC;
1217 if(wol->wolopts & WAKE_BCAST)
1218 adapter->wol |= E1000_WUFC_BC;
1219 if(wol->wolopts & WAKE_MAGIC)
1220 adapter->wol |= E1000_WUFC_MAG;
1221 }
1222
1223 return 0;
1224 }
1225
1226
1227 /* toggle LED 4 times per second = 2 "blinks" per second */
1228 #define E1000_ID_INTERVAL (HZ/4)
1229
1230 /* bit defines for adapter->led_status */
1231 #define E1000_LED_ON 0
1232
1233 static void
1234 e1000_led_blink_callback(unsigned long data)
1235 {
1236 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1237
1238 if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1239 e1000_led_off(&adapter->hw);
1240 else
1241 e1000_led_on(&adapter->hw);
1242
1243 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1244 }
1245
1246 static int
1247 e1000_ethtool_led_blink(struct e1000_adapter *adapter, struct ethtool_value *id)
1248 {
1249 if(!adapter->blink_timer.function) {
1250 init_timer(&adapter->blink_timer);
1251 adapter->blink_timer.function = e1000_led_blink_callback;
1252 adapter->blink_timer.data = (unsigned long) adapter;
1253 }
1254
1255 e1000_setup_led(&adapter->hw);
1256 mod_timer(&adapter->blink_timer, jiffies);
1257
1258 set_current_state(TASK_INTERRUPTIBLE);
1259 if(id->data)
1260 schedule_timeout(id->data * HZ);
1261 else
1262 schedule_timeout(MAX_SCHEDULE_TIMEOUT);
1263
1264 del_timer_sync(&adapter->blink_timer);
1265 e1000_led_off(&adapter->hw);
1266 clear_bit(E1000_LED_ON, &adapter->led_status);
1267 e1000_cleanup_led(&adapter->hw);
1268
1269 return 0;
1270 }
1271
1272 int
1273 e1000_ethtool_ioctl(struct net_device *netdev, struct ifreq *ifr)
1274 {
1275 struct e1000_adapter *adapter = netdev->priv;
1276 void *addr = ifr->ifr_data;
1277 uint32_t cmd;
1278
1279 if(get_user(cmd, (uint32_t *) addr))
1280 return -EFAULT;
1281
1282 switch(cmd) {
1283 case ETHTOOL_GSET: {
1284 struct ethtool_cmd ecmd = {ETHTOOL_GSET};
1285 e1000_ethtool_gset(adapter, &ecmd);
1286 if(copy_to_user(addr, &ecmd, sizeof(ecmd)))
1287 return -EFAULT;
1288 return 0;
1289 }
1290 case ETHTOOL_SSET: {
1291 struct ethtool_cmd ecmd;
1292 if(copy_from_user(&ecmd, addr, sizeof(ecmd)))
1293 return -EFAULT;
1294 return e1000_ethtool_sset(adapter, &ecmd);
1295 }
1296 case ETHTOOL_GDRVINFO: {
1297 struct ethtool_drvinfo drvinfo = {ETHTOOL_GDRVINFO};
1298 e1000_ethtool_gdrvinfo(adapter, &drvinfo);
1299 if(copy_to_user(addr, &drvinfo, sizeof(drvinfo)))
1300 return -EFAULT;
1301 return 0;
1302 }
1303 case ETHTOOL_GSTRINGS: {
1304 struct ethtool_gstrings gstrings = { ETHTOOL_GSTRINGS };
1305 char *strings = NULL;
1306 int err = 0;
1307
1308 if(copy_from_user(&gstrings, addr, sizeof(gstrings)))
1309 return -EFAULT;
1310 switch(gstrings.string_set) {
1311 case ETH_SS_TEST:
1312 gstrings.len = E1000_TEST_LEN;
1313 strings = kmalloc(E1000_TEST_LEN * ETH_GSTRING_LEN,
1314 GFP_KERNEL);
1315 if(!strings)
1316 return -ENOMEM;
1317 memcpy(strings, e1000_gstrings_test, E1000_TEST_LEN *
1318 ETH_GSTRING_LEN);
1319 break;
1320 case ETH_SS_STATS: {
1321 int i;
1322 gstrings.len = E1000_STATS_LEN;
1323 strings = kmalloc(E1000_STATS_LEN * ETH_GSTRING_LEN,
1324 GFP_KERNEL);
1325 if(!strings)
1326 return -ENOMEM;
1327 for(i=0; i < E1000_STATS_LEN; i++) {
1328 memcpy(&strings[i * ETH_GSTRING_LEN],
1329 e1000_gstrings_stats[i].stat_string,
1330 ETH_GSTRING_LEN);
1331 }
1332 break;
1333 }
1334 default:
1335 return -EOPNOTSUPP;
1336 }
1337 if(copy_to_user(addr, &gstrings, sizeof(gstrings)))
1338 err = -EFAULT;
1339 addr += offsetof(struct ethtool_gstrings, data);
1340 if(!err && copy_to_user(addr, strings,
1341 gstrings.len * ETH_GSTRING_LEN))
1342 err = -EFAULT;
1343
1344 kfree(strings);
1345 return err;
1346 }
1347 case ETHTOOL_GREGS: {
1348 struct ethtool_regs regs = {ETHTOOL_GREGS};
1349 uint32_t regs_buff[E1000_REGS_LEN];
1350
1351 if(copy_from_user(&regs, addr, sizeof(regs)))
1352 return -EFAULT;
1353 e1000_ethtool_gregs(adapter, &regs, regs_buff);
1354 if(copy_to_user(addr, &regs, sizeof(regs)))
1355 return -EFAULT;
1356
1357 addr += offsetof(struct ethtool_regs, data);
1358 if(copy_to_user(addr, regs_buff, regs.len))
1359 return -EFAULT;
1360
1361 return 0;
1362 }
1363 case ETHTOOL_NWAY_RST: {
1364 if(netif_running(netdev)) {
1365 e1000_down(adapter);
1366 e1000_up(adapter);
1367 }
1368 return 0;
1369 }
1370 case ETHTOOL_PHYS_ID: {
1371 struct ethtool_value id;
1372 if(copy_from_user(&id, addr, sizeof(id)))
1373 return -EFAULT;
1374 return e1000_ethtool_led_blink(adapter, &id);
1375 }
1376 case ETHTOOL_GLINK: {
1377 struct ethtool_value link = {ETHTOOL_GLINK};
1378 link.data = netif_carrier_ok(netdev);
1379 if(copy_to_user(addr, &link, sizeof(link)))
1380 return -EFAULT;
1381 return 0;
1382 }
1383 case ETHTOOL_GWOL: {
1384 struct ethtool_wolinfo wol = {ETHTOOL_GWOL};
1385 e1000_ethtool_gwol(adapter, &wol);
1386 if(copy_to_user(addr, &wol, sizeof(wol)) != 0)
1387 return -EFAULT;
1388 return 0;
1389 }
1390 case ETHTOOL_SWOL: {
1391 struct ethtool_wolinfo wol;
1392 if(copy_from_user(&wol, addr, sizeof(wol)) != 0)
1393 return -EFAULT;
1394 return e1000_ethtool_swol(adapter, &wol);
1395 }
1396 case ETHTOOL_GEEPROM: {
1397 struct ethtool_eeprom eeprom = {ETHTOOL_GEEPROM};
1398 struct e1000_hw *hw = &adapter->hw;
1399 uint16_t *eeprom_buff;
1400 void *ptr;
1401 int err = 0;
1402
1403 if(copy_from_user(&eeprom, addr, sizeof(eeprom)))
1404 return -EFAULT;
1405
1406 eeprom_buff = kmalloc(hw->eeprom.word_size * 2, GFP_KERNEL);
1407
1408 if(!eeprom_buff)
1409 return -ENOMEM;
1410
1411 if((err = e1000_ethtool_geeprom(adapter, &eeprom,
1412 eeprom_buff)))
1413 goto err_geeprom_ioctl;
1414
1415 if(copy_to_user(addr, &eeprom, sizeof(eeprom))) {
1416 err = -EFAULT;
1417 goto err_geeprom_ioctl;
1418 }
1419
1420 addr += offsetof(struct ethtool_eeprom, data);
1421 ptr = ((void *)eeprom_buff) + (eeprom.offset & 1);
1422
1423 if(copy_to_user(addr, ptr, eeprom.len))
1424 err = -EFAULT;
1425
1426 err_geeprom_ioctl:
1427 kfree(eeprom_buff);
1428 return err;
1429 }
1430 case ETHTOOL_SEEPROM: {
1431 struct ethtool_eeprom eeprom;
1432
1433 if(copy_from_user(&eeprom, addr, sizeof(eeprom)))
1434 return -EFAULT;
1435
1436 addr += offsetof(struct ethtool_eeprom, data);
1437 return e1000_ethtool_seeprom(adapter, &eeprom, addr);
1438 }
1439 case ETHTOOL_GSTATS: {
1440 struct {
1441 struct ethtool_stats eth_stats;
1442 uint64_t data[E1000_STATS_LEN];
1443 } stats = { {ETHTOOL_GSTATS, E1000_STATS_LEN} };
1444 int i;
1445
1446 for(i = 0; i < E1000_STATS_LEN; i++)
1447 stats.data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1448 sizeof(uint64_t)) ?
1449 *(uint64_t *)((char *)adapter +
1450 e1000_gstrings_stats[i].stat_offset) :
1451 *(uint32_t *)((char *)adapter +
1452 e1000_gstrings_stats[i].stat_offset);
1453 if(copy_to_user(addr, &stats, sizeof(stats)))
1454 return -EFAULT;
1455 return 0;
1456 }
1457 case ETHTOOL_TEST: {
1458 struct {
1459 struct ethtool_test eth_test;
1460 uint64_t data[E1000_TEST_LEN];
1461 } test = { {ETHTOOL_TEST} };
1462 int err;
1463
1464 if(copy_from_user(&test.eth_test, addr, sizeof(test.eth_test)))
1465 return -EFAULT;
1466
1467 test.eth_test.len = E1000_TEST_LEN;
1468
1469 if((err = e1000_ethtool_test(adapter, &test.eth_test,
1470 test.data)))
1471 return err;
1472
1473 if(copy_to_user(addr, &test, sizeof(test)) != 0)
1474 return -EFAULT;
1475 return 0;
1476 }
1477 default:
1478 return -EOPNOTSUPP;
1479 }
1480 }
1481
1482
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