Merge with Linux 2.5.74.
[linux-2.6/linux-mips.git] / drivers / net / acenic.c
blobc4334f8a68fb410f364f8e0548bf5089f42f6b4f
1 /*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * Additional credits:
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
44 * endian systems.
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
49 * driver init path.
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/config.h>
54 #include <linux/module.h>
55 #include <linux/version.h>
56 #include <linux/types.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/pci.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
66 #include <linux/mm.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
70 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
71 #include <linux/if_vlan.h>
72 #endif
74 #ifdef SIOCETHTOOL
75 #include <linux/ethtool.h>
76 #endif
78 #include <net/sock.h>
79 #include <net/ip.h>
81 #include <asm/system.h>
82 #include <asm/io.h>
83 #include <asm/irq.h>
84 #include <asm/byteorder.h>
85 #include <asm/uaccess.h>
88 #undef INDEX_DEBUG
90 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
91 #define ACE_IS_TIGON_I(ap) 0
92 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
93 #else
94 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
95 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
96 #endif
98 #ifndef PCI_VENDOR_ID_ALTEON
99 #define PCI_VENDOR_ID_ALTEON 0x12ae
100 #endif
101 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
102 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
103 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
104 #endif
105 #ifndef PCI_DEVICE_ID_3COM_3C985
106 #define PCI_DEVICE_ID_3COM_3C985 0x0001
107 #endif
108 #ifndef PCI_VENDOR_ID_NETGEAR
109 #define PCI_VENDOR_ID_NETGEAR 0x1385
110 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
111 #endif
112 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
113 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
114 #endif
118 * Farallon used the DEC vendor ID by mistake and they seem not
119 * to care - stinky!
121 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
122 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
123 #endif
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
125 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
126 #endif
127 #ifndef PCI_VENDOR_ID_SGI
128 #define PCI_VENDOR_ID_SGI 0x10a9
129 #endif
130 #ifndef PCI_DEVICE_ID_SGI_ACENIC
131 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
132 #endif
134 #if LINUX_VERSION_CODE >= 0x20400
135 static struct pci_device_id acenic_pci_tbl[] __initdata = {
136 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
137 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
138 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
143 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
145 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
147 * Farallon used the DEC vendor ID on their cards incorrectly,
148 * then later Alteon's ID.
150 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
151 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
152 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
153 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
154 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
155 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
158 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
159 #endif
162 #ifndef MODULE_LICENSE
163 #define MODULE_LICENSE(a)
164 #endif
166 #ifndef wmb
167 #define wmb() mb()
168 #endif
170 #ifndef __exit
171 #define __exit
172 #endif
174 #ifndef __devinit
175 #define __devinit __init
176 #endif
178 #ifndef SMP_CACHE_BYTES
179 #define SMP_CACHE_BYTES L1_CACHE_BYTES
180 #endif
182 #ifndef SET_MODULE_OWNER
183 #define SET_MODULE_OWNER(dev) do{} while(0)
184 #define ACE_MOD_INC_USE_COUNT MOD_INC_USE_COUNT
185 #define ACE_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT
186 #else
187 #define ACE_MOD_INC_USE_COUNT do{} while(0)
188 #define ACE_MOD_DEC_USE_COUNT do{} while(0)
189 #endif
191 #ifndef SET_NETDEV_DEV
192 #define SET_NETDEV_DEV(net, pdev) do{} while(0)
193 #endif
195 #if LINUX_VERSION_CODE >= 0x2051c
196 #define ace_sync_irq(irq) synchronize_irq(irq)
197 #else
198 #define ace_sync_irq(irq) synchronize_irq()
199 #endif
201 #if LINUX_VERSION_CODE < 0x2051e
202 #define local_irq_save(flags) do{__save_flags(flags) ; \
203 __cli();} while(0)
204 #define local_irq_restore(flags) __restore_flags(flags)
205 #endif
207 #if (LINUX_VERSION_CODE < 0x02030d)
208 #define pci_resource_start(dev, bar) dev->base_address[bar]
209 #elif (LINUX_VERSION_CODE < 0x02032c)
210 #define pci_resource_start(dev, bar) dev->resource[bar].start
211 #endif
213 #if (LINUX_VERSION_CODE < 0x02030e)
214 #define net_device device
215 #endif
218 #if (LINUX_VERSION_CODE < 0x02032a)
219 typedef u32 dma_addr_t;
221 static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
222 dma_addr_t *dma_handle)
224 void *virt_ptr;
226 virt_ptr = kmalloc(size, GFP_KERNEL);
227 if (!virt_ptr)
228 return NULL;
229 *dma_handle = virt_to_bus(virt_ptr);
230 return virt_ptr;
233 #define pci_free_consistent(cookie, size, ptr, dma_ptr) kfree(ptr)
234 #define pci_map_page(cookie, page, off, size, dir) \
235 virt_to_bus(page_address(page)+(off))
236 #define pci_unmap_page(cookie, address, size, dir)
237 #define pci_set_dma_mask(dev, mask) \
238 (((u64)(mask) & 0xffffffff00000000) == 0 ? 0 : -EIO)
239 #define pci_dma_supported(dev, mask) \
240 (((u64)(mask) & 0xffffffff00000000) == 0 ? 1 : 0)
242 #elif (LINUX_VERSION_CODE < 0x02040d)
245 * 2.4.13 introduced pci_map_page()/pci_unmap_page() - for 2.4.12 and prior,
246 * fall back on pci_map_single()/pci_unnmap_single().
248 * We are guaranteed that the page is mapped at this point since
249 * pci_map_page() is only used upon valid struct skb's.
251 static inline dma_addr_t
252 pci_map_page(struct pci_dev *cookie, struct page *page, unsigned long off,
253 size_t size, int dir)
255 void *page_virt;
257 page_virt = page_address(page);
258 if (!page_virt)
259 BUG();
260 return pci_map_single(cookie, (page_virt + off), size, dir);
262 #define pci_unmap_page(cookie, dma_addr, size, dir) \
263 pci_unmap_single(cookie, dma_addr, size, dir)
264 #endif
266 #if (LINUX_VERSION_CODE < 0x020412)
267 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
268 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
269 #define pci_unmap_addr(PTR, ADDR_NAME) 0
270 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do{} while(0)
271 #define pci_unmap_len(PTR, LEN_NAME) 0
272 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do{} while(0)
273 #endif
276 #if (LINUX_VERSION_CODE < 0x02032b)
278 * SoftNet
280 * For pre-softnet kernels we need to tell the upper layer not to
281 * re-enter start_xmit() while we are in there. However softnet
282 * guarantees not to enter while we are in there so there is no need
283 * to do the netif_stop_queue() dance unless the transmit queue really
284 * gets stuck. This should also improve performance according to tests
285 * done by Aman Singla.
287 #define dev_kfree_skb_irq(a) dev_kfree_skb(a)
288 #define netif_wake_queue(dev) clear_bit(0, &dev->tbusy)
289 #define netif_stop_queue(dev) set_bit(0, &dev->tbusy)
290 #define late_stop_netif_stop_queue(dev) do{} while(0)
291 #define early_stop_netif_stop_queue(dev) test_and_set_bit(0,&dev->tbusy)
292 #define early_stop_netif_wake_queue(dev) netif_wake_queue(dev)
294 static inline void netif_start_queue(struct net_device *dev)
296 dev->tbusy = 0;
297 dev->interrupt = 0;
298 dev->start = 1;
301 #define ace_mark_net_bh() mark_bh(NET_BH)
302 #define netif_queue_stopped(dev) dev->tbusy
303 #define netif_running(dev) dev->start
304 #define ace_if_down(dev) do{dev->start = 0;} while(0)
306 #define tasklet_struct tq_struct
307 static inline void tasklet_schedule(struct tasklet_struct *tasklet)
309 queue_task(tasklet, &tq_immediate);
310 mark_bh(IMMEDIATE_BH);
313 static inline void tasklet_init(struct tasklet_struct *tasklet,
314 void (*func)(unsigned long),
315 unsigned long data)
317 tasklet->next = NULL;
318 tasklet->sync = 0;
319 tasklet->routine = (void (*)(void *))func;
320 tasklet->data = (void *)data;
322 #define tasklet_kill(tasklet) do{} while(0)
323 #else
324 #define late_stop_netif_stop_queue(dev) netif_stop_queue(dev)
325 #define early_stop_netif_stop_queue(dev) 0
326 #define early_stop_netif_wake_queue(dev) do{} while(0)
327 #define ace_mark_net_bh() do{} while(0)
328 #define ace_if_down(dev) do{} while(0)
329 #endif
331 #if (LINUX_VERSION_CODE >= 0x02031b)
332 #define NEW_NETINIT
333 #define ACE_PROBE_ARG void
334 #else
335 #define ACE_PROBE_ARG struct net_device *dev
336 #endif
338 #ifndef min_t
339 #define min_t(type,a,b) (((a)<(b))?(a):(b))
340 #endif
342 #ifndef ARCH_HAS_PREFETCHW
343 #ifndef prefetchw
344 #define prefetchw(x) do{} while(0)
345 #endif
346 #endif
348 #define ACE_MAX_MOD_PARMS 8
349 #define BOARD_IDX_STATIC 0
350 #define BOARD_IDX_OVERFLOW -1
352 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
353 defined(NETIF_F_HW_VLAN_RX)
354 #define ACENIC_DO_VLAN 1
355 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
356 #else
357 #define ACENIC_DO_VLAN 0
358 #define ACE_RCB_VLAN_FLAG 0
359 #endif
361 #include "acenic.h"
364 * These must be defined before the firmware is included.
366 #define MAX_TEXT_LEN 96*1024
367 #define MAX_RODATA_LEN 8*1024
368 #define MAX_DATA_LEN 2*1024
370 #include "acenic_firmware.h"
372 #ifndef tigon2FwReleaseLocal
373 #define tigon2FwReleaseLocal 0
374 #endif
377 * This driver currently supports Tigon I and Tigon II based cards
378 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
379 * GA620. The driver should also work on the SGI, DEC and Farallon
380 * versions of the card, however I have not been able to test that
381 * myself.
383 * This card is really neat, it supports receive hardware checksumming
384 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
385 * firmware. Also the programming interface is quite neat, except for
386 * the parts dealing with the i2c eeprom on the card ;-)
388 * Using jumbo frames:
390 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
391 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
392 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
393 * interface number and <MTU> being the MTU value.
395 * Module parameters:
397 * When compiled as a loadable module, the driver allows for a number
398 * of module parameters to be specified. The driver supports the
399 * following module parameters:
401 * trace=<val> - Firmware trace level. This requires special traced
402 * firmware to replace the firmware supplied with
403 * the driver - for debugging purposes only.
405 * link=<val> - Link state. Normally you want to use the default link
406 * parameters set by the driver. This can be used to
407 * override these in case your switch doesn't negotiate
408 * the link properly. Valid values are:
409 * 0x0001 - Force half duplex link.
410 * 0x0002 - Do not negotiate line speed with the other end.
411 * 0x0010 - 10Mbit/sec link.
412 * 0x0020 - 100Mbit/sec link.
413 * 0x0040 - 1000Mbit/sec link.
414 * 0x0100 - Do not negotiate flow control.
415 * 0x0200 - Enable RX flow control Y
416 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
417 * Default value is 0x0270, ie. enable link+flow
418 * control negotiation. Negotiating the highest
419 * possible link speed with RX flow control enabled.
421 * When disabling link speed negotiation, only one link
422 * speed is allowed to be specified!
424 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
425 * to wait for more packets to arive before
426 * interrupting the host, from the time the first
427 * packet arrives.
429 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
430 * to wait for more packets to arive in the transmit ring,
431 * before interrupting the host, after transmitting the
432 * first packet in the ring.
434 * max_tx_desc=<val> - maximum number of transmit descriptors
435 * (packets) transmitted before interrupting the host.
437 * max_rx_desc=<val> - maximum number of receive descriptors
438 * (packets) received before interrupting the host.
440 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
441 * increments of the NIC's on board memory to be used for
442 * transmit and receive buffers. For the 1MB NIC app. 800KB
443 * is available, on the 1/2MB NIC app. 300KB is available.
444 * 68KB will always be available as a minimum for both
445 * directions. The default value is a 50/50 split.
446 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
447 * operations, default (1) is to always disable this as
448 * that is what Alteon does on NT. I have not been able
449 * to measure any real performance differences with
450 * this on my systems. Set <val>=0 if you want to
451 * enable these operations.
453 * If you use more than one NIC, specify the parameters for the
454 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
455 * run tracing on NIC #2 but not on NIC #1 and #3.
457 * TODO:
459 * - Proper multicast support.
460 * - NIC dump support.
461 * - More tuning parameters.
463 * The mini ring is not used under Linux and I am not sure it makes sense
464 * to actually use it.
466 * New interrupt handler strategy:
468 * The old interrupt handler worked using the traditional method of
469 * replacing an skbuff with a new one when a packet arrives. However
470 * the rx rings do not need to contain a static number of buffer
471 * descriptors, thus it makes sense to move the memory allocation out
472 * of the main interrupt handler and do it in a bottom half handler
473 * and only allocate new buffers when the number of buffers in the
474 * ring is below a certain threshold. In order to avoid starving the
475 * NIC under heavy load it is however necessary to force allocation
476 * when hitting a minimum threshold. The strategy for alloction is as
477 * follows:
479 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
480 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
481 * the buffers in the interrupt handler
482 * RX_RING_THRES - maximum number of buffers in the rx ring
483 * RX_MINI_THRES - maximum number of buffers in the mini ring
484 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
486 * One advantagous side effect of this allocation approach is that the
487 * entire rx processing can be done without holding any spin lock
488 * since the rx rings and registers are totally independent of the tx
489 * ring and its registers. This of course includes the kmalloc's of
490 * new skb's. Thus start_xmit can run in parallel with rx processing
491 * and the memory allocation on SMP systems.
493 * Note that running the skb reallocation in a bottom half opens up
494 * another can of races which needs to be handled properly. In
495 * particular it can happen that the interrupt handler tries to run
496 * the reallocation while the bottom half is either running on another
497 * CPU or was interrupted on the same CPU. To get around this the
498 * driver uses bitops to prevent the reallocation routines from being
499 * reentered.
501 * TX handling can also be done without holding any spin lock, wheee
502 * this is fun! since tx_ret_csm is only written to by the interrupt
503 * handler. The case to be aware of is when shutting down the device
504 * and cleaning up where it is necessary to make sure that
505 * start_xmit() is not running while this is happening. Well DaveM
506 * informs me that this case is already protected against ... bye bye
507 * Mr. Spin Lock, it was nice to know you.
509 * TX interrupts are now partly disabled so the NIC will only generate
510 * TX interrupts for the number of coal ticks, not for the number of
511 * TX packets in the queue. This should reduce the number of TX only,
512 * ie. when no RX processing is done, interrupts seen.
516 * Threshold values for RX buffer allocation - the low water marks for
517 * when to start refilling the rings are set to 75% of the ring
518 * sizes. It seems to make sense to refill the rings entirely from the
519 * intrrupt handler once it gets below the panic threshold, that way
520 * we don't risk that the refilling is moved to another CPU when the
521 * one running the interrupt handler just got the slab code hot in its
522 * cache.
524 #define RX_RING_SIZE 72
525 #define RX_MINI_SIZE 64
526 #define RX_JUMBO_SIZE 48
528 #define RX_PANIC_STD_THRES 16
529 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
530 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
531 #define RX_PANIC_MINI_THRES 12
532 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
533 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
534 #define RX_PANIC_JUMBO_THRES 6
535 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
536 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
540 * Size of the mini ring entries, basically these just should be big
541 * enough to take TCP ACKs
543 #define ACE_MINI_SIZE 100
545 #define ACE_MINI_BUFSIZE (ACE_MINI_SIZE + 2 + 16)
546 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 2+4+16)
547 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 2+4+16)
550 * There seems to be a magic difference in the effect between 995 and 996
551 * but little difference between 900 and 995 ... no idea why.
553 * There is now a default set of tuning parameters which is set, depending
554 * on whether or not the user enables Jumbo frames. It's assumed that if
555 * Jumbo frames are enabled, the user wants optimal tuning for that case.
557 #define DEF_TX_COAL 400 /* 996 */
558 #define DEF_TX_MAX_DESC 60 /* was 40 */
559 #define DEF_RX_COAL 120 /* 1000 */
560 #define DEF_RX_MAX_DESC 25
561 #define DEF_TX_RATIO 21 /* 24 */
563 #define DEF_JUMBO_TX_COAL 20
564 #define DEF_JUMBO_TX_MAX_DESC 60
565 #define DEF_JUMBO_RX_COAL 30
566 #define DEF_JUMBO_RX_MAX_DESC 6
567 #define DEF_JUMBO_TX_RATIO 21
569 #if tigon2FwReleaseLocal < 20001118
571 * Standard firmware and early modifications duplicate
572 * IRQ load without this flag (coal timer is never reset).
573 * Note that with this flag tx_coal should be less than
574 * time to xmit full tx ring.
575 * 400usec is not so bad for tx ring size of 128.
577 #define TX_COAL_INTS_ONLY 1 /* worth it */
578 #else
580 * With modified firmware, this is not necessary, but still useful.
582 #define TX_COAL_INTS_ONLY 1
583 #endif
585 #define DEF_TRACE 0
586 #define DEF_STAT (2 * TICKS_PER_SEC)
589 static int link[ACE_MAX_MOD_PARMS];
590 static int trace[ACE_MAX_MOD_PARMS];
591 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
592 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
593 static int max_tx_desc[ACE_MAX_MOD_PARMS];
594 static int max_rx_desc[ACE_MAX_MOD_PARMS];
595 static int tx_ratio[ACE_MAX_MOD_PARMS];
596 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
598 static char version[] __initdata =
599 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
600 " http://home.cern.ch/~jes/gige/acenic.html\n";
602 static struct net_device *root_dev;
604 static int probed __initdata = 0;
607 int __devinit acenic_probe (ACE_PROBE_ARG)
609 #ifdef NEW_NETINIT
610 struct net_device *dev;
611 #endif
612 struct ace_private *ap;
613 struct pci_dev *pdev = NULL;
614 int boards_found = 0;
615 int version_disp;
617 if (probed)
618 return -ENODEV;
619 probed++;
621 version_disp = 0;
623 while ((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET<<8, pdev))) {
625 if (!((pdev->vendor == PCI_VENDOR_ID_ALTEON) &&
626 ((pdev->device == PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE) ||
627 (pdev->device == PCI_DEVICE_ID_ALTEON_ACENIC_COPPER)))&&
628 !((pdev->vendor == PCI_VENDOR_ID_3COM) &&
629 (pdev->device == PCI_DEVICE_ID_3COM_3C985)) &&
630 !((pdev->vendor == PCI_VENDOR_ID_NETGEAR) &&
631 ((pdev->device == PCI_DEVICE_ID_NETGEAR_GA620) ||
632 (pdev->device == PCI_DEVICE_ID_NETGEAR_GA620T))) &&
634 * Farallon used the DEC vendor ID on their cards by
635 * mistake for a while
637 !((pdev->vendor == PCI_VENDOR_ID_DEC) &&
638 (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX)) &&
639 !((pdev->vendor == PCI_VENDOR_ID_ALTEON) &&
640 (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T)) &&
641 !((pdev->vendor == PCI_VENDOR_ID_SGI) &&
642 (pdev->device == PCI_DEVICE_ID_SGI_ACENIC)))
643 continue;
645 dev = alloc_etherdev(sizeof(struct ace_private));
646 if (dev == NULL) {
647 printk(KERN_ERR "acenic: Unable to allocate "
648 "net_device structure!\n");
649 break;
652 SET_MODULE_OWNER(dev);
653 SET_NETDEV_DEV(dev, &pdev->dev);
655 ap = dev->priv;
656 ap->pdev = pdev;
658 dev->open = &ace_open;
659 dev->hard_start_xmit = &ace_start_xmit;
660 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
661 #if ACENIC_DO_VLAN
662 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
663 dev->vlan_rx_register = ace_vlan_rx_register;
664 dev->vlan_rx_kill_vid = ace_vlan_rx_kill_vid;
665 #endif
666 if (1) {
667 static void ace_watchdog(struct net_device *dev);
668 dev->tx_timeout = &ace_watchdog;
669 dev->watchdog_timeo = 5*HZ;
671 dev->stop = &ace_close;
672 dev->get_stats = &ace_get_stats;
673 dev->set_multicast_list = &ace_set_multicast_list;
674 dev->do_ioctl = &ace_ioctl;
675 dev->set_mac_address = &ace_set_mac_addr;
676 dev->change_mtu = &ace_change_mtu;
678 /* display version info if adapter is found */
679 if (!version_disp)
681 /* set display flag to TRUE so that */
682 /* we only display this string ONCE */
683 version_disp = 1;
684 printk(version);
687 if (pci_enable_device(pdev)) {
688 kfree(dev);
689 continue;
693 * Enable master mode before we start playing with the
694 * pci_command word since pci_set_master() will modify
695 * it.
697 pci_set_master(pdev);
699 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
701 /* OpenFirmware on Mac's does not set this - DOH.. */
702 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
703 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
704 "access - was not enabled by BIOS/Firmware\n",
705 dev->name);
706 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
707 pci_write_config_word(ap->pdev, PCI_COMMAND,
708 ap->pci_command);
709 wmb();
712 pci_read_config_byte(pdev, PCI_LATENCY_TIMER,
713 &ap->pci_latency);
714 if (ap->pci_latency <= 0x40) {
715 ap->pci_latency = 0x40;
716 pci_write_config_byte(pdev, PCI_LATENCY_TIMER,
717 ap->pci_latency);
721 * Remap the regs into kernel space - this is abuse of
722 * dev->base_addr since it was means for I/O port
723 * addresses but who gives a damn.
725 dev->base_addr = pci_resource_start(pdev, 0);
726 ap->regs = (struct ace_regs *)ioremap(dev->base_addr, 0x4000);
727 if (!ap->regs) {
728 printk(KERN_ERR "%s: Unable to map I/O register, "
729 "AceNIC %i will be disabled.\n",
730 dev->name, boards_found);
731 break;
734 if (register_netdev(dev)) {
735 printk(KERN_ERR "acenic: device registration failed\n");
736 kfree(dev);
737 continue;
740 switch(pdev->vendor) {
741 case PCI_VENDOR_ID_ALTEON:
742 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
743 strncpy(ap->name, "Farallon PN9100-T "
744 "Gigabit Ethernet", sizeof (ap->name));
745 printk(KERN_INFO "%s: Farallon PN9100-T ",
746 dev->name);
747 } else {
748 strncpy(ap->name, "AceNIC Gigabit Ethernet",
749 sizeof (ap->name));
750 printk(KERN_INFO "%s: Alteon AceNIC ",
751 dev->name);
753 break;
754 case PCI_VENDOR_ID_3COM:
755 strncpy(ap->name, "3Com 3C985 Gigabit Ethernet",
756 sizeof (ap->name));
757 printk(KERN_INFO "%s: 3Com 3C985 ", dev->name);
758 break;
759 case PCI_VENDOR_ID_NETGEAR:
760 strncpy(ap->name, "NetGear GA620 Gigabit Ethernet",
761 sizeof (ap->name));
762 printk(KERN_INFO "%s: NetGear GA620 ", dev->name);
763 break;
764 case PCI_VENDOR_ID_DEC:
765 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
766 strncpy(ap->name, "Farallon PN9000-SX "
767 "Gigabit Ethernet", sizeof (ap->name));
768 printk(KERN_INFO "%s: Farallon PN9000-SX ",
769 dev->name);
770 break;
772 case PCI_VENDOR_ID_SGI:
773 strncpy(ap->name, "SGI AceNIC Gigabit Ethernet",
774 sizeof (ap->name));
775 printk(KERN_INFO "%s: SGI AceNIC ", dev->name);
776 break;
777 default:
778 strncpy(ap->name, "Unknown AceNIC based Gigabit "
779 "Ethernet", sizeof (ap->name));
780 printk(KERN_INFO "%s: Unknown AceNIC ", dev->name);
781 break;
783 ap->name [sizeof (ap->name) - 1] = '\0';
784 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
785 #ifdef __sparc__
786 printk("irq %s\n", __irq_itoa(pdev->irq));
787 #else
788 printk("irq %i\n", pdev->irq);
789 #endif
791 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
792 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
793 printk(KERN_ERR "%s: Driver compiled without Tigon I"
794 " support - NIC disabled\n", dev->name);
795 ace_init_cleanup(dev);
796 kfree(dev);
797 continue;
799 #endif
801 if (ace_allocate_descriptors(dev)) {
803 * ace_allocate_descriptors() calls
804 * ace_init_cleanup() on error.
806 kfree(dev);
807 continue;
810 #ifdef MODULE
811 if (boards_found >= ACE_MAX_MOD_PARMS)
812 ap->board_idx = BOARD_IDX_OVERFLOW;
813 else
814 ap->board_idx = boards_found;
815 #else
816 ap->board_idx = BOARD_IDX_STATIC;
817 #endif
819 if (ace_init(dev)) {
821 * ace_init() calls ace_init_cleanup() on error.
823 kfree(dev);
824 continue;
827 if (ap->pci_using_dac)
828 dev->features |= NETIF_F_HIGHDMA;
830 boards_found++;
834 * If we're at this point we're going through ace_probe() for
835 * the first time. Return success (0) if we've initialized 1
836 * or more boards. Otherwise, return failure (-ENODEV).
839 if (boards_found > 0)
840 return 0;
841 else
842 return -ENODEV;
846 #ifdef MODULE
847 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
848 MODULE_LICENSE("GPL");
849 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
850 MODULE_PARM(link, "1-" __MODULE_STRING(8) "i");
851 MODULE_PARM(trace, "1-" __MODULE_STRING(8) "i");
852 MODULE_PARM(tx_coal_tick, "1-" __MODULE_STRING(8) "i");
853 MODULE_PARM(max_tx_desc, "1-" __MODULE_STRING(8) "i");
854 MODULE_PARM(rx_coal_tick, "1-" __MODULE_STRING(8) "i");
855 MODULE_PARM(max_rx_desc, "1-" __MODULE_STRING(8) "i");
856 MODULE_PARM(tx_ratio, "1-" __MODULE_STRING(8) "i");
857 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
858 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
859 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
860 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
861 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
862 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
863 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
864 #endif
867 static void __exit ace_module_cleanup(void)
869 struct ace_private *ap;
870 struct ace_regs *regs;
871 struct net_device *next;
872 short i;
874 while (root_dev) {
875 ap = root_dev->priv;
876 next = ap->next;
878 regs = ap->regs;
880 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
881 if (ap->version >= 2)
882 writel(readl(&regs->CpuBCtrl) | CPU_HALT,
883 &regs->CpuBCtrl);
885 * This clears any pending interrupts
887 writel(1, &regs->Mb0Lo);
888 readl(&regs->CpuCtrl); /* flush */
891 * Make sure no other CPUs are processing interrupts
892 * on the card before the buffers are being released.
893 * Otherwise one might experience some `interesting'
894 * effects.
896 * Then release the RX buffers - jumbo buffers were
897 * already released in ace_close().
899 ace_sync_irq(root_dev->irq);
901 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
902 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
904 if (skb) {
905 struct ring_info *ringp;
906 dma_addr_t mapping;
908 ringp = &ap->skb->rx_std_skbuff[i];
909 mapping = pci_unmap_addr(ringp, mapping);
910 pci_unmap_page(ap->pdev, mapping,
911 ACE_STD_BUFSIZE - (2 + 16),
912 PCI_DMA_FROMDEVICE);
914 ap->rx_std_ring[i].size = 0;
915 ap->skb->rx_std_skbuff[i].skb = NULL;
916 dev_kfree_skb(skb);
919 if (ap->version >= 2) {
920 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
921 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
923 if (skb) {
924 struct ring_info *ringp;
925 dma_addr_t mapping;
927 ringp = &ap->skb->rx_mini_skbuff[i];
928 mapping = pci_unmap_addr(ringp,mapping);
929 pci_unmap_page(ap->pdev, mapping,
930 ACE_MINI_BUFSIZE - (2 + 16),
931 PCI_DMA_FROMDEVICE);
933 ap->rx_mini_ring[i].size = 0;
934 ap->skb->rx_mini_skbuff[i].skb = NULL;
935 dev_kfree_skb(skb);
939 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
940 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
941 if (skb) {
942 struct ring_info *ringp;
943 dma_addr_t mapping;
945 ringp = &ap->skb->rx_jumbo_skbuff[i];
946 mapping = pci_unmap_addr(ringp, mapping);
947 pci_unmap_page(ap->pdev, mapping,
948 ACE_JUMBO_BUFSIZE - (2 + 16),
949 PCI_DMA_FROMDEVICE);
951 ap->rx_jumbo_ring[i].size = 0;
952 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
953 dev_kfree_skb(skb);
957 ace_init_cleanup(root_dev);
958 kfree(root_dev);
959 root_dev = next;
964 int __init ace_module_init(void)
966 int status;
968 root_dev = NULL;
970 #ifdef NEW_NETINIT
971 status = acenic_probe();
972 #else
973 status = acenic_probe(NULL);
974 #endif
975 return status;
979 #if (LINUX_VERSION_CODE < 0x02032a)
980 #ifdef MODULE
981 int init_module(void)
983 return ace_module_init();
987 void cleanup_module(void)
989 ace_module_cleanup();
991 #endif
992 #else
993 module_init(ace_module_init);
994 module_exit(ace_module_cleanup);
995 #endif
998 static void ace_free_descriptors(struct net_device *dev)
1000 struct ace_private *ap = dev->priv;
1001 int size;
1003 if (ap->rx_std_ring != NULL) {
1004 size = (sizeof(struct rx_desc) *
1005 (RX_STD_RING_ENTRIES +
1006 RX_JUMBO_RING_ENTRIES +
1007 RX_MINI_RING_ENTRIES +
1008 RX_RETURN_RING_ENTRIES));
1009 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
1010 ap->rx_ring_base_dma);
1011 ap->rx_std_ring = NULL;
1012 ap->rx_jumbo_ring = NULL;
1013 ap->rx_mini_ring = NULL;
1014 ap->rx_return_ring = NULL;
1016 if (ap->evt_ring != NULL) {
1017 size = (sizeof(struct event) * EVT_RING_ENTRIES);
1018 pci_free_consistent(ap->pdev, size, ap->evt_ring,
1019 ap->evt_ring_dma);
1020 ap->evt_ring = NULL;
1022 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
1023 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
1024 pci_free_consistent(ap->pdev, size, ap->tx_ring,
1025 ap->tx_ring_dma);
1027 ap->tx_ring = NULL;
1029 if (ap->evt_prd != NULL) {
1030 pci_free_consistent(ap->pdev, sizeof(u32),
1031 (void *)ap->evt_prd, ap->evt_prd_dma);
1032 ap->evt_prd = NULL;
1034 if (ap->rx_ret_prd != NULL) {
1035 pci_free_consistent(ap->pdev, sizeof(u32),
1036 (void *)ap->rx_ret_prd,
1037 ap->rx_ret_prd_dma);
1038 ap->rx_ret_prd = NULL;
1040 if (ap->tx_csm != NULL) {
1041 pci_free_consistent(ap->pdev, sizeof(u32),
1042 (void *)ap->tx_csm, ap->tx_csm_dma);
1043 ap->tx_csm = NULL;
1048 static int ace_allocate_descriptors(struct net_device *dev)
1050 struct ace_private *ap = dev->priv;
1051 int size;
1053 size = (sizeof(struct rx_desc) *
1054 (RX_STD_RING_ENTRIES +
1055 RX_JUMBO_RING_ENTRIES +
1056 RX_MINI_RING_ENTRIES +
1057 RX_RETURN_RING_ENTRIES));
1059 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
1060 &ap->rx_ring_base_dma);
1061 if (ap->rx_std_ring == NULL)
1062 goto fail;
1064 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
1065 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
1066 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
1068 size = (sizeof(struct event) * EVT_RING_ENTRIES);
1070 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
1072 if (ap->evt_ring == NULL)
1073 goto fail;
1076 * Only allocate a host TX ring for the Tigon II, the Tigon I
1077 * has to use PCI registers for this ;-(
1079 if (!ACE_IS_TIGON_I(ap)) {
1080 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
1082 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
1083 &ap->tx_ring_dma);
1085 if (ap->tx_ring == NULL)
1086 goto fail;
1089 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
1090 &ap->evt_prd_dma);
1091 if (ap->evt_prd == NULL)
1092 goto fail;
1094 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
1095 &ap->rx_ret_prd_dma);
1096 if (ap->rx_ret_prd == NULL)
1097 goto fail;
1099 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
1100 &ap->tx_csm_dma);
1101 if (ap->tx_csm == NULL)
1102 goto fail;
1104 return 0;
1106 fail:
1107 /* Clean up. */
1108 ace_init_cleanup(dev);
1109 return 1;
1114 * Generic cleanup handling data allocated during init. Used when the
1115 * module is unloaded or if an error occurs during initialization
1117 static void ace_init_cleanup(struct net_device *dev)
1119 struct ace_private *ap;
1121 ap = dev->priv;
1123 ace_free_descriptors(dev);
1125 if (ap->info)
1126 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
1127 ap->info, ap->info_dma);
1128 if (ap->skb)
1129 kfree(ap->skb);
1130 if (ap->trace_buf)
1131 kfree(ap->trace_buf);
1133 if (dev->irq)
1134 free_irq(dev->irq, dev);
1136 unregister_netdev(dev);
1137 iounmap(ap->regs);
1142 * Commands are considered to be slow.
1144 static inline void ace_issue_cmd(struct ace_regs *regs, struct cmd *cmd)
1146 u32 idx;
1148 idx = readl(&regs->CmdPrd);
1150 writel(*(u32 *)(cmd), &regs->CmdRng[idx]);
1151 idx = (idx + 1) % CMD_RING_ENTRIES;
1153 writel(idx, &regs->CmdPrd);
1157 static int __init ace_init(struct net_device *dev)
1159 struct ace_private *ap;
1160 struct ace_regs *regs;
1161 struct ace_info *info = NULL;
1162 struct pci_dev *pdev;
1163 unsigned long myjif;
1164 u64 tmp_ptr;
1165 u32 tig_ver, mac1, mac2, tmp, pci_state;
1166 int board_idx, ecode = 0;
1167 short i;
1168 unsigned char cache_size;
1170 ap = dev->priv;
1171 regs = ap->regs;
1173 board_idx = ap->board_idx;
1176 * aman@sgi.com - its useful to do a NIC reset here to
1177 * address the `Firmware not running' problem subsequent
1178 * to any crashes involving the NIC
1180 writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);
1181 readl(&regs->HostCtrl); /* PCI write posting */
1182 udelay(5);
1185 * Don't access any other registers before this point!
1187 #ifdef __BIG_ENDIAN
1189 * This will most likely need BYTE_SWAP once we switch
1190 * to using __raw_writel()
1192 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
1193 &regs->HostCtrl);
1194 #else
1195 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
1196 &regs->HostCtrl);
1197 #endif
1198 readl(&regs->HostCtrl); /* PCI write posting */
1201 * Stop the NIC CPU and clear pending interrupts
1203 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
1204 readl(&regs->CpuCtrl); /* PCI write posting */
1205 writel(0, &regs->Mb0Lo);
1207 tig_ver = readl(&regs->HostCtrl) >> 28;
1209 switch(tig_ver){
1210 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
1211 case 4:
1212 printk(KERN_INFO " Tigon I (Rev. 4), Firmware: %i.%i.%i, ",
1213 tigonFwReleaseMajor, tigonFwReleaseMinor,
1214 tigonFwReleaseFix);
1215 writel(0, &regs->LocalCtrl);
1216 ap->version = 1;
1217 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
1218 break;
1219 #endif
1220 case 6:
1221 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
1222 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
1223 tigon2FwReleaseFix);
1224 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
1225 readl(&regs->CpuBCtrl); /* PCI write posting */
1227 * The SRAM bank size does _not_ indicate the amount
1228 * of memory on the card, it controls the _bank_ size!
1229 * Ie. a 1MB AceNIC will have two banks of 512KB.
1231 writel(SRAM_BANK_512K, &regs->LocalCtrl);
1232 writel(SYNC_SRAM_TIMING, &regs->MiscCfg);
1233 ap->version = 2;
1234 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
1235 break;
1236 default:
1237 printk(KERN_WARNING " Unsupported Tigon version detected "
1238 "(%i), ", tig_ver);
1239 ecode = -ENODEV;
1240 goto init_error;
1244 * ModeStat _must_ be set after the SRAM settings as this change
1245 * seems to corrupt the ModeStat and possible other registers.
1246 * The SRAM settings survive resets and setting it to the same
1247 * value a second time works as well. This is what caused the
1248 * `Firmware not running' problem on the Tigon II.
1250 #ifdef __BIG_ENDIAN
1251 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
1252 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
1253 #else
1254 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
1255 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
1256 #endif
1257 readl(&regs->ModeStat); /* PCI write posting */
1259 mac1 = 0;
1260 for(i = 0; i < 4; i++) {
1261 mac1 = mac1 << 8;
1262 tmp = read_eeprom_byte(dev, 0x8c+i);
1263 if (tmp < 0) {
1264 ecode = -EIO;
1265 goto init_error;
1266 } else
1267 mac1 |= (tmp & 0xff);
1269 mac2 = 0;
1270 for(i = 4; i < 8; i++) {
1271 mac2 = mac2 << 8;
1272 tmp = read_eeprom_byte(dev, 0x8c+i);
1273 if (tmp < 0) {
1274 ecode = -EIO;
1275 goto init_error;
1276 } else
1277 mac2 |= (tmp & 0xff);
1280 writel(mac1, &regs->MacAddrHi);
1281 writel(mac2, &regs->MacAddrLo);
1283 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1284 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1285 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1287 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1288 dev->dev_addr[1] = mac1 & 0xff;
1289 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1290 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1291 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1292 dev->dev_addr[5] = mac2 & 0xff;
1295 * Looks like this is necessary to deal with on all architectures,
1296 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1297 * Ie. having two NICs in the machine, one will have the cache
1298 * line set at boot time, the other will not.
1300 pdev = ap->pdev;
1301 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1302 cache_size <<= 2;
1303 if (cache_size != SMP_CACHE_BYTES) {
1304 printk(KERN_INFO " PCI cache line size set incorrectly "
1305 "(%i bytes) by BIOS/FW, ", cache_size);
1306 if (cache_size > SMP_CACHE_BYTES)
1307 printk("expecting %i\n", SMP_CACHE_BYTES);
1308 else {
1309 printk("correcting to %i\n", SMP_CACHE_BYTES);
1310 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1311 SMP_CACHE_BYTES >> 2);
1315 pci_state = readl(&regs->PciState);
1316 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1317 "latency: %i clks\n",
1318 (pci_state & PCI_32BIT) ? 32 : 64,
1319 (pci_state & PCI_66MHZ) ? 66 : 33,
1320 ap->pci_latency);
1323 * Set the max DMA transfer size. Seems that for most systems
1324 * the performance is better when no MAX parameter is
1325 * set. However for systems enabling PCI write and invalidate,
1326 * DMA writes must be set to the L1 cache line size to get
1327 * optimal performance.
1329 * The default is now to turn the PCI write and invalidate off
1330 * - that is what Alteon does for NT.
1332 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1333 if (ap->version >= 2) {
1334 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1336 * Tuning parameters only supported for 8 cards
1338 if (board_idx == BOARD_IDX_OVERFLOW ||
1339 dis_pci_mem_inval[board_idx]) {
1340 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1341 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1342 pci_write_config_word(pdev, PCI_COMMAND,
1343 ap->pci_command);
1344 printk(KERN_INFO " Disabling PCI memory "
1345 "write and invalidate\n");
1347 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1348 printk(KERN_INFO " PCI memory write & invalidate "
1349 "enabled by BIOS, enabling counter measures\n");
1351 switch(SMP_CACHE_BYTES) {
1352 case 16:
1353 tmp |= DMA_WRITE_MAX_16;
1354 break;
1355 case 32:
1356 tmp |= DMA_WRITE_MAX_32;
1357 break;
1358 case 64:
1359 tmp |= DMA_WRITE_MAX_64;
1360 break;
1361 case 128:
1362 tmp |= DMA_WRITE_MAX_128;
1363 break;
1364 default:
1365 printk(KERN_INFO " Cache line size %i not "
1366 "supported, PCI write and invalidate "
1367 "disabled\n", SMP_CACHE_BYTES);
1368 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1369 pci_write_config_word(pdev, PCI_COMMAND,
1370 ap->pci_command);
1375 #ifdef __sparc__
1377 * On this platform, we know what the best dma settings
1378 * are. We use 64-byte maximum bursts, because if we
1379 * burst larger than the cache line size (or even cross
1380 * a 64byte boundary in a single burst) the UltraSparc
1381 * PCI controller will disconnect at 64-byte multiples.
1383 * Read-multiple will be properly enabled above, and when
1384 * set will give the PCI controller proper hints about
1385 * prefetching.
1387 tmp &= ~DMA_READ_WRITE_MASK;
1388 tmp |= DMA_READ_MAX_64;
1389 tmp |= DMA_WRITE_MAX_64;
1390 #endif
1391 #ifdef __alpha__
1392 tmp &= ~DMA_READ_WRITE_MASK;
1393 tmp |= DMA_READ_MAX_128;
1395 * All the docs say MUST NOT. Well, I did.
1396 * Nothing terrible happens, if we load wrong size.
1397 * Bit w&i still works better!
1399 tmp |= DMA_WRITE_MAX_128;
1400 #endif
1401 writel(tmp, &regs->PciState);
1403 #if 0
1405 * The Host PCI bus controller driver has to set FBB.
1406 * If all devices on that PCI bus support FBB, then the controller
1407 * can enable FBB support in the Host PCI Bus controller (or on
1408 * the PCI-PCI bridge if that applies).
1409 * -ggg
1412 * I have received reports from people having problems when this
1413 * bit is enabled.
1415 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1416 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1417 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1418 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1420 #endif
1423 * Configure DMA attributes.
1425 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
1426 ap->pci_using_dac = 1;
1427 } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) {
1428 ap->pci_using_dac = 0;
1429 } else {
1430 ecode = -ENODEV;
1431 goto init_error;
1435 * Initialize the generic info block and the command+event rings
1436 * and the control blocks for the transmit and receive rings
1437 * as they need to be setup once and for all.
1439 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1440 &ap->info_dma))) {
1441 ecode = -EAGAIN;
1442 goto init_error;
1444 ap->info = info;
1447 * Get the memory for the skb rings.
1449 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1450 ecode = -EAGAIN;
1451 goto init_error;
1454 ecode = request_irq(pdev->irq, ace_interrupt, SA_SHIRQ,
1455 dev->name, dev);
1456 if (ecode) {
1457 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1458 dev->name, pdev->irq);
1459 goto init_error;
1460 } else
1461 dev->irq = pdev->irq;
1464 * Register the device here to be able to catch allocated
1465 * interrupt handlers in case the firmware doesn't come up.
1467 ap->next = root_dev;
1468 root_dev = dev;
1470 #ifdef INDEX_DEBUG
1471 spin_lock_init(&ap->debug_lock);
1472 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1473 ap->last_std_rx = 0;
1474 ap->last_mini_rx = 0;
1475 #endif
1477 memset(ap->info, 0, sizeof(struct ace_info));
1478 memset(ap->skb, 0, sizeof(struct ace_skb));
1480 ace_load_firmware(dev);
1481 ap->fw_running = 0;
1483 tmp_ptr = ap->info_dma;
1484 writel(tmp_ptr >> 32, &regs->InfoPtrHi);
1485 writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo);
1487 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1489 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1490 info->evt_ctrl.flags = 0;
1492 *(ap->evt_prd) = 0;
1493 wmb();
1494 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1495 writel(0, &regs->EvtCsm);
1497 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1498 info->cmd_ctrl.flags = 0;
1499 info->cmd_ctrl.max_len = 0;
1501 for (i = 0; i < CMD_RING_ENTRIES; i++)
1502 writel(0, &regs->CmdRng[i]);
1504 writel(0, &regs->CmdPrd);
1505 writel(0, &regs->CmdCsm);
1507 tmp_ptr = ap->info_dma;
1508 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1509 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1511 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1512 info->rx_std_ctrl.max_len = ACE_STD_MTU + ETH_HLEN + 4;
1513 info->rx_std_ctrl.flags =
1514 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1516 memset(ap->rx_std_ring, 0,
1517 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1519 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1520 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1522 ap->rx_std_skbprd = 0;
1523 atomic_set(&ap->cur_rx_bufs, 0);
1525 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1526 (ap->rx_ring_base_dma +
1527 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1528 info->rx_jumbo_ctrl.max_len = 0;
1529 info->rx_jumbo_ctrl.flags =
1530 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1532 memset(ap->rx_jumbo_ring, 0,
1533 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1535 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1536 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1538 ap->rx_jumbo_skbprd = 0;
1539 atomic_set(&ap->cur_jumbo_bufs, 0);
1541 memset(ap->rx_mini_ring, 0,
1542 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1544 if (ap->version >= 2) {
1545 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1546 (ap->rx_ring_base_dma +
1547 (sizeof(struct rx_desc) *
1548 (RX_STD_RING_ENTRIES +
1549 RX_JUMBO_RING_ENTRIES))));
1550 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1551 info->rx_mini_ctrl.flags =
1552 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1554 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1555 ap->rx_mini_ring[i].flags =
1556 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1557 } else {
1558 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1559 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1560 info->rx_mini_ctrl.max_len = 0;
1563 ap->rx_mini_skbprd = 0;
1564 atomic_set(&ap->cur_mini_bufs, 0);
1566 set_aceaddr(&info->rx_return_ctrl.rngptr,
1567 (ap->rx_ring_base_dma +
1568 (sizeof(struct rx_desc) *
1569 (RX_STD_RING_ENTRIES +
1570 RX_JUMBO_RING_ENTRIES +
1571 RX_MINI_RING_ENTRIES))));
1572 info->rx_return_ctrl.flags = 0;
1573 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1575 memset(ap->rx_return_ring, 0,
1576 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1578 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1579 *(ap->rx_ret_prd) = 0;
1581 writel(TX_RING_BASE, &regs->WinBase);
1583 if (ACE_IS_TIGON_I(ap)) {
1584 ap->tx_ring = (struct tx_desc *)regs->Window;
1585 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES *
1586 sizeof(struct tx_desc) / 4); i++) {
1587 writel(0, (unsigned long)ap->tx_ring + i * 4);
1590 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1591 } else {
1592 memset(ap->tx_ring, 0,
1593 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1595 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1598 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1599 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1602 * The Tigon I does not like having the TX ring in host memory ;-(
1604 if (!ACE_IS_TIGON_I(ap))
1605 tmp |= RCB_FLG_TX_HOST_RING;
1606 #if TX_COAL_INTS_ONLY
1607 tmp |= RCB_FLG_COAL_INT_ONLY;
1608 #endif
1609 info->tx_ctrl.flags = tmp;
1611 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1614 * Potential item for tuning parameter
1616 #if 0 /* NO */
1617 writel(DMA_THRESH_16W, &regs->DmaReadCfg);
1618 writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
1619 #else
1620 writel(DMA_THRESH_8W, &regs->DmaReadCfg);
1621 writel(DMA_THRESH_8W, &regs->DmaWriteCfg);
1622 #endif
1624 writel(0, &regs->MaskInt);
1625 writel(1, &regs->IfIdx);
1626 #if 0
1628 * McKinley boxes do not like us fiddling with AssistState
1629 * this early
1631 writel(1, &regs->AssistState);
1632 #endif
1634 writel(DEF_STAT, &regs->TuneStatTicks);
1635 writel(DEF_TRACE, &regs->TuneTrace);
1637 ace_set_rxtx_parms(dev, 0);
1639 if (board_idx == BOARD_IDX_OVERFLOW) {
1640 printk(KERN_WARNING "%s: more than %i NICs detected, "
1641 "ignoring module parameters!\n",
1642 dev->name, ACE_MAX_MOD_PARMS);
1643 } else if (board_idx >= 0) {
1644 if (tx_coal_tick[board_idx])
1645 writel(tx_coal_tick[board_idx],
1646 &regs->TuneTxCoalTicks);
1647 if (max_tx_desc[board_idx])
1648 writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc);
1650 if (rx_coal_tick[board_idx])
1651 writel(rx_coal_tick[board_idx],
1652 &regs->TuneRxCoalTicks);
1653 if (max_rx_desc[board_idx])
1654 writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc);
1656 if (trace[board_idx])
1657 writel(trace[board_idx], &regs->TuneTrace);
1659 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1660 writel(tx_ratio[board_idx], &regs->TxBufRat);
1664 * Default link parameters
1666 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1667 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1668 if(ap->version >= 2)
1669 tmp |= LNK_TX_FLOW_CTL_Y;
1672 * Override link default parameters
1674 if ((board_idx >= 0) && link[board_idx]) {
1675 int option = link[board_idx];
1677 tmp = LNK_ENABLE;
1679 if (option & 0x01) {
1680 printk(KERN_INFO "%s: Setting half duplex link\n",
1681 dev->name);
1682 tmp &= ~LNK_FULL_DUPLEX;
1684 if (option & 0x02)
1685 tmp &= ~LNK_NEGOTIATE;
1686 if (option & 0x10)
1687 tmp |= LNK_10MB;
1688 if (option & 0x20)
1689 tmp |= LNK_100MB;
1690 if (option & 0x40)
1691 tmp |= LNK_1000MB;
1692 if ((option & 0x70) == 0) {
1693 printk(KERN_WARNING "%s: No media speed specified, "
1694 "forcing auto negotiation\n", dev->name);
1695 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1696 LNK_100MB | LNK_10MB;
1698 if ((option & 0x100) == 0)
1699 tmp |= LNK_NEG_FCTL;
1700 else
1701 printk(KERN_INFO "%s: Disabling flow control "
1702 "negotiation\n", dev->name);
1703 if (option & 0x200)
1704 tmp |= LNK_RX_FLOW_CTL_Y;
1705 if ((option & 0x400) && (ap->version >= 2)) {
1706 printk(KERN_INFO "%s: Enabling TX flow control\n",
1707 dev->name);
1708 tmp |= LNK_TX_FLOW_CTL_Y;
1712 ap->link = tmp;
1713 writel(tmp, &regs->TuneLink);
1714 if (ap->version >= 2)
1715 writel(tmp, &regs->TuneFastLink);
1717 if (ACE_IS_TIGON_I(ap))
1718 writel(tigonFwStartAddr, &regs->Pc);
1719 if (ap->version == 2)
1720 writel(tigon2FwStartAddr, &regs->Pc);
1722 writel(0, &regs->Mb0Lo);
1725 * Set tx_csm before we start receiving interrupts, otherwise
1726 * the interrupt handler might think it is supposed to process
1727 * tx ints before we are up and running, which may cause a null
1728 * pointer access in the int handler.
1730 ap->cur_rx = 0;
1731 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1733 wmb();
1734 ace_set_txprd(regs, ap, 0);
1735 writel(0, &regs->RxRetCsm);
1738 * Zero the stats before starting the interface
1740 memset(&ap->stats, 0, sizeof(ap->stats));
1743 * Enable DMA engine now.
1744 * If we do this sooner, Mckinley box pukes.
1745 * I assume it's because Tigon II DMA engine wants to check
1746 * *something* even before the CPU is started.
1748 writel(1, &regs->AssistState); /* enable DMA */
1751 * Start the NIC CPU
1753 writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl);
1754 readl(&regs->CpuCtrl);
1757 * Wait for the firmware to spin up - max 3 seconds.
1759 myjif = jiffies + 3 * HZ;
1760 while (time_before(jiffies, myjif) && !ap->fw_running);
1762 if (!ap->fw_running) {
1763 printk(KERN_ERR "%s: Firmware NOT running!\n", dev->name);
1765 ace_dump_trace(ap);
1766 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
1767 readl(&regs->CpuCtrl);
1769 /* aman@sgi.com - account for badly behaving firmware/NIC:
1770 * - have observed that the NIC may continue to generate
1771 * interrupts for some reason; attempt to stop it - halt
1772 * second CPU for Tigon II cards, and also clear Mb0
1773 * - if we're a module, we'll fail to load if this was
1774 * the only GbE card in the system => if the kernel does
1775 * see an interrupt from the NIC, code to handle it is
1776 * gone and OOps! - so free_irq also
1778 if (ap->version >= 2)
1779 writel(readl(&regs->CpuBCtrl) | CPU_HALT,
1780 &regs->CpuBCtrl);
1781 writel(0, &regs->Mb0Lo);
1782 readl(&regs->Mb0Lo);
1784 ecode = -EBUSY;
1785 goto init_error;
1789 * We load the ring here as there seem to be no way to tell the
1790 * firmware to wipe the ring without re-initializing it.
1792 if (!test_and_set_bit(0, &ap->std_refill_busy))
1793 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1794 else
1795 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1796 dev->name);
1797 if (ap->version >= 2) {
1798 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1799 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1800 else
1801 printk(KERN_ERR "%s: Someone is busy refilling "
1802 "the RX mini ring\n", dev->name);
1804 return 0;
1806 init_error:
1807 ace_init_cleanup(dev);
1808 return ecode;
1812 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1814 struct ace_private *ap;
1815 struct ace_regs *regs;
1816 int board_idx;
1818 ap = dev->priv;
1819 regs = ap->regs;
1821 board_idx = ap->board_idx;
1823 if (board_idx >= 0) {
1824 if (!jumbo) {
1825 if (!tx_coal_tick[board_idx])
1826 writel(DEF_TX_COAL, &regs->TuneTxCoalTicks);
1827 if (!max_tx_desc[board_idx])
1828 writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc);
1829 if (!rx_coal_tick[board_idx])
1830 writel(DEF_RX_COAL, &regs->TuneRxCoalTicks);
1831 if (!max_rx_desc[board_idx])
1832 writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc);
1833 if (!tx_ratio[board_idx])
1834 writel(DEF_TX_RATIO, &regs->TxBufRat);
1835 } else {
1836 if (!tx_coal_tick[board_idx])
1837 writel(DEF_JUMBO_TX_COAL,
1838 &regs->TuneTxCoalTicks);
1839 if (!max_tx_desc[board_idx])
1840 writel(DEF_JUMBO_TX_MAX_DESC,
1841 &regs->TuneMaxTxDesc);
1842 if (!rx_coal_tick[board_idx])
1843 writel(DEF_JUMBO_RX_COAL,
1844 &regs->TuneRxCoalTicks);
1845 if (!max_rx_desc[board_idx])
1846 writel(DEF_JUMBO_RX_MAX_DESC,
1847 &regs->TuneMaxRxDesc);
1848 if (!tx_ratio[board_idx])
1849 writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat);
1855 static void ace_watchdog(struct net_device *data)
1857 struct net_device *dev = data;
1858 struct ace_private *ap = dev->priv;
1859 struct ace_regs *regs = ap->regs;
1862 * We haven't received a stats update event for more than 2.5
1863 * seconds and there is data in the transmit queue, thus we
1864 * asume the card is stuck.
1866 if (*ap->tx_csm != ap->tx_ret_csm) {
1867 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1868 dev->name, (unsigned int)readl(&regs->HostCtrl));
1869 /* This can happen due to ieee flow control. */
1870 } else {
1871 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1872 dev->name);
1873 #if 0
1874 netif_wake_queue(dev);
1875 #endif
1880 static void ace_tasklet(unsigned long dev)
1882 struct ace_private *ap = ((struct net_device *)dev)->priv;
1883 int cur_size;
1885 cur_size = atomic_read(&ap->cur_rx_bufs);
1886 if ((cur_size < RX_LOW_STD_THRES) &&
1887 !test_and_set_bit(0, &ap->std_refill_busy)) {
1888 #if DEBUG
1889 printk("refilling buffers (current %i)\n", cur_size);
1890 #endif
1891 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1894 if (ap->version >= 2) {
1895 cur_size = atomic_read(&ap->cur_mini_bufs);
1896 if ((cur_size < RX_LOW_MINI_THRES) &&
1897 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1898 #if DEBUG
1899 printk("refilling mini buffers (current %i)\n",
1900 cur_size);
1901 #endif
1902 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1906 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1907 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1908 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1909 #if DEBUG
1910 printk("refilling jumbo buffers (current %i)\n", cur_size);
1911 #endif
1912 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1914 ap->tasklet_pending = 0;
1919 * Copy the contents of the NIC's trace buffer to kernel memory.
1921 static void ace_dump_trace(struct ace_private *ap)
1923 #if 0
1924 if (!ap->trace_buf)
1925 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1926 return;
1927 #endif
1932 * Load the standard rx ring.
1934 * Loading rings is safe without holding the spin lock since this is
1935 * done only before the device is enabled, thus no interrupts are
1936 * generated and by the interrupt handler/tasklet handler.
1938 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1940 struct ace_regs *regs;
1941 short i, idx;
1943 regs = ap->regs;
1945 prefetchw(&ap->cur_rx_bufs);
1947 idx = ap->rx_std_skbprd;
1949 for (i = 0; i < nr_bufs; i++) {
1950 struct sk_buff *skb;
1951 struct rx_desc *rd;
1952 dma_addr_t mapping;
1954 skb = alloc_skb(ACE_STD_BUFSIZE, GFP_ATOMIC);
1955 if (!skb)
1956 break;
1959 * Make sure IP header starts on a fresh cache line.
1961 skb_reserve(skb, 2 + 16);
1962 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1963 ((unsigned long)skb->data & ~PAGE_MASK),
1964 ACE_STD_BUFSIZE - (2 + 16),
1965 PCI_DMA_FROMDEVICE);
1966 ap->skb->rx_std_skbuff[idx].skb = skb;
1967 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1968 mapping, mapping);
1970 rd = &ap->rx_std_ring[idx];
1971 set_aceaddr(&rd->addr, mapping);
1972 rd->size = ACE_STD_MTU + ETH_HLEN + 4;
1973 rd->idx = idx;
1974 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1977 if (!i)
1978 goto error_out;
1980 atomic_add(i, &ap->cur_rx_bufs);
1981 ap->rx_std_skbprd = idx;
1983 if (ACE_IS_TIGON_I(ap)) {
1984 struct cmd cmd;
1985 cmd.evt = C_SET_RX_PRD_IDX;
1986 cmd.code = 0;
1987 cmd.idx = ap->rx_std_skbprd;
1988 ace_issue_cmd(regs, &cmd);
1989 } else {
1990 writel(idx, &regs->RxStdPrd);
1991 wmb();
1994 out:
1995 clear_bit(0, &ap->std_refill_busy);
1996 return;
1998 error_out:
1999 printk(KERN_INFO "Out of memory when allocating "
2000 "standard receive buffers\n");
2001 goto out;
2005 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
2007 struct ace_regs *regs;
2008 short i, idx;
2010 regs = ap->regs;
2012 prefetchw(&ap->cur_mini_bufs);
2014 idx = ap->rx_mini_skbprd;
2015 for (i = 0; i < nr_bufs; i++) {
2016 struct sk_buff *skb;
2017 struct rx_desc *rd;
2018 dma_addr_t mapping;
2020 skb = alloc_skb(ACE_MINI_BUFSIZE, GFP_ATOMIC);
2021 if (!skb)
2022 break;
2025 * Make sure the IP header ends up on a fresh cache line
2027 skb_reserve(skb, 2 + 16);
2028 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2029 ((unsigned long)skb->data & ~PAGE_MASK),
2030 ACE_MINI_BUFSIZE - (2 + 16),
2031 PCI_DMA_FROMDEVICE);
2032 ap->skb->rx_mini_skbuff[idx].skb = skb;
2033 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
2034 mapping, mapping);
2036 rd = &ap->rx_mini_ring[idx];
2037 set_aceaddr(&rd->addr, mapping);
2038 rd->size = ACE_MINI_SIZE;
2039 rd->idx = idx;
2040 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
2043 if (!i)
2044 goto error_out;
2046 atomic_add(i, &ap->cur_mini_bufs);
2048 ap->rx_mini_skbprd = idx;
2050 writel(idx, &regs->RxMiniPrd);
2051 wmb();
2053 out:
2054 clear_bit(0, &ap->mini_refill_busy);
2055 return;
2056 error_out:
2057 printk(KERN_INFO "Out of memory when allocating "
2058 "mini receive buffers\n");
2059 goto out;
2064 * Load the jumbo rx ring, this may happen at any time if the MTU
2065 * is changed to a value > 1500.
2067 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
2069 struct ace_regs *regs;
2070 short i, idx;
2072 regs = ap->regs;
2074 idx = ap->rx_jumbo_skbprd;
2076 for (i = 0; i < nr_bufs; i++) {
2077 struct sk_buff *skb;
2078 struct rx_desc *rd;
2079 dma_addr_t mapping;
2081 skb = alloc_skb(ACE_JUMBO_BUFSIZE, GFP_ATOMIC);
2082 if (!skb)
2083 break;
2086 * Make sure the IP header ends up on a fresh cache line
2088 skb_reserve(skb, 2 + 16);
2089 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2090 ((unsigned long)skb->data & ~PAGE_MASK),
2091 ACE_JUMBO_BUFSIZE - (2 + 16),
2092 PCI_DMA_FROMDEVICE);
2093 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
2094 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
2095 mapping, mapping);
2097 rd = &ap->rx_jumbo_ring[idx];
2098 set_aceaddr(&rd->addr, mapping);
2099 rd->size = ACE_JUMBO_MTU + ETH_HLEN + 4;
2100 rd->idx = idx;
2101 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
2104 if (!i)
2105 goto error_out;
2107 atomic_add(i, &ap->cur_jumbo_bufs);
2108 ap->rx_jumbo_skbprd = idx;
2110 if (ACE_IS_TIGON_I(ap)) {
2111 struct cmd cmd;
2112 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
2113 cmd.code = 0;
2114 cmd.idx = ap->rx_jumbo_skbprd;
2115 ace_issue_cmd(regs, &cmd);
2116 } else {
2117 writel(idx, &regs->RxJumboPrd);
2118 wmb();
2121 out:
2122 clear_bit(0, &ap->jumbo_refill_busy);
2123 return;
2124 error_out:
2125 if (net_ratelimit())
2126 printk(KERN_INFO "Out of memory when allocating "
2127 "jumbo receive buffers\n");
2128 goto out;
2133 * All events are considered to be slow (RX/TX ints do not generate
2134 * events) and are handled here, outside the main interrupt handler,
2135 * to reduce the size of the handler.
2137 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
2139 struct ace_private *ap;
2141 ap = dev->priv;
2143 while (evtcsm != evtprd) {
2144 switch (ap->evt_ring[evtcsm].evt) {
2145 case E_FW_RUNNING:
2146 printk(KERN_INFO "%s: Firmware up and running\n",
2147 dev->name);
2148 ap->fw_running = 1;
2149 wmb();
2150 break;
2151 case E_STATS_UPDATED:
2152 break;
2153 case E_LNK_STATE:
2155 u16 code = ap->evt_ring[evtcsm].code;
2156 switch (code) {
2157 case E_C_LINK_UP:
2159 u32 state = readl(&ap->regs->GigLnkState);
2160 printk(KERN_WARNING "%s: Optical link UP "
2161 "(%s Duplex, Flow Control: %s%s)\n",
2162 dev->name,
2163 state & LNK_FULL_DUPLEX ? "Full":"Half",
2164 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
2165 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
2166 break;
2168 case E_C_LINK_DOWN:
2169 printk(KERN_WARNING "%s: Optical link DOWN\n",
2170 dev->name);
2171 break;
2172 case E_C_LINK_10_100:
2173 printk(KERN_WARNING "%s: 10/100BaseT link "
2174 "UP\n", dev->name);
2175 break;
2176 default:
2177 printk(KERN_ERR "%s: Unknown optical link "
2178 "state %02x\n", dev->name, code);
2180 break;
2182 case E_ERROR:
2183 switch(ap->evt_ring[evtcsm].code) {
2184 case E_C_ERR_INVAL_CMD:
2185 printk(KERN_ERR "%s: invalid command error\n",
2186 dev->name);
2187 break;
2188 case E_C_ERR_UNIMP_CMD:
2189 printk(KERN_ERR "%s: unimplemented command "
2190 "error\n", dev->name);
2191 break;
2192 case E_C_ERR_BAD_CFG:
2193 printk(KERN_ERR "%s: bad config error\n",
2194 dev->name);
2195 break;
2196 default:
2197 printk(KERN_ERR "%s: unknown error %02x\n",
2198 dev->name, ap->evt_ring[evtcsm].code);
2200 break;
2201 case E_RESET_JUMBO_RNG:
2203 int i;
2204 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
2205 if (ap->skb->rx_jumbo_skbuff[i].skb) {
2206 ap->rx_jumbo_ring[i].size = 0;
2207 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
2208 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
2209 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
2213 if (ACE_IS_TIGON_I(ap)) {
2214 struct cmd cmd;
2215 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
2216 cmd.code = 0;
2217 cmd.idx = 0;
2218 ace_issue_cmd(ap->regs, &cmd);
2219 } else {
2220 writel(0, &((ap->regs)->RxJumboPrd));
2221 wmb();
2224 ap->jumbo = 0;
2225 ap->rx_jumbo_skbprd = 0;
2226 printk(KERN_INFO "%s: Jumbo ring flushed\n",
2227 dev->name);
2228 clear_bit(0, &ap->jumbo_refill_busy);
2229 break;
2231 default:
2232 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
2233 dev->name, ap->evt_ring[evtcsm].evt);
2235 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
2238 return evtcsm;
2242 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
2244 struct ace_private *ap = dev->priv;
2245 u32 idx;
2246 int mini_count = 0, std_count = 0;
2248 idx = rxretcsm;
2250 prefetchw(&ap->cur_rx_bufs);
2251 prefetchw(&ap->cur_mini_bufs);
2253 while (idx != rxretprd) {
2254 struct ring_info *rip;
2255 struct sk_buff *skb;
2256 struct rx_desc *rxdesc, *retdesc;
2257 u32 skbidx;
2258 int bd_flags, desc_type, mapsize;
2259 u16 csum;
2261 retdesc = &ap->rx_return_ring[idx];
2262 skbidx = retdesc->idx;
2263 bd_flags = retdesc->flags;
2264 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
2266 switch(desc_type) {
2268 * Normal frames do not have any flags set
2270 * Mini and normal frames arrive frequently,
2271 * so use a local counter to avoid doing
2272 * atomic operations for each packet arriving.
2274 case 0:
2275 rip = &ap->skb->rx_std_skbuff[skbidx];
2276 mapsize = ACE_STD_BUFSIZE - (2 + 16);
2277 rxdesc = &ap->rx_std_ring[skbidx];
2278 std_count++;
2279 break;
2280 case BD_FLG_JUMBO:
2281 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
2282 mapsize = ACE_JUMBO_BUFSIZE - (2 + 16);
2283 rxdesc = &ap->rx_jumbo_ring[skbidx];
2284 atomic_dec(&ap->cur_jumbo_bufs);
2285 break;
2286 case BD_FLG_MINI:
2287 rip = &ap->skb->rx_mini_skbuff[skbidx];
2288 mapsize = ACE_MINI_BUFSIZE - (2 + 16);
2289 rxdesc = &ap->rx_mini_ring[skbidx];
2290 mini_count++;
2291 break;
2292 default:
2293 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2294 "returned by NIC\n", dev->name,
2295 retdesc->flags);
2296 goto error;
2299 skb = rip->skb;
2300 rip->skb = NULL;
2301 pci_unmap_page(ap->pdev,
2302 pci_unmap_addr(rip, mapping),
2303 mapsize,
2304 PCI_DMA_FROMDEVICE);
2305 skb_put(skb, retdesc->size);
2308 * Fly baby, fly!
2310 csum = retdesc->tcp_udp_csum;
2312 skb->dev = dev;
2313 skb->protocol = eth_type_trans(skb, dev);
2316 * Instead of forcing the poor tigon mips cpu to calculate
2317 * pseudo hdr checksum, we do this ourselves.
2319 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2320 skb->csum = htons(csum);
2321 skb->ip_summed = CHECKSUM_HW;
2322 } else {
2323 skb->ip_summed = CHECKSUM_NONE;
2326 /* send it up */
2327 #if ACENIC_DO_VLAN
2328 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2329 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2330 } else
2331 #endif
2332 netif_rx(skb);
2334 dev->last_rx = jiffies;
2335 ap->stats.rx_packets++;
2336 ap->stats.rx_bytes += retdesc->size;
2338 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2341 atomic_sub(std_count, &ap->cur_rx_bufs);
2342 if (!ACE_IS_TIGON_I(ap))
2343 atomic_sub(mini_count, &ap->cur_mini_bufs);
2345 out:
2347 * According to the documentation RxRetCsm is obsolete with
2348 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2350 if (ACE_IS_TIGON_I(ap)) {
2351 struct ace_regs *regs = ap->regs;
2352 writel(idx, &regs->RxRetCsm);
2354 ap->cur_rx = idx;
2356 return;
2357 error:
2358 idx = rxretprd;
2359 goto out;
2363 static inline void ace_tx_int(struct net_device *dev,
2364 u32 txcsm, u32 idx)
2366 struct ace_private *ap = dev->priv;
2368 do {
2369 struct sk_buff *skb;
2370 dma_addr_t mapping;
2371 struct tx_ring_info *info;
2373 info = ap->skb->tx_skbuff + idx;
2374 skb = info->skb;
2375 mapping = pci_unmap_addr(info, mapping);
2377 if (mapping) {
2378 pci_unmap_page(ap->pdev, mapping,
2379 pci_unmap_len(info, maplen),
2380 PCI_DMA_TODEVICE);
2381 pci_unmap_addr_set(info, mapping, 0);
2384 if (skb) {
2385 ap->stats.tx_packets++;
2386 ap->stats.tx_bytes += skb->len;
2387 dev_kfree_skb_irq(skb);
2388 info->skb = NULL;
2391 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2392 } while (idx != txcsm);
2394 if (netif_queue_stopped(dev))
2395 netif_wake_queue(dev);
2397 wmb();
2398 ap->tx_ret_csm = txcsm;
2400 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2402 * We could try to make it before. In this case we would get
2403 * the following race condition: hard_start_xmit on other cpu
2404 * enters after we advanced tx_ret_csm and fills space,
2405 * which we have just freed, so that we make illegal device wakeup.
2406 * There is no good way to workaround this (at entry
2407 * to ace_start_xmit detects this condition and prevents
2408 * ring corruption, but it is not a good workaround.)
2410 * When tx_ret_csm is advanced after, we wake up device _only_
2411 * if we really have some space in ring (though the core doing
2412 * hard_start_xmit can see full ring for some period and has to
2413 * synchronize.) Superb.
2414 * BUT! We get another subtle race condition. hard_start_xmit
2415 * may think that ring is full between wakeup and advancing
2416 * tx_ret_csm and will stop device instantly! It is not so bad.
2417 * We are guaranteed that there is something in ring, so that
2418 * the next irq will resume transmission. To speedup this we could
2419 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2420 * (see ace_start_xmit).
2422 * Well, this dilemma exists in all lock-free devices.
2423 * We, following scheme used in drivers by Donald Becker,
2424 * select the least dangerous.
2425 * --ANK
2430 static irqreturn_t ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2432 struct ace_private *ap;
2433 struct ace_regs *regs;
2434 struct net_device *dev = (struct net_device *)dev_id;
2435 u32 idx;
2436 u32 txcsm, rxretcsm, rxretprd;
2437 u32 evtcsm, evtprd;
2439 ap = dev->priv;
2440 regs = ap->regs;
2443 * In case of PCI shared interrupts or spurious interrupts,
2444 * we want to make sure it is actually our interrupt before
2445 * spending any time in here.
2447 if (!(readl(&regs->HostCtrl) & IN_INT))
2448 return IRQ_NONE;
2451 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2452 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2453 * writel(0, &regs->Mb0Lo).
2455 * "IRQ avoidance" recommended in docs applies to IRQs served
2456 * threads and it is wrong even for that case.
2458 writel(0, &regs->Mb0Lo);
2459 readl(&regs->Mb0Lo);
2462 * There is no conflict between transmit handling in
2463 * start_xmit and receive processing, thus there is no reason
2464 * to take a spin lock for RX handling. Wait until we start
2465 * working on the other stuff - hey we don't need a spin lock
2466 * anymore.
2468 rxretprd = *ap->rx_ret_prd;
2469 rxretcsm = ap->cur_rx;
2471 if (rxretprd != rxretcsm)
2472 ace_rx_int(dev, rxretprd, rxretcsm);
2474 txcsm = *ap->tx_csm;
2475 idx = ap->tx_ret_csm;
2477 if (txcsm != idx) {
2479 * If each skb takes only one descriptor this check degenerates
2480 * to identity, because new space has just been opened.
2481 * But if skbs are fragmented we must check that this index
2482 * update releases enough of space, otherwise we just
2483 * wait for device to make more work.
2485 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2486 ace_tx_int(dev, txcsm, idx);
2489 evtcsm = readl(&regs->EvtCsm);
2490 evtprd = *ap->evt_prd;
2492 if (evtcsm != evtprd) {
2493 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2494 writel(evtcsm, &regs->EvtCsm);
2498 * This has to go last in the interrupt handler and run with
2499 * the spin lock released ... what lock?
2501 if (netif_running(dev)) {
2502 int cur_size;
2503 int run_tasklet = 0;
2505 cur_size = atomic_read(&ap->cur_rx_bufs);
2506 if (cur_size < RX_LOW_STD_THRES) {
2507 if ((cur_size < RX_PANIC_STD_THRES) &&
2508 !test_and_set_bit(0, &ap->std_refill_busy)) {
2509 #if DEBUG
2510 printk("low on std buffers %i\n", cur_size);
2511 #endif
2512 ace_load_std_rx_ring(ap,
2513 RX_RING_SIZE - cur_size);
2514 } else
2515 run_tasklet = 1;
2518 if (!ACE_IS_TIGON_I(ap)) {
2519 cur_size = atomic_read(&ap->cur_mini_bufs);
2520 if (cur_size < RX_LOW_MINI_THRES) {
2521 if ((cur_size < RX_PANIC_MINI_THRES) &&
2522 !test_and_set_bit(0,
2523 &ap->mini_refill_busy)) {
2524 #if DEBUG
2525 printk("low on mini buffers %i\n",
2526 cur_size);
2527 #endif
2528 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2529 } else
2530 run_tasklet = 1;
2534 if (ap->jumbo) {
2535 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2536 if (cur_size < RX_LOW_JUMBO_THRES) {
2537 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2538 !test_and_set_bit(0,
2539 &ap->jumbo_refill_busy)){
2540 #if DEBUG
2541 printk("low on jumbo buffers %i\n",
2542 cur_size);
2543 #endif
2544 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2545 } else
2546 run_tasklet = 1;
2549 if (run_tasklet && !ap->tasklet_pending) {
2550 ap->tasklet_pending = 1;
2551 tasklet_schedule(&ap->ace_tasklet);
2555 return IRQ_HANDLED;
2559 #if ACENIC_DO_VLAN
2560 static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2562 struct ace_private *ap = dev->priv;
2563 unsigned long flags;
2565 local_irq_save(flags);
2566 ace_mask_irq(dev);
2568 ap->vlgrp = grp;
2570 ace_unmask_irq(dev);
2571 local_irq_restore(flags);
2575 static void ace_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
2577 struct ace_private *ap = dev->priv;
2578 unsigned long flags;
2580 local_irq_save(flags);
2581 ace_mask_irq(dev);
2583 if (ap->vlgrp)
2584 ap->vlgrp->vlan_devices[vid] = NULL;
2586 ace_unmask_irq(dev);
2587 local_irq_restore(flags);
2589 #endif /* ACENIC_DO_VLAN */
2592 static int ace_open(struct net_device *dev)
2594 struct ace_private *ap;
2595 struct ace_regs *regs;
2596 struct cmd cmd;
2598 ap = dev->priv;
2599 regs = ap->regs;
2601 if (!(ap->fw_running)) {
2602 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2603 return -EBUSY;
2606 writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu);
2608 cmd.evt = C_CLEAR_STATS;
2609 cmd.code = 0;
2610 cmd.idx = 0;
2611 ace_issue_cmd(regs, &cmd);
2613 cmd.evt = C_HOST_STATE;
2614 cmd.code = C_C_STACK_UP;
2615 cmd.idx = 0;
2616 ace_issue_cmd(regs, &cmd);
2618 if (ap->jumbo &&
2619 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2620 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2622 if (dev->flags & IFF_PROMISC) {
2623 cmd.evt = C_SET_PROMISC_MODE;
2624 cmd.code = C_C_PROMISC_ENABLE;
2625 cmd.idx = 0;
2626 ace_issue_cmd(regs, &cmd);
2628 ap->promisc = 1;
2629 }else
2630 ap->promisc = 0;
2631 ap->mcast_all = 0;
2633 #if 0
2634 cmd.evt = C_LNK_NEGOTIATION;
2635 cmd.code = 0;
2636 cmd.idx = 0;
2637 ace_issue_cmd(regs, &cmd);
2638 #endif
2640 netif_start_queue(dev);
2642 ACE_MOD_INC_USE_COUNT;
2645 * Setup the bottom half rx ring refill handler
2647 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2648 return 0;
2652 static int ace_close(struct net_device *dev)
2654 struct ace_private *ap;
2655 struct ace_regs *regs;
2656 struct cmd cmd;
2657 unsigned long flags;
2658 short i;
2660 ace_if_down(dev);
2663 * Without (or before) releasing irq and stopping hardware, this
2664 * is an absolute non-sense, by the way. It will be reset instantly
2665 * by the first irq.
2667 netif_stop_queue(dev);
2669 ap = dev->priv;
2670 regs = ap->regs;
2672 if (ap->promisc) {
2673 cmd.evt = C_SET_PROMISC_MODE;
2674 cmd.code = C_C_PROMISC_DISABLE;
2675 cmd.idx = 0;
2676 ace_issue_cmd(regs, &cmd);
2677 ap->promisc = 0;
2680 cmd.evt = C_HOST_STATE;
2681 cmd.code = C_C_STACK_DOWN;
2682 cmd.idx = 0;
2683 ace_issue_cmd(regs, &cmd);
2685 tasklet_kill(&ap->ace_tasklet);
2688 * Make sure one CPU is not processing packets while
2689 * buffers are being released by another.
2692 local_irq_save(flags);
2693 ace_mask_irq(dev);
2695 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2696 struct sk_buff *skb;
2697 dma_addr_t mapping;
2698 struct tx_ring_info *info;
2700 info = ap->skb->tx_skbuff + i;
2701 skb = info->skb;
2702 mapping = pci_unmap_addr(info, mapping);
2704 if (mapping) {
2705 if (ACE_IS_TIGON_I(ap)) {
2706 writel(0, &ap->tx_ring[i].addr.addrhi);
2707 writel(0, &ap->tx_ring[i].addr.addrlo);
2708 writel(0, &ap->tx_ring[i].flagsize);
2709 } else
2710 memset(ap->tx_ring + i, 0,
2711 sizeof(struct tx_desc));
2712 pci_unmap_page(ap->pdev, mapping,
2713 pci_unmap_len(info, maplen),
2714 PCI_DMA_TODEVICE);
2715 pci_unmap_addr_set(info, mapping, 0);
2717 if (skb) {
2718 dev_kfree_skb(skb);
2719 info->skb = NULL;
2723 if (ap->jumbo) {
2724 cmd.evt = C_RESET_JUMBO_RNG;
2725 cmd.code = 0;
2726 cmd.idx = 0;
2727 ace_issue_cmd(regs, &cmd);
2730 ace_unmask_irq(dev);
2731 local_irq_restore(flags);
2733 ACE_MOD_DEC_USE_COUNT;
2734 return 0;
2738 static inline dma_addr_t
2739 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2740 struct sk_buff *tail, u32 idx)
2742 dma_addr_t mapping;
2743 struct tx_ring_info *info;
2745 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2746 ((unsigned long) skb->data & ~PAGE_MASK),
2747 skb->len, PCI_DMA_TODEVICE);
2749 info = ap->skb->tx_skbuff + idx;
2750 info->skb = tail;
2751 pci_unmap_addr_set(info, mapping, mapping);
2752 pci_unmap_len_set(info, maplen, skb->len);
2753 return mapping;
2757 static inline void
2758 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2759 u32 flagsize, u32 vlan_tag)
2761 #if !USE_TX_COAL_NOW
2762 flagsize &= ~BD_FLG_COAL_NOW;
2763 #endif
2765 if (ACE_IS_TIGON_I(ap)) {
2766 writel(addr >> 32, &desc->addr.addrhi);
2767 writel(addr & 0xffffffff, &desc->addr.addrlo);
2768 writel(flagsize, &desc->flagsize);
2769 #if ACENIC_DO_VLAN
2770 writel(vlan_tag, &desc->vlanres);
2771 #endif
2772 } else {
2773 desc->addr.addrhi = addr >> 32;
2774 desc->addr.addrlo = addr;
2775 desc->flagsize = flagsize;
2776 #if ACENIC_DO_VLAN
2777 desc->vlanres = vlan_tag;
2778 #endif
2783 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2785 struct ace_private *ap = dev->priv;
2786 struct ace_regs *regs = ap->regs;
2787 struct tx_desc *desc;
2788 u32 idx, flagsize;
2791 * This only happens with pre-softnet, ie. 2.2.x kernels.
2793 if (early_stop_netif_stop_queue(dev))
2794 return 1;
2796 restart:
2797 idx = ap->tx_prd;
2799 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2800 goto overflow;
2802 #if MAX_SKB_FRAGS
2803 if (!skb_shinfo(skb)->nr_frags)
2804 #endif
2806 dma_addr_t mapping;
2807 u32 vlan_tag = 0;
2809 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2810 flagsize = (skb->len << 16) | (BD_FLG_END);
2811 if (skb->ip_summed == CHECKSUM_HW)
2812 flagsize |= BD_FLG_TCP_UDP_SUM;
2813 #if ACENIC_DO_VLAN
2814 if (vlan_tx_tag_present(skb)) {
2815 flagsize |= BD_FLG_VLAN_TAG;
2816 vlan_tag = vlan_tx_tag_get(skb);
2818 #endif
2819 desc = ap->tx_ring + idx;
2820 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2822 /* Look at ace_tx_int for explanations. */
2823 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2824 flagsize |= BD_FLG_COAL_NOW;
2826 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2828 #if MAX_SKB_FRAGS
2829 else {
2830 dma_addr_t mapping;
2831 u32 vlan_tag = 0;
2832 int i, len = 0;
2834 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2835 flagsize = (skb_headlen(skb) << 16);
2836 if (skb->ip_summed == CHECKSUM_HW)
2837 flagsize |= BD_FLG_TCP_UDP_SUM;
2838 #if ACENIC_DO_VLAN
2839 if (vlan_tx_tag_present(skb)) {
2840 flagsize |= BD_FLG_VLAN_TAG;
2841 vlan_tag = vlan_tx_tag_get(skb);
2843 #endif
2845 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2847 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2849 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2850 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2851 struct tx_ring_info *info;
2853 len += frag->size;
2854 info = ap->skb->tx_skbuff + idx;
2855 desc = ap->tx_ring + idx;
2857 mapping = pci_map_page(ap->pdev, frag->page,
2858 frag->page_offset, frag->size,
2859 PCI_DMA_TODEVICE);
2861 flagsize = (frag->size << 16);
2862 if (skb->ip_summed == CHECKSUM_HW)
2863 flagsize |= BD_FLG_TCP_UDP_SUM;
2864 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2866 if (i == skb_shinfo(skb)->nr_frags - 1) {
2867 flagsize |= BD_FLG_END;
2868 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2869 flagsize |= BD_FLG_COAL_NOW;
2872 * Only the last fragment frees
2873 * the skb!
2875 info->skb = skb;
2876 } else {
2877 info->skb = NULL;
2879 pci_unmap_addr_set(info, mapping, mapping);
2880 pci_unmap_len_set(info, maplen, frag->size);
2881 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2884 #endif
2886 wmb();
2887 ap->tx_prd = idx;
2888 ace_set_txprd(regs, ap, idx);
2890 if (flagsize & BD_FLG_COAL_NOW) {
2891 netif_stop_queue(dev);
2894 * A TX-descriptor producer (an IRQ) might have gotten
2895 * inbetween, making the ring free again. Since xmit is
2896 * serialized, this is the only situation we have to
2897 * re-test.
2899 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2900 netif_wake_queue(dev);
2903 dev->trans_start = jiffies;
2904 return 0;
2906 overflow:
2908 * This race condition is unavoidable with lock-free drivers.
2909 * We wake up the queue _before_ tx_prd is advanced, so that we can
2910 * enter hard_start_xmit too early, while tx ring still looks closed.
2911 * This happens ~1-4 times per 100000 packets, so that we can allow
2912 * to loop syncing to other CPU. Probably, we need an additional
2913 * wmb() in ace_tx_intr as well.
2915 * Note that this race is relieved by reserving one more entry
2916 * in tx ring than it is necessary (see original non-SG driver).
2917 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2918 * is already overkill.
2920 * Alternative is to return with 1 not throttling queue. In this
2921 * case loop becomes longer, no more useful effects.
2923 barrier();
2924 goto restart;
2928 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2930 struct ace_private *ap = dev->priv;
2931 struct ace_regs *regs = ap->regs;
2933 if (new_mtu > ACE_JUMBO_MTU)
2934 return -EINVAL;
2936 writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu);
2937 dev->mtu = new_mtu;
2939 if (new_mtu > ACE_STD_MTU) {
2940 if (!(ap->jumbo)) {
2941 printk(KERN_INFO "%s: Enabling Jumbo frame "
2942 "support\n", dev->name);
2943 ap->jumbo = 1;
2944 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2945 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2946 ace_set_rxtx_parms(dev, 1);
2948 } else {
2949 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2950 ace_sync_irq(dev->irq);
2951 ace_set_rxtx_parms(dev, 0);
2952 if (ap->jumbo) {
2953 struct cmd cmd;
2955 cmd.evt = C_RESET_JUMBO_RNG;
2956 cmd.code = 0;
2957 cmd.idx = 0;
2958 ace_issue_cmd(regs, &cmd);
2962 return 0;
2966 static int ace_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2968 struct ace_private *ap = dev->priv;
2969 struct ace_regs *regs = ap->regs;
2970 #ifdef SIOCETHTOOL
2971 struct ethtool_cmd ecmd;
2972 u32 link, speed;
2974 if (cmd != SIOCETHTOOL)
2975 return -EOPNOTSUPP;
2976 if (copy_from_user(&ecmd, ifr->ifr_data, sizeof(ecmd)))
2977 return -EFAULT;
2978 switch (ecmd.cmd) {
2979 case ETHTOOL_GSET:
2980 ecmd.supported =
2981 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2982 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2983 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2984 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2986 ecmd.port = PORT_FIBRE;
2987 ecmd.transceiver = XCVR_INTERNAL;
2988 ecmd.phy_address = 0;
2990 link = readl(&regs->GigLnkState);
2991 if (link & LNK_1000MB)
2992 ecmd.speed = SPEED_1000;
2993 else {
2994 link = readl(&regs->FastLnkState);
2995 if (link & LNK_100MB)
2996 ecmd.speed = SPEED_100;
2997 else if (link & LNK_100MB)
2998 ecmd.speed = SPEED_10;
2999 else
3000 ecmd.speed = 0;
3002 if (link & LNK_FULL_DUPLEX)
3003 ecmd.duplex = DUPLEX_FULL;
3004 else
3005 ecmd.duplex = DUPLEX_HALF;
3007 if (link & LNK_NEGOTIATE)
3008 ecmd.autoneg = AUTONEG_ENABLE;
3009 else
3010 ecmd.autoneg = AUTONEG_DISABLE;
3012 #if 0
3014 * Current struct ethtool_cmd is insufficient
3016 ecmd.trace = readl(&regs->TuneTrace);
3018 ecmd.txcoal = readl(&regs->TuneTxCoalTicks);
3019 ecmd.rxcoal = readl(&regs->TuneRxCoalTicks);
3020 #endif
3021 ecmd.maxtxpkt = readl(&regs->TuneMaxTxDesc);
3022 ecmd.maxrxpkt = readl(&regs->TuneMaxRxDesc);
3024 if(copy_to_user(ifr->ifr_data, &ecmd, sizeof(ecmd)))
3025 return -EFAULT;
3026 return 0;
3028 case ETHTOOL_SSET:
3029 link = readl(&regs->GigLnkState);
3030 if (link & LNK_1000MB)
3031 speed = SPEED_1000;
3032 else {
3033 link = readl(&regs->FastLnkState);
3034 if (link & LNK_100MB)
3035 speed = SPEED_100;
3036 else if (link & LNK_100MB)
3037 speed = SPEED_10;
3038 else
3039 speed = SPEED_100;
3042 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
3043 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
3044 if (!ACE_IS_TIGON_I(ap))
3045 link |= LNK_TX_FLOW_CTL_Y;
3046 if (ecmd.autoneg == AUTONEG_ENABLE)
3047 link |= LNK_NEGOTIATE;
3048 if (ecmd.speed != speed) {
3049 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
3050 switch (speed) {
3051 case SPEED_1000:
3052 link |= LNK_1000MB;
3053 break;
3054 case SPEED_100:
3055 link |= LNK_100MB;
3056 break;
3057 case SPEED_10:
3058 link |= LNK_10MB;
3059 break;
3062 if (ecmd.duplex == DUPLEX_FULL)
3063 link |= LNK_FULL_DUPLEX;
3065 if (link != ap->link) {
3066 struct cmd cmd;
3067 printk(KERN_INFO "%s: Renegotiating link state\n",
3068 dev->name);
3070 ap->link = link;
3071 writel(link, &regs->TuneLink);
3072 if (!ACE_IS_TIGON_I(ap))
3073 writel(link, &regs->TuneFastLink);
3074 wmb();
3076 cmd.evt = C_LNK_NEGOTIATION;
3077 cmd.code = 0;
3078 cmd.idx = 0;
3079 ace_issue_cmd(regs, &cmd);
3081 return 0;
3083 case ETHTOOL_GDRVINFO: {
3084 struct ethtool_drvinfo info = {ETHTOOL_GDRVINFO};
3085 strncpy(info.driver, "acenic", sizeof(info.driver) - 1);
3086 sprintf(info.fw_version, "%i.%i.%i",
3087 tigonFwReleaseMajor, tigonFwReleaseMinor,
3088 tigonFwReleaseFix);
3089 strncpy(info.version, version, sizeof(info.version) - 1);
3090 if (ap && ap->pdev)
3091 strcpy(info.bus_info, ap->pdev->slot_name);
3092 if (copy_to_user(ifr->ifr_data, &info, sizeof(info)))
3093 return -EFAULT;
3094 return 0;
3096 default:
3097 break;
3100 #endif
3102 return -EOPNOTSUPP;
3107 * Set the hardware MAC address.
3109 static int ace_set_mac_addr(struct net_device *dev, void *p)
3111 struct sockaddr *addr=p;
3112 struct ace_regs *regs;
3113 u8 *da;
3114 struct cmd cmd;
3116 if(netif_running(dev))
3117 return -EBUSY;
3119 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
3121 da = (u8 *)dev->dev_addr;
3123 regs = ((struct ace_private *)dev->priv)->regs;
3124 writel(da[0] << 8 | da[1], &regs->MacAddrHi);
3125 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
3126 &regs->MacAddrLo);
3128 cmd.evt = C_SET_MAC_ADDR;
3129 cmd.code = 0;
3130 cmd.idx = 0;
3131 ace_issue_cmd(regs, &cmd);
3133 return 0;
3137 static void ace_set_multicast_list(struct net_device *dev)
3139 struct ace_private *ap = dev->priv;
3140 struct ace_regs *regs = ap->regs;
3141 struct cmd cmd;
3143 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
3144 cmd.evt = C_SET_MULTICAST_MODE;
3145 cmd.code = C_C_MCAST_ENABLE;
3146 cmd.idx = 0;
3147 ace_issue_cmd(regs, &cmd);
3148 ap->mcast_all = 1;
3149 } else if (ap->mcast_all) {
3150 cmd.evt = C_SET_MULTICAST_MODE;
3151 cmd.code = C_C_MCAST_DISABLE;
3152 cmd.idx = 0;
3153 ace_issue_cmd(regs, &cmd);
3154 ap->mcast_all = 0;
3157 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
3158 cmd.evt = C_SET_PROMISC_MODE;
3159 cmd.code = C_C_PROMISC_ENABLE;
3160 cmd.idx = 0;
3161 ace_issue_cmd(regs, &cmd);
3162 ap->promisc = 1;
3163 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
3164 cmd.evt = C_SET_PROMISC_MODE;
3165 cmd.code = C_C_PROMISC_DISABLE;
3166 cmd.idx = 0;
3167 ace_issue_cmd(regs, &cmd);
3168 ap->promisc = 0;
3172 * For the time being multicast relies on the upper layers
3173 * filtering it properly. The Firmware does not allow one to
3174 * set the entire multicast list at a time and keeping track of
3175 * it here is going to be messy.
3177 if ((dev->mc_count) && !(ap->mcast_all)) {
3178 cmd.evt = C_SET_MULTICAST_MODE;
3179 cmd.code = C_C_MCAST_ENABLE;
3180 cmd.idx = 0;
3181 ace_issue_cmd(regs, &cmd);
3182 }else if (!ap->mcast_all) {
3183 cmd.evt = C_SET_MULTICAST_MODE;
3184 cmd.code = C_C_MCAST_DISABLE;
3185 cmd.idx = 0;
3186 ace_issue_cmd(regs, &cmd);
3191 static struct net_device_stats *ace_get_stats(struct net_device *dev)
3193 struct ace_private *ap = dev->priv;
3194 struct ace_mac_stats *mac_stats =
3195 (struct ace_mac_stats *)ap->regs->Stats;
3197 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
3198 ap->stats.multicast = readl(&mac_stats->kept_mc);
3199 ap->stats.collisions = readl(&mac_stats->coll);
3201 return &ap->stats;
3205 static void __init ace_copy(struct ace_regs *regs, void *src,
3206 u32 dest, int size)
3208 unsigned long tdest;
3209 u32 *wsrc;
3210 short tsize, i;
3212 if (size <= 0)
3213 return;
3215 while (size > 0) {
3216 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
3217 min_t(u32, size, ACE_WINDOW_SIZE));
3218 tdest = (unsigned long)&regs->Window +
3219 (dest & (ACE_WINDOW_SIZE - 1));
3220 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
3222 * This requires byte swapping on big endian, however
3223 * writel does that for us
3225 wsrc = src;
3226 for (i = 0; i < (tsize / 4); i++) {
3227 writel(wsrc[i], tdest + i*4);
3229 dest += tsize;
3230 src += tsize;
3231 size -= tsize;
3234 return;
3238 static void __init ace_clear(struct ace_regs *regs, u32 dest, int size)
3240 unsigned long tdest;
3241 short tsize = 0, i;
3243 if (size <= 0)
3244 return;
3246 while (size > 0) {
3247 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
3248 min_t(u32, size, ACE_WINDOW_SIZE));
3249 tdest = (unsigned long)&regs->Window +
3250 (dest & (ACE_WINDOW_SIZE - 1));
3251 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
3253 for (i = 0; i < (tsize / 4); i++) {
3254 writel(0, tdest + i*4);
3257 dest += tsize;
3258 size -= tsize;
3261 return;
3266 * Download the firmware into the SRAM on the NIC
3268 * This operation requires the NIC to be halted and is performed with
3269 * interrupts disabled and with the spinlock hold.
3271 int __init ace_load_firmware(struct net_device *dev)
3273 struct ace_private *ap;
3274 struct ace_regs *regs;
3276 ap = dev->priv;
3277 regs = ap->regs;
3279 if (!(readl(&regs->CpuCtrl) & CPU_HALTED)) {
3280 printk(KERN_ERR "%s: trying to download firmware while the "
3281 "CPU is running!\n", dev->name);
3282 return -EFAULT;
3286 * Do not try to clear more than 512KB or we end up seeing
3287 * funny things on NICs with only 512KB SRAM
3289 ace_clear(regs, 0x2000, 0x80000-0x2000);
3290 if (ACE_IS_TIGON_I(ap)) {
3291 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
3292 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
3293 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
3294 tigonFwRodataLen);
3295 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
3296 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
3297 }else if (ap->version == 2) {
3298 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
3299 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
3300 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
3301 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
3302 tigon2FwRodataLen);
3303 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
3306 return 0;
3311 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3313 * Accessing the EEPROM is `interesting' to say the least - don't read
3314 * this code right after dinner.
3316 * This is all about black magic and bit-banging the device .... I
3317 * wonder in what hospital they have put the guy who designed the i2c
3318 * specs.
3320 * Oh yes, this is only the beginning!
3322 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3323 * code i2c readout code by beta testing all my hacks.
3325 static void __init eeprom_start(struct ace_regs *regs)
3327 u32 local;
3329 readl(&regs->LocalCtrl);
3330 udelay(ACE_SHORT_DELAY);
3331 local = readl(&regs->LocalCtrl);
3332 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3333 writel(local, &regs->LocalCtrl);
3334 readl(&regs->LocalCtrl);
3335 mb();
3336 udelay(ACE_SHORT_DELAY);
3337 local |= EEPROM_CLK_OUT;
3338 writel(local, &regs->LocalCtrl);
3339 readl(&regs->LocalCtrl);
3340 mb();
3341 udelay(ACE_SHORT_DELAY);
3342 local &= ~EEPROM_DATA_OUT;
3343 writel(local, &regs->LocalCtrl);
3344 readl(&regs->LocalCtrl);
3345 mb();
3346 udelay(ACE_SHORT_DELAY);
3347 local &= ~EEPROM_CLK_OUT;
3348 writel(local, &regs->LocalCtrl);
3349 readl(&regs->LocalCtrl);
3350 mb();
3354 static void __init eeprom_prep(struct ace_regs *regs, u8 magic)
3356 short i;
3357 u32 local;
3359 udelay(ACE_SHORT_DELAY);
3360 local = readl(&regs->LocalCtrl);
3361 local &= ~EEPROM_DATA_OUT;
3362 local |= EEPROM_WRITE_ENABLE;
3363 writel(local, &regs->LocalCtrl);
3364 readl(&regs->LocalCtrl);
3365 mb();
3367 for (i = 0; i < 8; i++, magic <<= 1) {
3368 udelay(ACE_SHORT_DELAY);
3369 if (magic & 0x80)
3370 local |= EEPROM_DATA_OUT;
3371 else
3372 local &= ~EEPROM_DATA_OUT;
3373 writel(local, &regs->LocalCtrl);
3374 readl(&regs->LocalCtrl);
3375 mb();
3377 udelay(ACE_SHORT_DELAY);
3378 local |= EEPROM_CLK_OUT;
3379 writel(local, &regs->LocalCtrl);
3380 readl(&regs->LocalCtrl);
3381 mb();
3382 udelay(ACE_SHORT_DELAY);
3383 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3384 writel(local, &regs->LocalCtrl);
3385 readl(&regs->LocalCtrl);
3386 mb();
3391 static int __init eeprom_check_ack(struct ace_regs *regs)
3393 int state;
3394 u32 local;
3396 local = readl(&regs->LocalCtrl);
3397 local &= ~EEPROM_WRITE_ENABLE;
3398 writel(local, &regs->LocalCtrl);
3399 readl(&regs->LocalCtrl);
3400 mb();
3401 udelay(ACE_LONG_DELAY);
3402 local |= EEPROM_CLK_OUT;
3403 writel(local, &regs->LocalCtrl);
3404 readl(&regs->LocalCtrl);
3405 mb();
3406 udelay(ACE_SHORT_DELAY);
3407 /* sample data in middle of high clk */
3408 state = (readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0;
3409 udelay(ACE_SHORT_DELAY);
3410 mb();
3411 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3412 readl(&regs->LocalCtrl);
3413 mb();
3415 return state;
3419 static void __init eeprom_stop(struct ace_regs *regs)
3421 u32 local;
3423 udelay(ACE_SHORT_DELAY);
3424 local = readl(&regs->LocalCtrl);
3425 local |= EEPROM_WRITE_ENABLE;
3426 writel(local, &regs->LocalCtrl);
3427 readl(&regs->LocalCtrl);
3428 mb();
3429 udelay(ACE_SHORT_DELAY);
3430 local &= ~EEPROM_DATA_OUT;
3431 writel(local, &regs->LocalCtrl);
3432 readl(&regs->LocalCtrl);
3433 mb();
3434 udelay(ACE_SHORT_DELAY);
3435 local |= EEPROM_CLK_OUT;
3436 writel(local, &regs->LocalCtrl);
3437 readl(&regs->LocalCtrl);
3438 mb();
3439 udelay(ACE_SHORT_DELAY);
3440 local |= EEPROM_DATA_OUT;
3441 writel(local, &regs->LocalCtrl);
3442 readl(&regs->LocalCtrl);
3443 mb();
3444 udelay(ACE_LONG_DELAY);
3445 local &= ~EEPROM_CLK_OUT;
3446 writel(local, &regs->LocalCtrl);
3447 mb();
3452 * Read a whole byte from the EEPROM.
3454 static int __init read_eeprom_byte(struct net_device *dev,
3455 unsigned long offset)
3457 struct ace_regs *regs;
3458 unsigned long flags;
3459 u32 local;
3460 int result = 0;
3461 short i;
3463 if (!dev) {
3464 printk(KERN_ERR "No device!\n");
3465 result = -ENODEV;
3466 goto eeprom_read_error;
3469 regs = ((struct ace_private *)dev->priv)->regs;
3472 * Don't take interrupts on this CPU will bit banging
3473 * the %#%#@$ I2C device
3475 local_irq_save(flags);
3477 eeprom_start(regs);
3479 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3480 if (eeprom_check_ack(regs)) {
3481 local_irq_restore(flags);
3482 printk(KERN_ERR "%s: Unable to sync eeprom\n", dev->name);
3483 result = -EIO;
3484 goto eeprom_read_error;
3487 eeprom_prep(regs, (offset >> 8) & 0xff);
3488 if (eeprom_check_ack(regs)) {
3489 local_irq_restore(flags);
3490 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3491 dev->name);
3492 result = -EIO;
3493 goto eeprom_read_error;
3496 eeprom_prep(regs, offset & 0xff);
3497 if (eeprom_check_ack(regs)) {
3498 local_irq_restore(flags);
3499 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3500 dev->name);
3501 result = -EIO;
3502 goto eeprom_read_error;
3505 eeprom_start(regs);
3506 eeprom_prep(regs, EEPROM_READ_SELECT);
3507 if (eeprom_check_ack(regs)) {
3508 local_irq_restore(flags);
3509 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3510 dev->name);
3511 result = -EIO;
3512 goto eeprom_read_error;
3515 for (i = 0; i < 8; i++) {
3516 local = readl(&regs->LocalCtrl);
3517 local &= ~EEPROM_WRITE_ENABLE;
3518 writel(local, &regs->LocalCtrl);
3519 readl(&regs->LocalCtrl);
3520 udelay(ACE_LONG_DELAY);
3521 mb();
3522 local |= EEPROM_CLK_OUT;
3523 writel(local, &regs->LocalCtrl);
3524 readl(&regs->LocalCtrl);
3525 mb();
3526 udelay(ACE_SHORT_DELAY);
3527 /* sample data mid high clk */
3528 result = (result << 1) |
3529 ((readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0);
3530 udelay(ACE_SHORT_DELAY);
3531 mb();
3532 local = readl(&regs->LocalCtrl);
3533 local &= ~EEPROM_CLK_OUT;
3534 writel(local, &regs->LocalCtrl);
3535 readl(&regs->LocalCtrl);
3536 udelay(ACE_SHORT_DELAY);
3537 mb();
3538 if (i == 7) {
3539 local |= EEPROM_WRITE_ENABLE;
3540 writel(local, &regs->LocalCtrl);
3541 readl(&regs->LocalCtrl);
3542 mb();
3543 udelay(ACE_SHORT_DELAY);
3547 local |= EEPROM_DATA_OUT;
3548 writel(local, &regs->LocalCtrl);
3549 readl(&regs->LocalCtrl);
3550 mb();
3551 udelay(ACE_SHORT_DELAY);
3552 writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl);
3553 readl(&regs->LocalCtrl);
3554 udelay(ACE_LONG_DELAY);
3555 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3556 readl(&regs->LocalCtrl);
3557 mb();
3558 udelay(ACE_SHORT_DELAY);
3559 eeprom_stop(regs);
3561 local_irq_restore(flags);
3562 out:
3563 return result;
3565 eeprom_read_error:
3566 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3567 dev->name, offset);
3568 goto out;
3573 * Local variables:
3574 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3575 * End: