MIPS: TXx9: Microoptimize interrupt handlers
commitee532ac91e8f25228ad2ccf7d65ba8f5b1955132
authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Mon, 1 Sep 2008 13:22:37 +0000 (1 22:22 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 9 Oct 2008 23:19:19 +0000 (10 00:19 +0100)
treeb915b5d96324ff2e20ee0e9e85de0d132fa010e6
parentae45ded2e6033837ab2fb3dae918240113519056
MIPS: TXx9: Microoptimize interrupt handlers

The IOC interrupt status register on RBTX49XX only have 8 bits.  Use
8-bit version of __fls() to optimize interrupt handlers.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/txx9/rbtx4927/irq.c
arch/mips/txx9/rbtx4938/irq.c
include/asm-mips/txx9/generic.h