| commit | 0516e4643cd22fc9f535aef02ad1de66c382c93b | |
| author | Catalin Marinas <catalin.marinas@arm.com> | |
| Thu, 30 Apr 2009 16:06:20 +0000 (30 17:06 +0100) | ||
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | |
| Thu, 30 Apr 2009 19:13:00 +0000 (30 20:13 +0100) | ||
| tree | 8b82945aa5f1ef825656aed2580cacafcd829ac3 | treesnapshot (tar.gz zip) |
| parent | 855c551f5b8cc3815d58e1056c1f1e7c461e2d24 | commitdiff |
[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data
This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| arch/arm/Kconfig | diffblobblamehistory | |
| arch/arm/mm/proc-v7.S | diffblobblamehistory |