From 1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 8 Sep 2010 21:07:28 +0100 Subject: [PATCH] drm/i915/dp: Flush the PLL register write before sleeping Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_dp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 27805a9ca87..c7aa29bfdea 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -883,6 +883,7 @@ static void ironlake_edp_pll_off(struct drm_encoder *encoder) dpa_ctl = I915_READ(DP_A); dpa_ctl |= DP_PLL_ENABLE; I915_WRITE(DP_A, dpa_ctl); + POSTING_READ(DP_A); udelay(200); } -- 2.11.4.GIT