x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1
commitf8b1a072d4f260c203eb500beb70a1e1c2ff8689
authorBorislav Petkov <borislav.petkov@amd.com>
Thu, 4 Feb 2010 11:09:07 +0000 (4 12:09 +0100)
committerGreg Kroah-Hartman <gregkh@suse.de>
Mon, 26 Apr 2010 14:47:57 +0000 (26 07:47 -0700)
treeccce3839d65923b64b64e5675f11071465df8ea7
parentad98454d28b70fafe526fbab77e67560bacde482
x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1

commit f619b3d8427eb57f0134dab75b0d217325c72411 upstream.

The show/store_cache_disable routines depend unnecessarily on NUMA's
cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA.
Remove that dependency by using a helper which is always correct.

While at it, enable L3 Cache Index disable on rev D1 Istanbuls which
sport the feature too.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20100218184339.GG20473@aftab>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/x86/kernel/cpu/intel_cacheinfo.c