| commit | c496fa1fff0248ef8cd637efb52b70dea7afaa9d | |
| author | Adam Jackson <ajax@redhat.com> | |
| Thu, 27 May 2010 21:26:45 +0000 (27 17:26 -0400) | ||
| committer | Eric Anholt <eric@anholt.net> | |
| Sat, 5 Jun 2010 00:21:41 +0000 (4 17:21 -0700) | ||
| tree | bbdc1b56f61f12d68509a2f927a9c777dc35eee7 | treesnapshot (tar.gz zip) |
| parent | f458823b864c6def488f951a79986fa205aba4f1 | commitdiff |
drm/i915/gen4: Fix interrupt setup ordering
Unmask, then enable interrupts, then enable interrupt sources; matches
PCH ordering. The old way (sources, enable, unmask) gives a window
during which interrupt conditions would appear in ISR but would never
reach IIR and thus never raise an IRQ. Since interrupts only trigger
on rising edges in ISR, this would lead to conditions where (for
example) output hotplugging would never fire an interrupt because it
was already stuck on in ISR.
Also, since we know IIR and PIPExSTAT have been cleared during
irq_preinstall, don't clear them again during irq_postinstall, nothing
good can come of that.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Unmask, then enable interrupts, then enable interrupt sources; matches
PCH ordering. The old way (sources, enable, unmask) gives a window
during which interrupt conditions would appear in ISR but would never
reach IIR and thus never raise an IRQ. Since interrupts only trigger
on rising edges in ISR, this would lead to conditions where (for
example) output hotplugging would never fire an interrupt because it
was already stuck on in ISR.
Also, since we know IIR and PIPExSTAT have been cleared during
irq_preinstall, don't clear them again during irq_postinstall, nothing
good can come of that.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
| drivers/gpu/drm/i915/i915_irq.c | diffblobblamehistory |