| commit | b5b6c7eea1124de5b110a48ac62650a690ed2419 | |
| author | Matt Fleming <matt@console-pimps.org> | |
| Sun, 21 Mar 2010 19:51:52 +0000 (21 19:51 +0000) | ||
| committer | Paul Mundt <lethal@linux-sh.org> | |
| Tue, 23 Mar 2010 04:36:21 +0000 (23 13:36 +0900) | ||
| tree | d87983aa0d009f6cfc5813f67bc4beffbd4fadf2 | treesnapshot (tar.gz zip) |
| parent | a9eb4f6d1a168c830a206306dfbb1f95a7fed6b3 | commitdiff |
sh: Replace unsafe manipulation of MMUCR
Setting the TI in MMUCR causes all the TLB bits in MMUCR to be
cleared. Unfortunately, the TLB wired bits are also cleared when setting
the TI bit, causing any wired TLB entries to become unwired.
Use local_flush_tlb_all() which implements TLB flushing in a safer
manner by using the memory-mapped TLB registers. As each CPU has its own
PMB the modifications in pmb_init() only affect the local CPU, so only
flush the local CPU's TLB.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Setting the TI in MMUCR causes all the TLB bits in MMUCR to be
cleared. Unfortunately, the TLB wired bits are also cleared when setting
the TI bit, causing any wired TLB entries to become unwired.
Use local_flush_tlb_all() which implements TLB flushing in a safer
manner by using the memory-mapped TLB registers. As each CPU has its own
PMB the modifications in pmb_init() only affect the local CPU, so only
flush the local CPU's TLB.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| arch/sh/mm/pmb.c | diffblobblamehistory | |
| arch/sh/mm/tlbflush_32.c | diffblobblamehistory |