ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
commitb0bb779b06b9b41e6e40d70300a99ca72a1b1873
authorValentine Barshak <vbarshak@mvista.com>
Mon, 13 Dec 2010 23:03:16 +0000 (14 00:03 +0100)
committerAK <andi@firstfloor.org>
Sun, 6 Feb 2011 19:03:30 +0000 (6 11:03 -0800)
treecc852ac96ea4552a032911ee48238ef8828d1c30
parentc85b1ca3a94d0a1de278faf545daa765f671b59b
ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix

commit 85b093bcc5322baa811a03ec73de0909c157f181 upstream.

Cache ownership must be acquired by reading/writing data from the
cache line to make cache operation have the desired effect on the
SMP MPCore CPU. However, the ownership is never acquired in the
v6_dma_inv_range function when cleaning the first line and
flushing the last one, in case the address is not aligned
to D_CACHE_LINE_SIZE boundary.
Fix this by reading/writing data if needed, before performing
cache operations.
While at it, fix v6_dma_flush_range to prevent RWFO outside
the buffer.

Signed-off-by: Valentine Barshak <vbarshak@mvista.com>
Signed-off-by: George G. Davis <gdavis@mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
arch/arm/mm/cache-v6.S