| commit | b06be912a3ad68c69dba0ed6e92723140020e392 | |
| author | Shaohua Li <shaohua.li@intel.com> | |
| Mon, 27 Mar 2006 09:15:24 +0000 (27 01:15 -0800) | ||
| committer | Linus Torvalds <torvalds@g5.osdl.org> | |
| Mon, 27 Mar 2006 16:44:44 +0000 (27 08:44 -0800) | ||
| tree | 4de1f2c2804ae3230e14e94d3f33a14467889233 | treesnapshot (tar.gz zip) |
| parent | 0806903316d516a3b3851c51cea5c71724d9051d | commitdiff |
[PATCH] x86: don't use cpuid.2 to determine cache info if cpuid.4 is supported
Don't use cpuid.2 to determine cache info if cpuid.4 is supported. The
exception is P4 trace cache. We always use cpuid.2 to get trace cache
under P4.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Don't use cpuid.2 to determine cache info if cpuid.4 is supported. The
exception is P4 trace cache. We always use cpuid.2 to get trace cache
under P4.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| arch/i386/kernel/cpu/intel_cacheinfo.c | diffblobblamehistory |