x86-64: support native xadd rwsem implementation
commita1f4212b5add68a969c0bb5ed08bc3f0bb9d6540
authorLinus Torvalds <torvalds@linux-foundation.org>
Wed, 13 Jan 2010 02:16:42 +0000 (12 18:16 -0800)
committerGreg Kroah-Hartman <gregkh@suse.de>
Mon, 26 Apr 2010 14:47:58 +0000 (26 07:47 -0700)
treee87b7c8adf36ce2bd727cedad850b3b76d14ff8e
parent6c7ba7a3df486d5e2940881c0983e063857dee72
x86-64: support native xadd rwsem implementation

commit bafaecd11df15ad5b1e598adc7736afcd38ee13d upstream.

This one is much faster than the spinlock based fallback rwsem code,
with certain artifical benchmarks having shown 300%+ improvement on
threaded page faults etc.

Again, note the 32767-thread limit here. So this really does need that
whole "make rwsem_count_t be 64-bit and fix the BIAS values to match"
extension on top of it, but that is conceptually a totally independent
issue.

NOT TESTED! The original patch that this all was based on were tested by
KAMEZAWA Hiroyuki, but maybe I screwed up something when I created the
cleaned-up series, so caveat emptor..

Also note that it _may_ be a good idea to mark some more registers
clobbered on x86-64 in the inline asms instead of saving/restoring them.
They are inline functions, but they are only used in places where there
are not a lot of live registers _anyway_, so doing for example the
clobbers of %r8-%r11 in the asm wouldn't make the fast-path code any
worse, and would make the slow-path code smaller.

(Not that the slow-path really matters to that degree. Saving a few
unnecessary registers is the _least_ of our problems when we hit the slow
path. The instruction/cycle counting really only matters in the fast
path).

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121810410.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/x86/Kconfig.cpu
arch/x86/lib/Makefile
arch/x86/lib/rwsem_64.S [new file with mode: 0644]