| commit | 819fbc552c8b1376926a726b92eff8b446264c3c | |
| author | Borislav Petkov <borislav.petkov@amd.com> | |
| Fri, 22 Jan 2010 15:01:05 +0000 (22 16:01 +0100) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Mon, 26 Apr 2010 14:47:56 +0000 (26 07:47 -0700) | ||
| tree | 6164aafacfb1fd4bd8b3109ce215d5cfedbb34e1 | treesnapshot (tar.gz zip) |
| parent | 7d4f404ff0b85103b84fd896c7217d34cc505d85 | commitdiff |
x86, cacheinfo: Fix disabling of L3 cache indices
commit dcf39daf3d6d97f8741e82f0b9fb7554704ed2d1 upstream.
* Correct the masks used for writing the cache index disable indices.
* Do not turn off L3 scrubber - it is not necessary.
* Make sure wbinvd is executed on the same node where the L3 is.
* Check for out-of-bounds values written to the registers.
* Make show_cache_disable hex values unambiguous
* Check for Erratum #388
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <1264172467-25155-4-git-send-email-bp@amd64.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit dcf39daf3d6d97f8741e82f0b9fb7554704ed2d1 upstream.
* Correct the masks used for writing the cache index disable indices.
* Do not turn off L3 scrubber - it is not necessary.
* Make sure wbinvd is executed on the same node where the L3 is.
* Check for out-of-bounds values written to the registers.
* Make show_cache_disable hex values unambiguous
* Check for Erratum #388
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <1264172467-25155-4-git-send-email-bp@amd64.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| arch/x86/kernel/cpu/intel_cacheinfo.c | diffblobblamehistory |