powerpc/85xx: clamp the P1022DS DIU pixel clock to allowed values
commit7b93eccf2876ba3b1c10dae22ca864a0eb08de4f
authorTimur Tabi <timur@freescale.com>
Thu, 23 Jun 2011 19:48:54 +0000 (23 14:48 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 27 Jun 2011 13:36:16 +0000 (27 08:36 -0500)
treed3afaa61a0e162eace990d7621a8949d4ae7291a
parentebf714ff37561331eb39963945d80bfc2a59e00f
powerpc/85xx: clamp the P1022DS DIU pixel clock to allowed values

To ensure that the DIU pixel clock will not be set to an invalid value,
clamp the PXCLK divider to the allowed range (2-255).  This also acts as
a limiter for the pixel clock.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/platforms/85xx/p1022_ds.c