| commit | 7665d9d2df2eb26284467c2f8591004bd511c75f | |
| author | Will Deacon <will.deacon@arm.com> | |
| Wed, 12 Jan 2011 17:10:45 +0000 (12 17:10 +0000) | ||
| committer | Will Deacon <will.deacon@arm.com> | |
| Thu, 7 Jul 2011 18:20:52 +0000 (7 19:20 +0100) | ||
| tree | aed8e0f577c63961a4b8c7ffef50e9b6c004e3f7 | treesnapshot (tar.gz zip) |
| parent | 15eb169bfec291faf25b158cfa9842b72f7803ad | commitdiff |
ARM: proc: add proc info for Cortex-A15MP using classic page tables
Multicore implementations of the Cortex-A15 require bit 6 of the
auxiliary control register to be set in order for cache and TLB
maintenance operations to be broadcast between CPUs.
This patch adds a new proc_info structure for Cortex-A15, which enables
the SMP bit during setup and includes the new HWCAP for integer
division.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Multicore implementations of the Cortex-A15 require bit 6 of the
auxiliary control register to be set in order for cache and TLB
maintenance operations to be broadcast between CPUs.
This patch adds a new proc_info structure for Cortex-A15, which enables
the SMP bit during setup and includes the new HWCAP for integer
division.
Signed-off-by: Will Deacon <will.deacon@arm.com>
| arch/arm/mm/proc-v7.S | diffblobblamehistory |