| commit | 574b69cbb633037a9c305d2993aeb680f4a8badd | |
| author | Will Deacon <will.deacon@arm.com> | |
| Fri, 25 Mar 2011 12:13:34 +0000 (25 13:13 +0100) | ||
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | |
| Sat, 26 Mar 2011 10:06:09 +0000 (26 10:06 +0000) | ||
| tree | 8fcef55167b8750eeaebffca51b937a993842136 | treesnapshot (tar.gz zip) |
| parent | d25d3b4c4d0e27975ee659a64b6d29f02fdbfde4 | commitdiff |
ARM: 6834/1: perf: reset counters on all CPUs during initialisation
ARMv7 dictates that the interrupt-enable and count-enable registers for
each PMU counter are UNKNOWN following core reset.
This patch adds a new (optional) function pointer to struct arm_pmu for
resetting the PMU state during init. The reset function is called on
each CPU via an arch_initcall in the generic ARM perf_event code and
allows the PMU backend to write sane values to any UNKNOWN registers.
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARMv7 dictates that the interrupt-enable and count-enable registers for
each PMU counter are UNKNOWN following core reset.
This patch adds a new (optional) function pointer to struct arm_pmu for
resetting the PMU state during init. The reset function is called on
each CPU via an arch_initcall in the generic ARM perf_event code and
allows the PMU backend to write sane values to any UNKNOWN registers.
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| arch/arm/kernel/perf_event.c | diffblobblamehistory | |
| arch/arm/kernel/perf_event_v7.c | diffblobblamehistory |