crypto: aes-ni - Add support to Intel AES-NI instructions for x86_64 platform
commit54b6a1bd5364aca95cd6ffae00f2b64c6511122c
authorHuang Ying <ying.huang@intel.com>
Sun, 18 Jan 2009 05:28:34 +0000 (18 16:28 +1100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Wed, 18 Feb 2009 08:48:06 +0000 (18 16:48 +0800)
treeb1e288b009df7fefa92ce001d8709b04dd20663f
parent1cac2cbc76b9f3fce0d4ccc374e724e7f2533a47
crypto: aes-ni - Add support to Intel AES-NI instructions for x86_64 platform

Intel AES-NI is a new set of Single Instruction Multiple Data (SIMD)
instructions that are going to be introduced in the next generation of
Intel processor, as of 2009. These instructions enable fast and secure
data encryption and decryption, using the Advanced Encryption Standard
(AES), defined by FIPS Publication number 197.  The architecture
introduces six instructions that offer full hardware support for
AES. Four of them support high performance data encryption and
decryption, and the other two instructions support the AES key
expansion procedure.

The white paper can be downloaded from:

http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf

AES may be used in soft_irq context, but MMX/SSE context can not be
touched safely in soft_irq context. So in_interrupt() is checked, if
in IRQ or soft_irq context, the general x86_64 implementation are used
instead.

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
arch/x86/crypto/Makefile
arch/x86/crypto/aesni-intel_asm.S [new file with mode: 0644]
arch/x86/crypto/aesni-intel_glue.c [new file with mode: 0644]
arch/x86/include/asm/cpufeature.h
crypto/Kconfig