| commit | 3247800676c4a04352cde72b9935b57ffc72ce15 | |
| author | Jan Beulich <JBeulich@novell.com> | |
| Fri, 8 Oct 2010 08:59:38 +0000 (8 04:59 -0400) | ||
| committer | Guenter Roeck <guenter.roeck@ericsson.com> | |
| Mon, 25 Oct 2010 21:11:21 +0000 (25 14:11 -0700) | ||
| tree | 5918c72fe4fbdf6f224f1e62661445870939e894 | treesnapshot (tar.gz zip) |
| parent | 17c10d61c750619324ee2a46c5a9e03a435fe212 | commitdiff |
hwmon: (coretemp) fix reading of microcode revision (v2)
According to the documentation, simply reading the respective MSR
isn't sufficient: It should be written with zeros, cpuid(1) be
executed, and then read (see arch/x86/kernel/cpu/intel.c for an
example).
v2: Fail probe when microcode revision cannot be determined, but is
needed to check for proper operation.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Chen Gong <gong.chen@linux.intel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
According to the documentation, simply reading the respective MSR
isn't sufficient: It should be written with zeros, cpuid(1) be
executed, and then read (see arch/x86/kernel/cpu/intel.c for an
example).
v2: Fail probe when microcode revision cannot be determined, but is
needed to check for proper operation.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Chen Gong <gong.chen@linux.intel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
| drivers/hwmon/coretemp.c | diffblobblamehistory |