ARMv7: Document the PRRR and NMRR registers setting
commit23d1c515d8fc6d74bea442a4b687c3b5b8627ec4
authorCatalin Marinas <catalin.marinas@arm.com>
Sat, 30 May 2009 13:00:16 +0000 (30 14:00 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Sat, 30 May 2009 13:00:16 +0000 (30 14:00 +0100)
treed257dedacef94e47006d7daca00e698296e9fa38
parent213fb2a8ee81ec106b9b370a07ccad575e9d3748
ARMv7: Document the PRRR and NMRR registers setting

This patch adds a comment to the proc-v7.S file for the setting of the
PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0
(corresponding to the reserved TEX[0]CB encoding 110) to be consistent
with the documentation.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm/mm/proc-v7.S