| commit | 0425d0a8eddbe8065a5ca705340646b7ad3d34a6 | |
| author | Dan Williams <dan.j.williams@intel.com> | |
| Fri, 7 Nov 2008 00:07:15 +0000 (7 00:07 +0000) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Thu, 13 Nov 2008 17:55:58 +0000 (13 09:55 -0800) | ||
| tree | 1fe58fcbbc104a8f481411103365d5346f251489 | treesnapshot (tar.gz zip) |
| parent | ffda96ca180ee1def996fd9a63c5a3d620caf223 | commitdiff |
ARM: xsc3: fix xsc3_l2_inv_range
commit c7cf72dcadbe39c2077b32460f86c9f8167be3be upstream
When 'start' and 'end' are less than a cacheline apart and 'start' is
unaligned we are done after cleaning and invalidating the first
cacheline. So check for (start < end) which will not walk off into
invalid address ranges when (start > end).
This issue was caught by drivers/dma/dmatest.
2.6.27 is susceptible.
Cc: <stable@kernel.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Lothar Wafmann <LW@KARO-electronics.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit c7cf72dcadbe39c2077b32460f86c9f8167be3be upstream
When 'start' and 'end' are less than a cacheline apart and 'start' is
unaligned we are done after cleaning and invalidating the first
cacheline. So check for (start < end) which will not walk off into
invalid address ranges when (start > end).
This issue was caught by drivers/dma/dmatest.
2.6.27 is susceptible.
Cc: <stable@kernel.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Lothar Wafmann <LW@KARO-electronics.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| arch/arm/mm/cache-xsc3l2.c | diffblobblamehistory |