drivers/net/wireless/ath/ath9k/htc_drv_init.c

   1 /*
   2  * Copyright (c) 2010 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "htc.h"
  18
  19 MODULE_AUTHOR("Atheros Communications");
  20 MODULE_LICENSE("Dual BSD/GPL");
  21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  22
  23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  24 module_param_named(debug, ath9k_debug, uint, 0);
  25 MODULE_PARM_DESC(debug, "Debugging mask");
  26
  27 int htc_modparam_nohwcrypt;
  28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  30
  31 #define CHAN2G(_freq, _idx)  { \
  32         .center_freq = (_freq), \
  33         .hw_value = (_idx), \
  34         .max_power = 20, \
  35 }
  36
  37 #define CHAN5G(_freq, _idx) { \
  38         .band = IEEE80211_BAND_5GHZ, \
  39         .center_freq = (_freq), \
  40         .hw_value = (_idx), \
  41         .max_power = 20, \
  42 }
  43
  44 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
  45
  46 static struct ieee80211_channel ath9k_2ghz_channels[] = {
  47         CHAN2G(2412, 0), /* Channel 1 */
  48         CHAN2G(2417, 1), /* Channel 2 */
  49         CHAN2G(2422, 2), /* Channel 3 */
  50         CHAN2G(2427, 3), /* Channel 4 */
  51         CHAN2G(2432, 4), /* Channel 5 */
  52         CHAN2G(2437, 5), /* Channel 6 */
  53         CHAN2G(2442, 6), /* Channel 7 */
  54         CHAN2G(2447, 7), /* Channel 8 */
  55         CHAN2G(2452, 8), /* Channel 9 */
  56         CHAN2G(2457, 9), /* Channel 10 */
  57         CHAN2G(2462, 10), /* Channel 11 */
  58         CHAN2G(2467, 11), /* Channel 12 */
  59         CHAN2G(2472, 12), /* Channel 13 */
  60         CHAN2G(2484, 13), /* Channel 14 */
  61 };
  62
  63 static struct ieee80211_channel ath9k_5ghz_channels[] = {
  64         /* _We_ call this UNII 1 */
  65         CHAN5G(5180, 14), /* Channel 36 */
  66         CHAN5G(5200, 15), /* Channel 40 */
  67         CHAN5G(5220, 16), /* Channel 44 */
  68         CHAN5G(5240, 17), /* Channel 48 */
  69         /* _We_ call this UNII 2 */
  70         CHAN5G(5260, 18), /* Channel 52 */
  71         CHAN5G(5280, 19), /* Channel 56 */
  72         CHAN5G(5300, 20), /* Channel 60 */
  73         CHAN5G(5320, 21), /* Channel 64 */
  74         /* _We_ call this "Middle band" */
  75         CHAN5G(5500, 22), /* Channel 100 */
  76         CHAN5G(5520, 23), /* Channel 104 */
  77         CHAN5G(5540, 24), /* Channel 108 */
  78         CHAN5G(5560, 25), /* Channel 112 */
  79         CHAN5G(5580, 26), /* Channel 116 */
  80         CHAN5G(5600, 27), /* Channel 120 */
  81         CHAN5G(5620, 28), /* Channel 124 */
  82         CHAN5G(5640, 29), /* Channel 128 */
  83         CHAN5G(5660, 30), /* Channel 132 */
  84         CHAN5G(5680, 31), /* Channel 136 */
  85         CHAN5G(5700, 32), /* Channel 140 */
  86         /* _We_ call this UNII 3 */
  87         CHAN5G(5745, 33), /* Channel 149 */
  88         CHAN5G(5765, 34), /* Channel 153 */
  89         CHAN5G(5785, 35), /* Channel 157 */
  90         CHAN5G(5805, 36), /* Channel 161 */
  91         CHAN5G(5825, 37), /* Channel 165 */
  92 };
  93
  94 /* Atheros hardware rate code addition for short premble */
  95 #define SHPCHECK(__hw_rate, __flags) \
  96         ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
  97
  98 #define RATE(_bitrate, _hw_rate, _flags) {              \
  99         .bitrate        = (_bitrate),                   \
 100         .flags          = (_flags),                     \
 101         .hw_value       = (_hw_rate),                   \
 102         .hw_value_short = (SHPCHECK(_hw_rate, _flags))  \
 103 }
 104
 105 static struct ieee80211_rate ath9k_legacy_rates[] = {
 106         RATE(10, 0x1b, 0),
 107         RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
 108         RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
 109         RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
 110         RATE(60, 0x0b, 0),
 111         RATE(90, 0x0f, 0),
 112         RATE(120, 0x0a, 0),
 113         RATE(180, 0x0e, 0),
 114         RATE(240, 0x09, 0),
 115         RATE(360, 0x0d, 0),
 116         RATE(480, 0x08, 0),
 117         RATE(540, 0x0c, 0),
 118 };
 119
 120 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
 121 {
 122         int time_left;
 123
 124         if (atomic_read(&priv->htc->tgt_ready) > 0) {
 125                 atomic_dec(&priv->htc->tgt_ready);
 126                 return 0;
 127         }
 128
 129         /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
 130         time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
 131         if (!time_left) {
 132                 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
 133                 return -ETIMEDOUT;
 134         }
 135
 136         atomic_dec(&priv->htc->tgt_ready);
 137
 138         return 0;
 139 }
 140
 141 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
 142 {
 143         ath9k_htc_exit_debug(priv->ah);
 144         ath9k_hw_deinit(priv->ah);
 145         tasklet_kill(&priv->wmi_tasklet);
 146         tasklet_kill(&priv->rx_tasklet);
 147         tasklet_kill(&priv->tx_tasklet);
 148         kfree(priv->ah);
 149         priv->ah = NULL;
 150 }
 151
 152 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
 153 {
 154         struct ieee80211_hw *hw = priv->hw;
 155
 156         wiphy_rfkill_stop_polling(hw->wiphy);
 157         ath9k_deinit_leds(priv);
 158         ieee80211_unregister_hw(hw);
 159         ath9k_rx_cleanup(priv);
 160         ath9k_tx_cleanup(priv);
 161         ath9k_deinit_priv(priv);
 162 }
 163
 164 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
 165                                         u16 service_id,
 166                                         void (*tx) (void *,
 167                                                     struct sk_buff *,
 168                                                     enum htc_endpoint_id,
 169                                                     bool txok),
 170                                         enum htc_endpoint_id *ep_id)
 171 {
 172         struct htc_service_connreq req;
 173
 174         memset(&req, 0, sizeof(struct htc_service_connreq));
 175
 176         req.service_id = service_id;
 177         req.ep_callbacks.priv = priv;
 178         req.ep_callbacks.rx = ath9k_htc_rxep;
 179         req.ep_callbacks.tx = tx;
 180
 181         return htc_connect_service(priv->htc, &req, ep_id);
 182 }
 183
 184 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
 185                                    u32 drv_info)
 186 {
 187         int ret;
 188
 189         /* WMI CMD*/
 190         ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
 191         if (ret)
 192                 goto err;
 193
 194         /* Beacon */
 195         ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
 196                                     &priv->beacon_ep);
 197         if (ret)
 198                 goto err;
 199
 200         /* CAB */
 201         ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
 202                                     &priv->cab_ep);
 203         if (ret)
 204                 goto err;
 205
 206
 207         /* UAPSD */
 208         ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
 209                                     &priv->uapsd_ep);
 210         if (ret)
 211                 goto err;
 212
 213         /* MGMT */
 214         ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
 215                                     &priv->mgmt_ep);
 216         if (ret)
 217                 goto err;
 218
 219         /* DATA BE */
 220         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
 221                                     &priv->data_be_ep);
 222         if (ret)
 223                 goto err;
 224
 225         /* DATA BK */
 226         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
 227                                     &priv->data_bk_ep);
 228         if (ret)
 229                 goto err;
 230
 231         /* DATA VI */
 232         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
 233                                     &priv->data_vi_ep);
 234         if (ret)
 235                 goto err;
 236
 237         /* DATA VO */
 238         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
 239                                     &priv->data_vo_ep);
 240         if (ret)
 241                 goto err;
 242
 243         /*
 244          * Setup required credits before initializing HTC.
 245          * This is a bit hacky, but, since queuing is done in
 246          * the HIF layer, shouldn't matter much.
 247          */
 248
 249         if (drv_info & AR7010_DEVICE)
 250                 priv->htc->credits = 45;
 251         else
 252                 priv->htc->credits = 33;
 253
 254         ret = htc_init(priv->htc);
 255         if (ret)
 256                 goto err;
 257
 258         dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
 259                  priv->htc->credits);
 260
 261         return 0;
 262
 263 err:
 264         dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
 265         return ret;
 266 }
 267
 268 static int ath9k_reg_notifier(struct wiphy *wiphy,
 269                               struct regulatory_request *request)
 270 {
 271         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
 272         struct ath9k_htc_priv *priv = hw->priv;
 273
 274         return ath_reg_notifier_apply(wiphy, request,
 275                                       ath9k_hw_regulatory(priv->ah));
 276 }
 277
 278 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
 279 {
 280         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 281         struct ath_common *common = ath9k_hw_common(ah);
 282         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 283         __be32 val, reg = cpu_to_be32(reg_offset);
 284         int r;
 285
 286         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
 287                           (u8 *) &reg, sizeof(reg),
 288                           (u8 *) &val, sizeof(val),
 289                           100);
 290         if (unlikely(r)) {
 291                 ath_print(common, ATH_DBG_WMI,
 292                           "REGISTER READ FAILED: (0x%04x, %d)\n",
 293                            reg_offset, r);
 294                 return -EIO;
 295         }
 296
 297         return be32_to_cpu(val);
 298 }
 299
 300 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
 301 {
 302         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 303         struct ath_common *common = ath9k_hw_common(ah);
 304         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 305         const __be32 buf[2] = {
 306                 cpu_to_be32(reg_offset),
 307                 cpu_to_be32(val),
 308         };
 309         int r;
 310
 311         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 312                           (u8 *) &buf, sizeof(buf),
 313                           (u8 *) &val, sizeof(val),
 314                           100);
 315         if (unlikely(r)) {
 316                 ath_print(common, ATH_DBG_WMI,
 317                           "REGISTER WRITE FAILED:(0x%04x, %d)\n",
 318                           reg_offset, r);
 319         }
 320 }
 321
 322 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
 323 {
 324         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 325         struct ath_common *common = ath9k_hw_common(ah);
 326         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 327         u32 rsp_status;
 328         int r;
 329
 330         mutex_lock(&priv->wmi->multi_write_mutex);
 331
 332         /* Store the register/value */
 333         priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
 334                 cpu_to_be32(reg_offset);
 335         priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
 336                 cpu_to_be32(val);
 337
 338         priv->wmi->multi_write_idx++;
 339
 340         /* If the buffer is full, send it out. */
 341         if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
 342                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 343                           (u8 *) &priv->wmi->multi_write,
 344                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 345                           (u8 *) &rsp_status, sizeof(rsp_status),
 346                           100);
 347                 if (unlikely(r)) {
 348                         ath_print(common, ATH_DBG_WMI,
 349                                   "REGISTER WRITE FAILED, multi len: %d\n",
 350                                   priv->wmi->multi_write_idx);
 351                 }
 352                 priv->wmi->multi_write_idx = 0;
 353         }
 354
 355         mutex_unlock(&priv->wmi->multi_write_mutex);
 356 }
 357
 358 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
 359 {
 360         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 361         struct ath_common *common = ath9k_hw_common(ah);
 362         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 363
 364         if (atomic_read(&priv->wmi->mwrite_cnt))
 365                 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
 366         else
 367                 ath9k_regwrite_single(hw_priv, val, reg_offset);
 368 }
 369
 370 static void ath9k_enable_regwrite_buffer(void *hw_priv)
 371 {
 372         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 373         struct ath_common *common = ath9k_hw_common(ah);
 374         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 375
 376         atomic_inc(&priv->wmi->mwrite_cnt);
 377 }
 378
 379 static void ath9k_regwrite_flush(void *hw_priv)
 380 {
 381         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 382         struct ath_common *common = ath9k_hw_common(ah);
 383         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 384         u32 rsp_status;
 385         int r;
 386
 387         atomic_dec(&priv->wmi->mwrite_cnt);
 388
 389         mutex_lock(&priv->wmi->multi_write_mutex);
 390
 391         if (priv->wmi->multi_write_idx) {
 392                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 393                           (u8 *) &priv->wmi->multi_write,
 394                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 395                           (u8 *) &rsp_status, sizeof(rsp_status),
 396                           100);
 397                 if (unlikely(r)) {
 398                         ath_print(common, ATH_DBG_WMI,
 399                                   "REGISTER WRITE FAILED, multi len: %d\n",
 400                                   priv->wmi->multi_write_idx);
 401                 }
 402                 priv->wmi->multi_write_idx = 0;
 403         }
 404
 405         mutex_unlock(&priv->wmi->multi_write_mutex);
 406 }
 407
 408 static const struct ath_ops ath9k_common_ops = {
 409         .read = ath9k_regread,
 410         .write = ath9k_regwrite,
 411         .enable_write_buffer = ath9k_enable_regwrite_buffer,
 412         .write_flush = ath9k_regwrite_flush,
 413 };
 414
 415 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
 416 {
 417         *csz = L1_CACHE_BYTES >> 2;
 418 }
 419
 420 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
 421 {
 422         struct ath_hw *ah = (struct ath_hw *) common->ah;
 423
 424         (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
 425
 426         if (!ath9k_hw_wait(ah,
 427                            AR_EEPROM_STATUS_DATA,
 428                            AR_EEPROM_STATUS_DATA_BUSY |
 429                            AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
 430                            AH_WAIT_TIMEOUT))
 431                 return false;
 432
 433         *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
 434                    AR_EEPROM_STATUS_DATA_VAL);
 435
 436         return true;
 437 }
 438
 439 static const struct ath_bus_ops ath9k_usb_bus_ops = {
 440         .ath_bus_type = ATH_USB,
 441         .read_cachesize = ath_usb_read_cachesize,
 442         .eeprom_read = ath_usb_eeprom_read,
 443 };
 444
 445 static void setup_ht_cap(struct ath9k_htc_priv *priv,
 446                          struct ieee80211_sta_ht_cap *ht_info)
 447 {
 448         struct ath_common *common = ath9k_hw_common(priv->ah);
 449         u8 tx_streams, rx_streams;
 450         int i;
 451
 452         ht_info->ht_supported = true;
 453         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 454                        IEEE80211_HT_CAP_SM_PS |
 455                        IEEE80211_HT_CAP_SGI_40 |
 456                        IEEE80211_HT_CAP_DSSSCCK40;
 457
 458         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
 459                 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
 460
 461         ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
 462
 463         ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
 464         ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
 465
 466         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 467
 468         /* ath9k_htc supports only 1 or 2 stream devices */
 469         tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
 470         rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
 471
 472         ath_print(common, ATH_DBG_CONFIG,
 473                   "TX streams %d, RX streams: %d\n",
 474                   tx_streams, rx_streams);
 475
 476         if (tx_streams != rx_streams) {
 477                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
 478                 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
 479                                            IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
 480         }
 481
 482         for (i = 0; i < rx_streams; i++)
 483                 ht_info->mcs.rx_mask[i] = 0xff;
 484
 485         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
 486 }
 487
 488 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
 489 {
 490         struct ath_common *common = ath9k_hw_common(priv->ah);
 491         int i;
 492
 493         for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
 494                 priv->hwq_map[i] = -1;
 495
 496         priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
 497         if (priv->beaconq == -1) {
 498                 ath_print(common, ATH_DBG_FATAL,
 499                           "Unable to setup BEACON xmit queue\n");
 500                 goto err;
 501         }
 502
 503         priv->cabq = ath9k_htc_cabq_setup(priv);
 504         if (priv->cabq == -1) {
 505                 ath_print(common, ATH_DBG_FATAL,
 506                           "Unable to setup CAB xmit queue\n");
 507                 goto err;
 508         }
 509
 510         if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
 511                 ath_print(common, ATH_DBG_FATAL,
 512                           "Unable to setup xmit queue for BE traffic\n");
 513                 goto err;
 514         }
 515
 516         if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
 517                 ath_print(common, ATH_DBG_FATAL,
 518                           "Unable to setup xmit queue for BK traffic\n");
 519                 goto err;
 520         }
 521         if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
 522                 ath_print(common, ATH_DBG_FATAL,
 523                           "Unable to setup xmit queue for VI traffic\n");
 524                 goto err;
 525         }
 526         if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
 527                 ath_print(common, ATH_DBG_FATAL,
 528                           "Unable to setup xmit queue for VO traffic\n");
 529                 goto err;
 530         }
 531
 532         return 0;
 533
 534 err:
 535         return -EINVAL;
 536 }
 537
 538 static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
 539 {
 540         struct ath_common *common = ath9k_hw_common(priv->ah);
 541         int i = 0;
 542
 543         /* Get the hardware key cache size. */
 544         common->keymax = priv->ah->caps.keycache_size;
 545         if (common->keymax > ATH_KEYMAX) {
 546                 ath_print(common, ATH_DBG_ANY,
 547                           "Warning, using only %u entries in %u key cache\n",
 548                           ATH_KEYMAX, common->keymax);
 549                 common->keymax = ATH_KEYMAX;
 550         }
 551
 552         if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
 553                 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
 554
 555         /*
 556          * Reset the key cache since some parts do not
 557          * reset the contents on initial power up.
 558          */
 559         for (i = 0; i < common->keymax; i++)
 560                 ath_hw_keyreset(common, (u16) i);
 561 }
 562
 563 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
 564 {
 565         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
 566                 priv->sbands[IEEE80211_BAND_2GHZ].channels =
 567                         ath9k_2ghz_channels;
 568                 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
 569                 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
 570                         ARRAY_SIZE(ath9k_2ghz_channels);
 571                 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
 572                 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
 573                         ARRAY_SIZE(ath9k_legacy_rates);
 574         }
 575
 576         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
 577                 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
 578                 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
 579                 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
 580                         ARRAY_SIZE(ath9k_5ghz_channels);
 581                 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
 582                         ath9k_legacy_rates + 4;
 583                 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
 584                         ARRAY_SIZE(ath9k_legacy_rates) - 4;
 585         }
 586 }
 587
 588 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
 589 {
 590         struct ath_common *common = ath9k_hw_common(priv->ah);
 591
 592         common->tx_chainmask = priv->ah->caps.tx_chainmask;
 593         common->rx_chainmask = priv->ah->caps.rx_chainmask;
 594
 595         memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
 596
 597         priv->ah->opmode = NL80211_IFTYPE_STATION;
 598 }
 599
 600 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
 601 {
 602         int qnum;
 603
 604         switch (priv->ah->btcoex_hw.scheme) {
 605         case ATH_BTCOEX_CFG_NONE:
 606                 break;
 607         case ATH_BTCOEX_CFG_3WIRE:
 608                 priv->ah->btcoex_hw.btactive_gpio = 7;
 609                 priv->ah->btcoex_hw.btpriority_gpio = 6;
 610                 priv->ah->btcoex_hw.wlanactive_gpio = 8;
 611                 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
 612                 ath9k_hw_btcoex_init_3wire(priv->ah);
 613                 ath_htc_init_btcoex_work(priv);
 614                 qnum = priv->hwq_map[WME_AC_BE];
 615                 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
 616                 break;
 617         default:
 618                 WARN_ON(1);
 619                 break;
 620         }
 621 }
 622
 623 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
 624                            u16 devid, char *product,
 625                            u32 drv_info)
 626 {
 627         struct ath_hw *ah = NULL;
 628         struct ath_common *common;
 629         int ret = 0, csz = 0;
 630
 631         priv->op_flags |= OP_INVALID;
 632
 633         ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
 634         if (!ah)
 635                 return -ENOMEM;
 636
 637         ah->hw_version.devid = devid;
 638         ah->hw_version.subsysid = 0; /* FIXME */
 639         ah->ah_flags |= AH_USE_EEPROM;
 640         priv->ah = ah;
 641
 642         common = ath9k_hw_common(ah);
 643         common->ops = &ath9k_common_ops;
 644         common->bus_ops = &ath9k_usb_bus_ops;
 645         common->ah = ah;
 646         common->hw = priv->hw;
 647         common->priv = priv;
 648         common->debug_mask = ath9k_debug;
 649         common->driver_info = drv_info;
 650
 651         spin_lock_init(&priv->wmi->wmi_lock);
 652         spin_lock_init(&priv->beacon_lock);
 653         spin_lock_init(&priv->tx_lock);
 654         mutex_init(&priv->mutex);
 655         mutex_init(&priv->htc_pm_lock);
 656         tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
 657                      (unsigned long)priv);
 658         tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
 659                      (unsigned long)priv);
 660         tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
 661         INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
 662         INIT_WORK(&priv->ps_work, ath9k_ps_work);
 663
 664         /*
 665          * Cache line size is used to size and align various
 666          * structures used to communicate with the hardware.
 667          */
 668         ath_read_cachesize(common, &csz);
 669         common->cachelsz = csz << 2; /* convert to bytes */
 670
 671         ret = ath9k_hw_init(ah);
 672         if (ret) {
 673                 ath_print(common, ATH_DBG_FATAL,
 674                           "Unable to initialize hardware; "
 675                           "initialization status: %d\n", ret);
 676                 goto err_hw;
 677         }
 678
 679         ret = ath9k_htc_init_debug(ah);
 680         if (ret) {
 681                 ath_print(common, ATH_DBG_FATAL,
 682                           "Unable to create debugfs files\n");
 683                 goto err_debug;
 684         }
 685
 686         ret = ath9k_init_queues(priv);
 687         if (ret)
 688                 goto err_queues;
 689
 690         ath9k_init_crypto(priv);
 691         ath9k_init_channels_rates(priv);
 692         ath9k_init_misc(priv);
 693
 694         if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
 695                 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
 696                 ath9k_init_btcoex(priv);
 697         }
 698
 699         return 0;
 700
 701 err_queues:
 702         ath9k_htc_exit_debug(ah);
 703 err_debug:
 704         ath9k_hw_deinit(ah);
 705 err_hw:
 706
 707         kfree(ah);
 708         priv->ah = NULL;
 709
 710         return ret;
 711 }
 712
 713 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
 714                                struct ieee80211_hw *hw)
 715 {
 716         struct ath_common *common = ath9k_hw_common(priv->ah);
 717
 718         hw->flags = IEEE80211_HW_SIGNAL_DBM |
 719                 IEEE80211_HW_AMPDU_AGGREGATION |
 720                 IEEE80211_HW_SPECTRUM_MGMT |
 721                 IEEE80211_HW_HAS_RATE_CONTROL |
 722                 IEEE80211_HW_RX_INCLUDES_FCS |
 723                 IEEE80211_HW_SUPPORTS_PS |
 724                 IEEE80211_HW_PS_NULLFUNC_STACK;
 725
 726         hw->wiphy->interface_modes =
 727                 BIT(NL80211_IFTYPE_STATION) |
 728                 BIT(NL80211_IFTYPE_ADHOC);
 729
 730         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
 731
 732         hw->queues = 4;
 733         hw->channel_change_time = 5000;
 734         hw->max_listen_interval = 10;
 735         hw->vif_data_size = sizeof(struct ath9k_htc_vif);
 736         hw->sta_data_size = sizeof(struct ath9k_htc_sta);
 737
 738         /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
 739         hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
 740                 sizeof(struct htc_frame_hdr) + 4;
 741
 742         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
 743                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
 744                         &priv->sbands[IEEE80211_BAND_2GHZ];
 745         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
 746                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 747                         &priv->sbands[IEEE80211_BAND_5GHZ];
 748
 749         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
 750                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
 751                         setup_ht_cap(priv,
 752                                      &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
 753                 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
 754                         setup_ht_cap(priv,
 755                                      &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
 756         }
 757
 758         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
 759 }
 760
 761 static int ath9k_init_device(struct ath9k_htc_priv *priv,
 762                              u16 devid, char *product, u32 drv_info)
 763 {
 764         struct ieee80211_hw *hw = priv->hw;
 765         struct ath_common *common;
 766         struct ath_hw *ah;
 767         int error = 0;
 768         struct ath_regulatory *reg;
 769
 770         /* Bring up device */
 771         error = ath9k_init_priv(priv, devid, product, drv_info);
 772         if (error != 0)
 773                 goto err_init;
 774
 775         ah = priv->ah;
 776         common = ath9k_hw_common(ah);
 777         ath9k_set_hw_capab(priv, hw);
 778
 779         /* Initialize regulatory */
 780         error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
 781                               ath9k_reg_notifier);
 782         if (error)
 783                 goto err_regd;
 784
 785         reg = &common->regulatory;
 786
 787         /* Setup TX */
 788         error = ath9k_tx_init(priv);
 789         if (error != 0)
 790                 goto err_tx;
 791
 792         /* Setup RX */
 793         error = ath9k_rx_init(priv);
 794         if (error != 0)
 795                 goto err_rx;
 796
 797         /* Register with mac80211 */
 798         error = ieee80211_register_hw(hw);
 799         if (error)
 800                 goto err_register;
 801
 802         /* Handle world regulatory */
 803         if (!ath_is_world_regd(reg)) {
 804                 error = regulatory_hint(hw->wiphy, reg->alpha2);
 805                 if (error)
 806                         goto err_world;
 807         }
 808
 809         ath9k_init_leds(priv);
 810         ath9k_start_rfkill_poll(priv);
 811
 812         return 0;
 813
 814 err_world:
 815         ieee80211_unregister_hw(hw);
 816 err_register:
 817         ath9k_rx_cleanup(priv);
 818 err_rx:
 819         ath9k_tx_cleanup(priv);
 820 err_tx:
 821         /* Nothing */
 822 err_regd:
 823         ath9k_deinit_priv(priv);
 824 err_init:
 825         return error;
 826 }
 827
 828 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
 829                            u16 devid, char *product, u32 drv_info)
 830 {
 831         struct ieee80211_hw *hw;
 832         struct ath9k_htc_priv *priv;
 833         int ret;
 834
 835         hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
 836         if (!hw)
 837                 return -ENOMEM;
 838
 839         priv = hw->priv;
 840         priv->hw = hw;
 841         priv->htc = htc_handle;
 842         priv->dev = dev;
 843         htc_handle->drv_priv = priv;
 844         SET_IEEE80211_DEV(hw, priv->dev);
 845
 846         ret = ath9k_htc_wait_for_target(priv);
 847         if (ret)
 848                 goto err_free;
 849
 850         priv->wmi = ath9k_init_wmi(priv);
 851         if (!priv->wmi) {
 852                 ret = -EINVAL;
 853                 goto err_free;
 854         }
 855
 856         ret = ath9k_init_htc_services(priv, devid, drv_info);
 857         if (ret)
 858                 goto err_init;
 859
 860         /* The device may have been unplugged earlier. */
 861         priv->op_flags &= ~OP_UNPLUGGED;
 862
 863         ret = ath9k_init_device(priv, devid, product, drv_info);
 864         if (ret)
 865                 goto err_init;
 866
 867         return 0;
 868
 869 err_init:
 870         ath9k_deinit_wmi(priv);
 871 err_free:
 872         ieee80211_free_hw(hw);
 873         return ret;
 874 }
 875
 876 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
 877 {
 878         if (htc_handle->drv_priv) {
 879
 880                 /* Check if the device has been yanked out. */
 881                 if (hotunplug)
 882                         htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
 883
 884                 ath9k_deinit_device(htc_handle->drv_priv);
 885                 ath9k_deinit_wmi(htc_handle->drv_priv);
 886                 ieee80211_free_hw(htc_handle->drv_priv->hw);
 887         }
 888 }
 889
 890 #ifdef CONFIG_PM
 891 int ath9k_htc_resume(struct htc_target *htc_handle)
 892 {
 893         struct ath9k_htc_priv *priv = htc_handle->drv_priv;
 894         int ret;
 895
 896         ret = ath9k_htc_wait_for_target(priv);
 897         if (ret)
 898                 return ret;
 899
 900         ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
 901                                       priv->ah->common.driver_info);
 902         return ret;
 903 }
 904 #endif
 905
 906 static int __init ath9k_htc_init(void)
 907 {
 908         int error;
 909
 910         error = ath9k_htc_debug_create_root();
 911         if (error < 0) {
 912                 printk(KERN_ERR
 913                         "ath9k_htc: Unable to create debugfs root: %d\n",
 914                         error);
 915                 goto err_dbg;
 916         }
 917
 918         error = ath9k_hif_usb_init();
 919         if (error < 0) {
 920                 printk(KERN_ERR
 921                         "ath9k_htc: No USB devices found,"
 922                         " driver not installed.\n");
 923                 error = -ENODEV;
 924                 goto err_usb;
 925         }
 926
 927         return 0;
 928
 929 err_usb:
 930         ath9k_htc_debug_remove_root();
 931 err_dbg:
 932         return error;
 933 }
 934 module_init(ath9k_htc_init);
 935
 936 static void __exit ath9k_htc_exit(void)
 937 {
 938         ath9k_hif_usb_exit();
 939         ath9k_htc_debug_remove_root();
 940         printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
 941 }
 942 module_exit(ath9k_htc_exit);