2 * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver
4 * This is a driver for the SDHC controller found in Freescale MX2/MX3
5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
6 * Unlike the hardware found on MX1, this hardware just works and does
7 * not need all the quirks found in imxmmc.c, hence the separate driver.
9 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
10 * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
12 * derived from pxamci.c by Russell King
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/blkdev.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/card.h>
30 #include <linux/delay.h>
31 #include <linux/clk.h>
33 #include <linux/gpio.h>
37 #include <asm/sizes.h>
40 #ifdef CONFIG_ARCH_MX2
41 #include <mach/dma-mx1-mx2.h>
45 #define DRIVER_NAME "mxc-mmc"
47 #define MMC_REG_STR_STP_CLK 0x00
48 #define MMC_REG_STATUS 0x04
49 #define MMC_REG_CLK_RATE 0x08
50 #define MMC_REG_CMD_DAT_CONT 0x0C
51 #define MMC_REG_RES_TO 0x10
52 #define MMC_REG_READ_TO 0x14
53 #define MMC_REG_BLK_LEN 0x18
54 #define MMC_REG_NOB 0x1C
55 #define MMC_REG_REV_NO 0x20
56 #define MMC_REG_INT_CNTR 0x24
57 #define MMC_REG_CMD 0x28
58 #define MMC_REG_ARG 0x2C
59 #define MMC_REG_RES_FIFO 0x34
60 #define MMC_REG_BUFFER_ACCESS 0x38
62 #define STR_STP_CLK_RESET (1 << 3)
63 #define STR_STP_CLK_START_CLK (1 << 1)
64 #define STR_STP_CLK_STOP_CLK (1 << 0)
66 #define STATUS_CARD_INSERTION (1 << 31)
67 #define STATUS_CARD_REMOVAL (1 << 30)
68 #define STATUS_YBUF_EMPTY (1 << 29)
69 #define STATUS_XBUF_EMPTY (1 << 28)
70 #define STATUS_YBUF_FULL (1 << 27)
71 #define STATUS_XBUF_FULL (1 << 26)
72 #define STATUS_BUF_UND_RUN (1 << 25)
73 #define STATUS_BUF_OVFL (1 << 24)
74 #define STATUS_SDIO_INT_ACTIVE (1 << 14)
75 #define STATUS_END_CMD_RESP (1 << 13)
76 #define STATUS_WRITE_OP_DONE (1 << 12)
77 #define STATUS_DATA_TRANS_DONE (1 << 11)
78 #define STATUS_READ_OP_DONE (1 << 11)
79 #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10)
80 #define STATUS_CARD_BUS_CLK_RUN (1 << 8)
81 #define STATUS_BUF_READ_RDY (1 << 7)
82 #define STATUS_BUF_WRITE_RDY (1 << 6)
83 #define STATUS_RESP_CRC_ERR (1 << 5)
84 #define STATUS_CRC_READ_ERR (1 << 3)
85 #define STATUS_CRC_WRITE_ERR (1 << 2)
86 #define STATUS_TIME_OUT_RESP (1 << 1)
87 #define STATUS_TIME_OUT_READ (1 << 0)
88 #define STATUS_ERR_MASK 0x2f
90 #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12)
91 #define CMD_DAT_CONT_STOP_READWAIT (1 << 11)
92 #define CMD_DAT_CONT_START_READWAIT (1 << 10)
93 #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8)
94 #define CMD_DAT_CONT_INIT (1 << 7)
95 #define CMD_DAT_CONT_WRITE (1 << 4)
96 #define CMD_DAT_CONT_DATA_ENABLE (1 << 3)
97 #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0)
98 #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0)
99 #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0)
101 #define INT_SDIO_INT_WKP_EN (1 << 18)
102 #define INT_CARD_INSERTION_WKP_EN (1 << 17)
103 #define INT_CARD_REMOVAL_WKP_EN (1 << 16)
104 #define INT_CARD_INSERTION_EN (1 << 15)
105 #define INT_CARD_REMOVAL_EN (1 << 14)
106 #define INT_SDIO_IRQ_EN (1 << 13)
107 #define INT_DAT0_EN (1 << 12)
108 #define INT_BUF_READ_EN (1 << 4)
109 #define INT_BUF_WRITE_EN (1 << 3)
110 #define INT_END_CMD_RES_EN (1 << 2)
111 #define INT_WRITE_OP_DONE_EN (1 << 1)
112 #define INT_READ_OP_EN (1 << 0)
115 struct mmc_host
*mmc
;
116 struct resource
*res
;
123 unsigned int power_mode
;
124 struct imxmmc_platform_data
*pdata
;
126 struct mmc_request
*req
;
127 struct mmc_command
*cmd
;
128 struct mmc_data
*data
;
130 unsigned int dma_nents
;
131 unsigned int datasize
;
132 unsigned int dma_dir
;
141 struct work_struct datawork
;
145 static void mxcmci_set_clk_rate(struct mxcmci_host
*host
, unsigned int clk_ios
);
147 static inline int mxcmci_use_dma(struct mxcmci_host
*host
)
152 static void mxcmci_softreset(struct mxcmci_host
*host
)
156 dev_dbg(mmc_dev(host
->mmc
), "mxcmci_softreset\n");
159 writew(STR_STP_CLK_RESET
, host
->base
+ MMC_REG_STR_STP_CLK
);
160 writew(STR_STP_CLK_RESET
| STR_STP_CLK_START_CLK
,
161 host
->base
+ MMC_REG_STR_STP_CLK
);
163 for (i
= 0; i
< 8; i
++)
164 writew(STR_STP_CLK_START_CLK
, host
->base
+ MMC_REG_STR_STP_CLK
);
166 writew(0xff, host
->base
+ MMC_REG_RES_TO
);
169 static int mxcmci_setup_data(struct mxcmci_host
*host
, struct mmc_data
*data
)
171 unsigned int nob
= data
->blocks
;
172 unsigned int blksz
= data
->blksz
;
173 unsigned int datasize
= nob
* blksz
;
175 struct scatterlist
*sg
;
179 if (data
->flags
& MMC_DATA_STREAM
)
183 data
->bytes_xfered
= 0;
185 writew(nob
, host
->base
+ MMC_REG_NOB
);
186 writew(blksz
, host
->base
+ MMC_REG_BLK_LEN
);
187 host
->datasize
= datasize
;
190 for_each_sg(data
->sg
, sg
, data
->sg_len
, i
) {
191 if (sg
->offset
& 3 || sg
->length
& 3) {
197 if (data
->flags
& MMC_DATA_READ
) {
198 host
->dma_dir
= DMA_FROM_DEVICE
;
199 host
->dma_nents
= dma_map_sg(mmc_dev(host
->mmc
), data
->sg
,
200 data
->sg_len
, host
->dma_dir
);
202 ret
= imx_dma_setup_sg(host
->dma
, data
->sg
, host
->dma_nents
,
204 host
->res
->start
+ MMC_REG_BUFFER_ACCESS
,
207 host
->dma_dir
= DMA_TO_DEVICE
;
208 host
->dma_nents
= dma_map_sg(mmc_dev(host
->mmc
), data
->sg
,
209 data
->sg_len
, host
->dma_dir
);
211 ret
= imx_dma_setup_sg(host
->dma
, data
->sg
, host
->dma_nents
,
213 host
->res
->start
+ MMC_REG_BUFFER_ACCESS
,
218 dev_err(mmc_dev(host
->mmc
), "failed to setup DMA : %d\n", ret
);
223 imx_dma_enable(host
->dma
);
228 static int mxcmci_start_cmd(struct mxcmci_host
*host
, struct mmc_command
*cmd
,
234 WARN_ON(host
->cmd
!= NULL
);
237 switch (mmc_resp_type(cmd
)) {
238 case MMC_RSP_R1
: /* short CRC, OPCODE */
239 case MMC_RSP_R1B
:/* short CRC, OPCODE, BUSY */
240 cmdat
|= CMD_DAT_CONT_RESPONSE_48BIT_CRC
;
242 case MMC_RSP_R2
: /* long 136 bit + CRC */
243 cmdat
|= CMD_DAT_CONT_RESPONSE_136BIT
;
245 case MMC_RSP_R3
: /* short */
246 cmdat
|= CMD_DAT_CONT_RESPONSE_48BIT
;
251 dev_err(mmc_dev(host
->mmc
), "unhandled response type 0x%x\n",
253 cmd
->error
= -EINVAL
;
257 int_cntr
= INT_END_CMD_RES_EN
;
259 if (mxcmci_use_dma(host
))
260 int_cntr
|= INT_READ_OP_EN
| INT_WRITE_OP_DONE_EN
;
262 spin_lock_irqsave(&host
->lock
, flags
);
264 int_cntr
|= INT_SDIO_IRQ_EN
;
265 writel(int_cntr
, host
->base
+ MMC_REG_INT_CNTR
);
266 spin_unlock_irqrestore(&host
->lock
, flags
);
268 writew(cmd
->opcode
, host
->base
+ MMC_REG_CMD
);
269 writel(cmd
->arg
, host
->base
+ MMC_REG_ARG
);
270 writew(cmdat
, host
->base
+ MMC_REG_CMD_DAT_CONT
);
275 static void mxcmci_finish_request(struct mxcmci_host
*host
,
276 struct mmc_request
*req
)
281 spin_lock_irqsave(&host
->lock
, flags
);
283 int_cntr
|= INT_SDIO_IRQ_EN
;
284 writel(int_cntr
, host
->base
+ MMC_REG_INT_CNTR
);
285 spin_unlock_irqrestore(&host
->lock
, flags
);
291 mmc_request_done(host
->mmc
, req
);
294 static int mxcmci_finish_data(struct mxcmci_host
*host
, unsigned int stat
)
296 struct mmc_data
*data
= host
->data
;
300 if (mxcmci_use_dma(host
)) {
301 imx_dma_disable(host
->dma
);
302 dma_unmap_sg(mmc_dev(host
->mmc
), data
->sg
, host
->dma_nents
,
307 if (stat
& STATUS_ERR_MASK
) {
308 dev_dbg(mmc_dev(host
->mmc
), "request failed. status: 0x%08x\n",
310 if (stat
& STATUS_CRC_READ_ERR
) {
311 dev_err(mmc_dev(host
->mmc
), "%s: -EILSEQ\n", __func__
);
312 data
->error
= -EILSEQ
;
313 } else if (stat
& STATUS_CRC_WRITE_ERR
) {
314 u32 err_code
= (stat
>> 9) & 0x3;
315 if (err_code
== 2) { /* No CRC response */
316 dev_err(mmc_dev(host
->mmc
),
317 "%s: No CRC -ETIMEDOUT\n", __func__
);
318 data
->error
= -ETIMEDOUT
;
320 dev_err(mmc_dev(host
->mmc
),
321 "%s: -EILSEQ\n", __func__
);
322 data
->error
= -EILSEQ
;
324 } else if (stat
& STATUS_TIME_OUT_READ
) {
325 dev_err(mmc_dev(host
->mmc
),
326 "%s: read -ETIMEDOUT\n", __func__
);
327 data
->error
= -ETIMEDOUT
;
329 dev_err(mmc_dev(host
->mmc
), "%s: -EIO\n", __func__
);
333 data
->bytes_xfered
= host
->datasize
;
336 data_error
= data
->error
;
343 static void mxcmci_read_response(struct mxcmci_host
*host
, unsigned int stat
)
345 struct mmc_command
*cmd
= host
->cmd
;
352 if (stat
& STATUS_TIME_OUT_RESP
) {
353 dev_dbg(mmc_dev(host
->mmc
), "CMD TIMEOUT\n");
354 cmd
->error
= -ETIMEDOUT
;
355 } else if (stat
& STATUS_RESP_CRC_ERR
&& cmd
->flags
& MMC_RSP_CRC
) {
356 dev_dbg(mmc_dev(host
->mmc
), "cmd crc error\n");
357 cmd
->error
= -EILSEQ
;
360 if (cmd
->flags
& MMC_RSP_PRESENT
) {
361 if (cmd
->flags
& MMC_RSP_136
) {
362 for (i
= 0; i
< 4; i
++) {
363 a
= readw(host
->base
+ MMC_REG_RES_FIFO
);
364 b
= readw(host
->base
+ MMC_REG_RES_FIFO
);
365 cmd
->resp
[i
] = a
<< 16 | b
;
368 a
= readw(host
->base
+ MMC_REG_RES_FIFO
);
369 b
= readw(host
->base
+ MMC_REG_RES_FIFO
);
370 c
= readw(host
->base
+ MMC_REG_RES_FIFO
);
371 cmd
->resp
[0] = a
<< 24 | b
<< 8 | c
>> 8;
376 static int mxcmci_poll_status(struct mxcmci_host
*host
, u32 mask
)
379 unsigned long timeout
= jiffies
+ HZ
;
382 stat
= readl(host
->base
+ MMC_REG_STATUS
);
383 if (stat
& STATUS_ERR_MASK
)
385 if (time_after(jiffies
, timeout
)) {
386 mxcmci_softreset(host
);
387 mxcmci_set_clk_rate(host
, host
->clock
);
388 return STATUS_TIME_OUT_READ
;
396 static int mxcmci_pull(struct mxcmci_host
*host
, void *_buf
, int bytes
)
402 stat
= mxcmci_poll_status(host
,
403 STATUS_BUF_READ_RDY
| STATUS_READ_OP_DONE
);
406 *buf
++ = readl(host
->base
+ MMC_REG_BUFFER_ACCESS
);
414 stat
= mxcmci_poll_status(host
,
415 STATUS_BUF_READ_RDY
| STATUS_READ_OP_DONE
);
418 tmp
= readl(host
->base
+ MMC_REG_BUFFER_ACCESS
);
419 memcpy(b
, &tmp
, bytes
);
425 static int mxcmci_push(struct mxcmci_host
*host
, void *_buf
, int bytes
)
431 stat
= mxcmci_poll_status(host
, STATUS_BUF_WRITE_RDY
);
434 writel(*buf
++, host
->base
+ MMC_REG_BUFFER_ACCESS
);
442 stat
= mxcmci_poll_status(host
, STATUS_BUF_WRITE_RDY
);
446 memcpy(&tmp
, b
, bytes
);
447 writel(tmp
, host
->base
+ MMC_REG_BUFFER_ACCESS
);
450 stat
= mxcmci_poll_status(host
, STATUS_BUF_WRITE_RDY
);
457 static int mxcmci_transfer_data(struct mxcmci_host
*host
)
459 struct mmc_data
*data
= host
->req
->data
;
460 struct scatterlist
*sg
;
466 if (data
->flags
& MMC_DATA_READ
) {
467 for_each_sg(data
->sg
, sg
, data
->sg_len
, i
) {
468 stat
= mxcmci_pull(host
, sg_virt(sg
), sg
->length
);
471 host
->datasize
+= sg
->length
;
474 for_each_sg(data
->sg
, sg
, data
->sg_len
, i
) {
475 stat
= mxcmci_push(host
, sg_virt(sg
), sg
->length
);
478 host
->datasize
+= sg
->length
;
480 stat
= mxcmci_poll_status(host
, STATUS_WRITE_OP_DONE
);
487 static void mxcmci_datawork(struct work_struct
*work
)
489 struct mxcmci_host
*host
= container_of(work
, struct mxcmci_host
,
491 int datastat
= mxcmci_transfer_data(host
);
493 writel(STATUS_READ_OP_DONE
| STATUS_WRITE_OP_DONE
,
494 host
->base
+ MMC_REG_STATUS
);
495 mxcmci_finish_data(host
, datastat
);
497 if (host
->req
->stop
) {
498 if (mxcmci_start_cmd(host
, host
->req
->stop
, 0)) {
499 mxcmci_finish_request(host
, host
->req
);
503 mxcmci_finish_request(host
, host
->req
);
508 static void mxcmci_data_done(struct mxcmci_host
*host
, unsigned int stat
)
510 struct mmc_data
*data
= host
->data
;
516 data_error
= mxcmci_finish_data(host
, stat
);
518 mxcmci_read_response(host
, stat
);
521 if (host
->req
->stop
) {
522 if (mxcmci_start_cmd(host
, host
->req
->stop
, 0)) {
523 mxcmci_finish_request(host
, host
->req
);
527 mxcmci_finish_request(host
, host
->req
);
532 static void mxcmci_cmd_done(struct mxcmci_host
*host
, unsigned int stat
)
534 mxcmci_read_response(host
, stat
);
537 if (!host
->data
&& host
->req
) {
538 mxcmci_finish_request(host
, host
->req
);
542 /* For the DMA case the DMA engine handles the data transfer
543 * automatically. For non DMA we have to do it ourselves.
544 * Don't do it in interrupt context though.
546 if (!mxcmci_use_dma(host
) && host
->data
)
547 schedule_work(&host
->datawork
);
551 static irqreturn_t
mxcmci_irq(int irq
, void *devid
)
553 struct mxcmci_host
*host
= devid
;
558 stat
= readl(host
->base
+ MMC_REG_STATUS
);
559 writel(stat
& ~(STATUS_SDIO_INT_ACTIVE
| STATUS_DATA_TRANS_DONE
|
560 STATUS_WRITE_OP_DONE
), host
->base
+ MMC_REG_STATUS
);
562 dev_dbg(mmc_dev(host
->mmc
), "%s: 0x%08x\n", __func__
, stat
);
564 spin_lock_irqsave(&host
->lock
, flags
);
565 sdio_irq
= (stat
& STATUS_SDIO_INT_ACTIVE
) && host
->use_sdio
;
566 spin_unlock_irqrestore(&host
->lock
, flags
);
569 if (mxcmci_use_dma(host
) &&
570 (stat
& (STATUS_READ_OP_DONE
| STATUS_WRITE_OP_DONE
)))
571 writel(STATUS_READ_OP_DONE
| STATUS_WRITE_OP_DONE
,
572 host
->base
+ MMC_REG_STATUS
);
576 writel(STATUS_SDIO_INT_ACTIVE
, host
->base
+ MMC_REG_STATUS
);
577 mmc_signal_sdio_irq(host
->mmc
);
580 if (stat
& STATUS_END_CMD_RESP
)
581 mxcmci_cmd_done(host
, stat
);
584 if (mxcmci_use_dma(host
) &&
585 (stat
& (STATUS_DATA_TRANS_DONE
| STATUS_WRITE_OP_DONE
)))
586 mxcmci_data_done(host
, stat
);
591 static void mxcmci_request(struct mmc_host
*mmc
, struct mmc_request
*req
)
593 struct mxcmci_host
*host
= mmc_priv(mmc
);
594 unsigned int cmdat
= host
->cmdat
;
597 WARN_ON(host
->req
!= NULL
);
600 host
->cmdat
&= ~CMD_DAT_CONT_INIT
;
605 error
= mxcmci_setup_data(host
, req
->data
);
607 req
->cmd
->error
= error
;
612 cmdat
|= CMD_DAT_CONT_DATA_ENABLE
;
614 if (req
->data
->flags
& MMC_DATA_WRITE
)
615 cmdat
|= CMD_DAT_CONT_WRITE
;
618 error
= mxcmci_start_cmd(host
, req
->cmd
, cmdat
);
621 mxcmci_finish_request(host
, req
);
624 static void mxcmci_set_clk_rate(struct mxcmci_host
*host
, unsigned int clk_ios
)
626 unsigned int divider
;
628 unsigned int clk_in
= clk_get_rate(host
->clk
);
630 while (prescaler
<= 0x800) {
631 for (divider
= 1; divider
<= 0xF; divider
++) {
634 x
= (clk_in
/ (divider
+ 1));
637 x
/= (prescaler
* 2);
651 writew((prescaler
<< 4) | divider
, host
->base
+ MMC_REG_CLK_RATE
);
653 dev_dbg(mmc_dev(host
->mmc
), "scaler: %d divider: %d in: %d out: %d\n",
654 prescaler
, divider
, clk_in
, clk_ios
);
657 static void mxcmci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
659 struct mxcmci_host
*host
= mmc_priv(mmc
);
663 * use burstlen of 64 in 4 bit mode (--> reg value 0)
664 * use burstlen of 16 in 1 bit mode (--> reg value 16)
666 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
671 imx_dma_config_burstlen(host
->dma
, blen
);
673 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
674 host
->cmdat
|= CMD_DAT_CONT_BUS_WIDTH_4
;
676 host
->cmdat
&= ~CMD_DAT_CONT_BUS_WIDTH_4
;
678 if (host
->power_mode
!= ios
->power_mode
) {
679 if (host
->pdata
&& host
->pdata
->setpower
)
680 host
->pdata
->setpower(mmc_dev(mmc
), ios
->vdd
);
681 host
->power_mode
= ios
->power_mode
;
682 if (ios
->power_mode
== MMC_POWER_ON
)
683 host
->cmdat
|= CMD_DAT_CONT_INIT
;
687 mxcmci_set_clk_rate(host
, ios
->clock
);
688 writew(STR_STP_CLK_START_CLK
, host
->base
+ MMC_REG_STR_STP_CLK
);
690 writew(STR_STP_CLK_STOP_CLK
, host
->base
+ MMC_REG_STR_STP_CLK
);
693 host
->clock
= ios
->clock
;
696 static irqreturn_t
mxcmci_detect_irq(int irq
, void *data
)
698 struct mmc_host
*mmc
= data
;
700 dev_dbg(mmc_dev(mmc
), "%s\n", __func__
);
702 mmc_detect_change(mmc
, msecs_to_jiffies(250));
706 static int mxcmci_get_ro(struct mmc_host
*mmc
)
708 struct mxcmci_host
*host
= mmc_priv(mmc
);
710 if (host
->pdata
&& host
->pdata
->get_ro
)
711 return !!host
->pdata
->get_ro(mmc_dev(mmc
));
713 * Board doesn't support read only detection; let the mmc core
719 static void mxcmci_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
721 struct mxcmci_host
*host
= mmc_priv(mmc
);
725 spin_lock_irqsave(&host
->lock
, flags
);
726 host
->use_sdio
= enable
;
727 int_cntr
= readl(host
->base
+ MMC_REG_INT_CNTR
);
730 int_cntr
|= INT_SDIO_IRQ_EN
;
732 int_cntr
&= ~INT_SDIO_IRQ_EN
;
734 writel(int_cntr
, host
->base
+ MMC_REG_INT_CNTR
);
735 spin_unlock_irqrestore(&host
->lock
, flags
);
738 static void mxcmci_init_card(struct mmc_host
*host
, struct mmc_card
*card
)
741 * MX3 SoCs have a silicon bug which corrupts CRC calculation of
742 * multi-block transfers when connected SDIO peripheral doesn't
743 * drive the BUSY line as required by the specs.
744 * One way to prevent this is to only allow 1-bit transfers.
747 if (cpu_is_mx3() && card
->type
== MMC_TYPE_SDIO
)
748 host
->caps
&= ~MMC_CAP_4_BIT_DATA
;
750 host
->caps
|= MMC_CAP_4_BIT_DATA
;
753 static const struct mmc_host_ops mxcmci_ops
= {
754 .request
= mxcmci_request
,
755 .set_ios
= mxcmci_set_ios
,
756 .get_ro
= mxcmci_get_ro
,
757 .enable_sdio_irq
= mxcmci_enable_sdio_irq
,
758 .init_card
= mxcmci_init_card
,
761 static int mxcmci_probe(struct platform_device
*pdev
)
763 struct mmc_host
*mmc
;
764 struct mxcmci_host
*host
= NULL
;
765 struct resource
*iores
, *r
;
768 printk(KERN_INFO
"i.MX SDHC driver\n");
770 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
771 irq
= platform_get_irq(pdev
, 0);
772 if (!iores
|| irq
< 0)
775 r
= request_mem_region(iores
->start
, resource_size(iores
), pdev
->name
);
779 mmc
= mmc_alloc_host(sizeof(struct mxcmci_host
), &pdev
->dev
);
782 goto out_release_mem
;
785 mmc
->ops
= &mxcmci_ops
;
786 mmc
->caps
= MMC_CAP_4_BIT_DATA
| MMC_CAP_SDIO_IRQ
;
788 /* MMC core transfer sizes tunable parameters */
789 mmc
->max_hw_segs
= 64;
790 mmc
->max_phys_segs
= 64;
791 mmc
->max_blk_size
= 2048;
792 mmc
->max_blk_count
= 65535;
793 mmc
->max_req_size
= mmc
->max_blk_size
* mmc
->max_blk_count
;
794 mmc
->max_seg_size
= mmc
->max_req_size
;
796 host
= mmc_priv(mmc
);
797 host
->base
= ioremap(r
->start
, resource_size(r
));
804 host
->pdata
= pdev
->dev
.platform_data
;
805 spin_lock_init(&host
->lock
);
807 if (host
->pdata
&& host
->pdata
->ocr_avail
)
808 mmc
->ocr_avail
= host
->pdata
->ocr_avail
;
810 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
815 host
->clk
= clk_get(&pdev
->dev
, NULL
);
816 if (IS_ERR(host
->clk
)) {
817 ret
= PTR_ERR(host
->clk
);
820 clk_enable(host
->clk
);
822 mxcmci_softreset(host
);
824 host
->rev_no
= readw(host
->base
+ MMC_REG_REV_NO
);
825 if (host
->rev_no
!= 0x400) {
827 dev_err(mmc_dev(host
->mmc
), "wrong rev.no. 0x%08x. aborting.\n",
832 mmc
->f_min
= clk_get_rate(host
->clk
) >> 16;
833 mmc
->f_max
= clk_get_rate(host
->clk
) >> 1;
835 /* recommended in data sheet */
836 writew(0x2db4, host
->base
+ MMC_REG_READ_TO
);
838 writel(0, host
->base
+ MMC_REG_INT_CNTR
);
841 host
->dma
= imx_dma_request_by_prio(DRIVER_NAME
, DMA_PRIO_LOW
);
843 dev_err(mmc_dev(host
->mmc
), "imx_dma_request_by_prio failed\n");
848 r
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
854 ret
= imx_dma_config_channel(host
->dma
,
855 IMX_DMA_MEMSIZE_32
| IMX_DMA_TYPE_FIFO
,
856 IMX_DMA_MEMSIZE_32
| IMX_DMA_TYPE_LINEAR
,
859 dev_err(mmc_dev(host
->mmc
), "failed to config DMA channel\n");
863 INIT_WORK(&host
->datawork
, mxcmci_datawork
);
865 ret
= request_irq(host
->irq
, mxcmci_irq
, 0, DRIVER_NAME
, host
);
869 platform_set_drvdata(pdev
, mmc
);
871 if (host
->pdata
&& host
->pdata
->init
) {
872 ret
= host
->pdata
->init(&pdev
->dev
, mxcmci_detect_irq
,
883 free_irq(host
->irq
, host
);
886 imx_dma_free(host
->dma
);
889 clk_disable(host
->clk
);
896 release_mem_region(iores
->start
, resource_size(iores
));
900 static int mxcmci_remove(struct platform_device
*pdev
)
902 struct mmc_host
*mmc
= platform_get_drvdata(pdev
);
903 struct mxcmci_host
*host
= mmc_priv(mmc
);
905 platform_set_drvdata(pdev
, NULL
);
907 mmc_remove_host(mmc
);
909 if (host
->pdata
&& host
->pdata
->exit
)
910 host
->pdata
->exit(&pdev
->dev
, mmc
);
912 free_irq(host
->irq
, host
);
915 imx_dma_free(host
->dma
);
917 clk_disable(host
->clk
);
920 release_mem_region(host
->res
->start
, resource_size(host
->res
));
921 release_resource(host
->res
);
929 static int mxcmci_suspend(struct platform_device
*dev
, pm_message_t state
)
931 struct mmc_host
*mmc
= platform_get_drvdata(dev
);
935 ret
= mmc_suspend_host(mmc
);
940 static int mxcmci_resume(struct platform_device
*dev
)
942 struct mmc_host
*mmc
= platform_get_drvdata(dev
);
943 struct mxcmci_host
*host
;
947 host
= mmc_priv(mmc
);
948 ret
= mmc_resume_host(mmc
);
954 #define mxcmci_suspend NULL
955 #define mxcmci_resume NULL
956 #endif /* CONFIG_PM */
958 static struct platform_driver mxcmci_driver
= {
959 .probe
= mxcmci_probe
,
960 .remove
= mxcmci_remove
,
961 .suspend
= mxcmci_suspend
,
962 .resume
= mxcmci_resume
,
965 .owner
= THIS_MODULE
,
969 static int __init
mxcmci_init(void)
971 return platform_driver_register(&mxcmci_driver
);
974 static void __exit
mxcmci_exit(void)
976 platform_driver_unregister(&mxcmci_driver
);
979 module_init(mxcmci_init
);
980 module_exit(mxcmci_exit
);
982 MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");
983 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
984 MODULE_LICENSE("GPL");
985 MODULE_ALIAS("platform:imx-mmc");