arch/avr32/mach-at32ap/pio.c

   1 /*
   2  * Atmel PIO2 Port Multiplexer support
   3  *
   4  * Copyright (C) 2004-2006 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/fs.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/irq.h>
  16
  17 #include <asm/gpio.h>
  18 #include <asm/io.h>
  19
  20 #include <mach/portmux.h>
  21
  22 #include "pio.h"
  23
  24 #define MAX_NR_PIO_DEVICES              8
  25
  26 struct pio_device {
  27         struct gpio_chip chip;
  28         void __iomem *regs;
  29         const struct platform_device *pdev;
  30         struct clk *clk;
  31         u32 pinmux_mask;
  32         char name[8];
  33 };
  34
  35 static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
  36
  37 static struct pio_device *gpio_to_pio(unsigned int gpio)
  38 {
  39         struct pio_device *pio;
  40         unsigned int index;
  41
  42         index = gpio >> 5;
  43         if (index >= MAX_NR_PIO_DEVICES)
  44                 return NULL;
  45         pio = &pio_dev[index];
  46         if (!pio->regs)
  47                 return NULL;
  48
  49         return pio;
  50 }
  51
  52 /* Pin multiplexing API */
  53
  54 void __init at32_select_periph(unsigned int pin, unsigned int periph,
  55                                unsigned long flags)
  56 {
  57         struct pio_device *pio;
  58         unsigned int pin_index = pin & 0x1f;
  59         u32 mask = 1 << pin_index;
  60
  61         pio = gpio_to_pio(pin);
  62         if (unlikely(!pio)) {
  63                 printk("pio: invalid pin %u\n", pin);
  64                 goto fail;
  65         }
  66
  67         if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask)
  68                          || gpiochip_is_requested(&pio->chip, pin_index))) {
  69                 printk("%s: pin %u is busy\n", pio->name, pin_index);
  70                 goto fail;
  71         }
  72
  73         pio_writel(pio, PUER, mask);
  74         if (periph)
  75                 pio_writel(pio, BSR, mask);
  76         else
  77                 pio_writel(pio, ASR, mask);
  78
  79         pio_writel(pio, PDR, mask);
  80         if (!(flags & AT32_GPIOF_PULLUP))
  81                 pio_writel(pio, PUDR, mask);
  82
  83         return;
  84
  85 fail:
  86         dump_stack();
  87 }
  88
  89 void __init at32_select_gpio(unsigned int pin, unsigned long flags)
  90 {
  91         struct pio_device *pio;
  92         unsigned int pin_index = pin & 0x1f;
  93         u32 mask = 1 << pin_index;
  94
  95         pio = gpio_to_pio(pin);
  96         if (unlikely(!pio)) {
  97                 printk("pio: invalid pin %u\n", pin);
  98                 goto fail;
  99         }
 100
 101         if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
 102                 printk("%s: pin %u is busy\n", pio->name, pin_index);
 103                 goto fail;
 104         }
 105
 106         if (flags & AT32_GPIOF_OUTPUT) {
 107                 if (flags & AT32_GPIOF_HIGH)
 108                         pio_writel(pio, SODR, mask);
 109                 else
 110                         pio_writel(pio, CODR, mask);
 111                 if (flags & AT32_GPIOF_MULTIDRV)
 112                         pio_writel(pio, MDER, mask);
 113                 else
 114                         pio_writel(pio, MDDR, mask);
 115                 pio_writel(pio, PUDR, mask);
 116                 pio_writel(pio, OER, mask);
 117         } else {
 118                 if (flags & AT32_GPIOF_PULLUP)
 119                         pio_writel(pio, PUER, mask);
 120                 else
 121                         pio_writel(pio, PUDR, mask);
 122                 if (flags & AT32_GPIOF_DEGLITCH)
 123                         pio_writel(pio, IFER, mask);
 124                 else
 125                         pio_writel(pio, IFDR, mask);
 126                 pio_writel(pio, ODR, mask);
 127         }
 128
 129         pio_writel(pio, PER, mask);
 130
 131         return;
 132
 133 fail:
 134         dump_stack();
 135 }
 136
 137 /*
 138  * Undo a previous pin reservation. Will not affect the hardware
 139  * configuration.
 140  */
 141 void at32_deselect_pin(unsigned int pin)
 142 {
 143         struct pio_device *pio;
 144         unsigned int pin_index = pin & 0x1f;
 145
 146         pio = gpio_to_pio(pin);
 147         if (unlikely(!pio)) {
 148                 printk("pio: invalid pin %u\n", pin);
 149                 dump_stack();
 150                 return;
 151         }
 152
 153         clear_bit(pin_index, &pio->pinmux_mask);
 154 }
 155
 156 /* Reserve a pin, preventing anyone else from changing its configuration. */
 157 void __init at32_reserve_pin(unsigned int pin)
 158 {
 159         struct pio_device *pio;
 160         unsigned int pin_index = pin & 0x1f;
 161
 162         pio = gpio_to_pio(pin);
 163         if (unlikely(!pio)) {
 164                 printk("pio: invalid pin %u\n", pin);
 165                 goto fail;
 166         }
 167
 168         if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
 169                 printk("%s: pin %u is busy\n", pio->name, pin_index);
 170                 goto fail;
 171         }
 172
 173         return;
 174
 175 fail:
 176         dump_stack();
 177 }
 178
 179 /*--------------------------------------------------------------------------*/
 180
 181 /* GPIO API */
 182
 183 static int direction_input(struct gpio_chip *chip, unsigned offset)
 184 {
 185         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 186         u32 mask = 1 << offset;
 187
 188         if (!(pio_readl(pio, PSR) & mask))
 189                 return -EINVAL;
 190
 191         pio_writel(pio, ODR, mask);
 192         return 0;
 193 }
 194
 195 static int gpio_get(struct gpio_chip *chip, unsigned offset)
 196 {
 197         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 198
 199         return (pio_readl(pio, PDSR) >> offset) & 1;
 200 }
 201
 202 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
 203
 204 static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
 205 {
 206         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 207         u32 mask = 1 << offset;
 208
 209         if (!(pio_readl(pio, PSR) & mask))
 210                 return -EINVAL;
 211
 212         gpio_set(chip, offset, value);
 213         pio_writel(pio, OER, mask);
 214         return 0;
 215 }
 216
 217 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 218 {
 219         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 220         u32 mask = 1 << offset;
 221
 222         if (value)
 223                 pio_writel(pio, SODR, mask);
 224         else
 225                 pio_writel(pio, CODR, mask);
 226 }
 227
 228 /*--------------------------------------------------------------------------*/
 229
 230 /* GPIO IRQ support */
 231
 232 static void gpio_irq_mask(unsigned irq)
 233 {
 234         unsigned                gpio = irq_to_gpio(irq);
 235         struct pio_device       *pio = &pio_dev[gpio >> 5];
 236
 237         pio_writel(pio, IDR, 1 << (gpio & 0x1f));
 238 }
 239
 240 static void gpio_irq_unmask(unsigned irq)
 241 {
 242         unsigned                gpio = irq_to_gpio(irq);
 243         struct pio_device       *pio = &pio_dev[gpio >> 5];
 244
 245         pio_writel(pio, IER, 1 << (gpio & 0x1f));
 246 }
 247
 248 static int gpio_irq_type(unsigned irq, unsigned type)
 249 {
 250         if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
 251                 return -EINVAL;
 252
 253         return 0;
 254 }
 255
 256 static struct irq_chip gpio_irqchip = {
 257         .name           = "gpio",
 258         .mask           = gpio_irq_mask,
 259         .unmask         = gpio_irq_unmask,
 260         .set_type       = gpio_irq_type,
 261 };
 262
 263 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 264 {
 265         struct pio_device       *pio = get_irq_chip_data(irq);
 266         unsigned                gpio_irq;
 267
 268         gpio_irq = (unsigned) get_irq_data(irq);
 269         for (;;) {
 270                 u32             isr;
 271                 struct irq_desc *d;
 272
 273                 /* ack pending GPIO interrupts */
 274                 isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
 275                 if (!isr)
 276                         break;
 277                 do {
 278                         int i;
 279
 280                         i = ffs(isr) - 1;
 281                         isr &= ~(1 << i);
 282
 283                         i += gpio_irq;
 284                         d = &irq_desc[i];
 285
 286                         d->handle_irq(i, d);
 287                 } while (isr);
 288         }
 289 }
 290
 291 static void __init
 292 gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
 293 {
 294         unsigned        i;
 295
 296         set_irq_chip_data(irq, pio);
 297         set_irq_data(irq, (void *) gpio_irq);
 298
 299         for (i = 0; i < 32; i++, gpio_irq++) {
 300                 set_irq_chip_data(gpio_irq, pio);
 301                 set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
 302                                 handle_simple_irq);
 303         }
 304
 305         set_irq_chained_handler(irq, gpio_irq_handler);
 306 }
 307
 308 /*--------------------------------------------------------------------------*/
 309
 310 #ifdef CONFIG_DEBUG_FS
 311
 312 #include <linux/seq_file.h>
 313
 314 /*
 315  * This shows more info than the generic gpio dump code:
 316  * pullups, deglitching, open drain drive.
 317  */
 318 static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
 319 {
 320         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 321         u32                     psr, osr, imr, pdsr, pusr, ifsr, mdsr;
 322         unsigned                i;
 323         u32                     mask;
 324         char                    bank;
 325
 326         psr = pio_readl(pio, PSR);
 327         osr = pio_readl(pio, OSR);
 328         imr = pio_readl(pio, IMR);
 329         pdsr = pio_readl(pio, PDSR);
 330         pusr = pio_readl(pio, PUSR);
 331         ifsr = pio_readl(pio, IFSR);
 332         mdsr = pio_readl(pio, MDSR);
 333
 334         bank = 'A' + pio->pdev->id;
 335
 336         for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
 337                 const char *label;
 338
 339                 label = gpiochip_is_requested(chip, i);
 340                 if (!label && (imr & mask))
 341                         label = "[irq]";
 342                 if (!label)
 343                         continue;
 344
 345                 seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
 346                         chip->base + i, bank, i,
 347                         label,
 348                         (osr & mask) ? "out" : "in ",
 349                         (mask & pdsr) ? "hi" : "lo",
 350                         (mask & pusr) ? "  " : "up");
 351                 if (ifsr & mask)
 352                         seq_printf(s, " deglitch");
 353                 if ((osr & mdsr) & mask)
 354                         seq_printf(s, " open-drain");
 355                 if (imr & mask)
 356                         seq_printf(s, " irq-%d edge-both",
 357                                 gpio_to_irq(chip->base + i));
 358                 seq_printf(s, "\n");
 359         }
 360 }
 361
 362 #else
 363 #define pio_bank_show   NULL
 364 #endif
 365
 366
 367 /*--------------------------------------------------------------------------*/
 368
 369 static int __init pio_probe(struct platform_device *pdev)
 370 {
 371         struct pio_device *pio = NULL;
 372         int irq = platform_get_irq(pdev, 0);
 373         int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
 374
 375         BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
 376         pio = &pio_dev[pdev->id];
 377         BUG_ON(!pio->regs);
 378
 379         pio->chip.label = pio->name;
 380         pio->chip.base = pdev->id * 32;
 381         pio->chip.ngpio = 32;
 382         pio->chip.dev = &pdev->dev;
 383         pio->chip.owner = THIS_MODULE;
 384
 385         pio->chip.direction_input = direction_input;
 386         pio->chip.get = gpio_get;
 387         pio->chip.direction_output = direction_output;
 388         pio->chip.set = gpio_set;
 389         pio->chip.dbg_show = pio_bank_show;
 390
 391         gpiochip_add(&pio->chip);
 392
 393         gpio_irq_setup(pio, irq, gpio_irq_base);
 394
 395         platform_set_drvdata(pdev, pio);
 396
 397         printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
 398                pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
 399
 400         return 0;
 401 }
 402
 403 static struct platform_driver pio_driver = {
 404         .driver         = {
 405                 .name           = "pio",
 406         },
 407 };
 408
 409 static int __init pio_init(void)
 410 {
 411         return platform_driver_probe(&pio_driver, pio_probe);
 412 }
 413 postcore_initcall(pio_init);
 414
 415 void __init at32_init_pio(struct platform_device *pdev)
 416 {
 417         struct resource *regs;
 418         struct pio_device *pio;
 419
 420         if (pdev->id > MAX_NR_PIO_DEVICES) {
 421                 dev_err(&pdev->dev, "only %d PIO devices supported\n",
 422                         MAX_NR_PIO_DEVICES);
 423                 return;
 424         }
 425
 426         pio = &pio_dev[pdev->id];
 427         snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
 428
 429         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 430         if (!regs) {
 431                 dev_err(&pdev->dev, "no mmio resource defined\n");
 432                 return;
 433         }
 434
 435         pio->clk = clk_get(&pdev->dev, "mck");
 436         if (IS_ERR(pio->clk))
 437                 /*
 438                  * This is a fatal error, but if we continue we might
 439                  * be so lucky that we manage to initialize the
 440                  * console and display this message...
 441                  */
 442                 dev_err(&pdev->dev, "no mck clock defined\n");
 443         else
 444                 clk_enable(pio->clk);
 445
 446         pio->pdev = pdev;
 447         pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
 448
 449         /* start with irqs disabled and acked */
 450         pio_writel(pio, IDR, ~0UL);
 451         (void) pio_readl(pio, ISR);
 452 }