5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
32 The ARM series is a line of low-power-consumption RISC chip designs
33 licensed by ARM Ltd and targeted at embedded applications and
34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
35 manufactured, but legacy ARM-based PC hardware remains popular in
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
45 config SYS_SUPPORTS_APM_EMULATION
48 config HAVE_SCHED_CLOCK
54 config ARCH_USES_GETTIMEOFFSET
58 config GENERIC_CLOCKEVENTS
61 config GENERIC_CLOCKEVENTS_BROADCAST
63 depends on GENERIC_CLOCKEVENTS
68 select GENERIC_ALLOCATOR
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
87 Say Y here if you are building a kernel for an EISA-based machine.
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
102 config STACKTRACE_SUPPORT
106 config HAVE_LATENCYTOP_SUPPORT
111 config LOCKDEP_SUPPORT
115 config TRACE_IRQFLAGS_SUPPORT
119 config HARDIRQS_SW_RESEND
123 config GENERIC_IRQ_PROBE
127 config GENERIC_LOCKBREAK
130 depends on SMP && PREEMPT
132 config RWSEM_GENERIC_SPINLOCK
136 config RWSEM_XCHGADD_ALGORITHM
139 config ARCH_HAS_ILOG2_U32
142 config ARCH_HAS_ILOG2_U64
145 config ARCH_HAS_CPUFREQ
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
152 config ARCH_HAS_CPU_IDLE_WAIT
155 config GENERIC_HWEIGHT
159 config GENERIC_CALIBRATE_DELAY
163 config ARCH_MAY_HAVE_PC_FDC
169 config NEED_DMA_MAP_STATE
172 config GENERIC_ISA_DMA
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
233 Support for ARM's Integrator platform.
236 bool "ARM Ltd. RealView family"
239 select HAVE_SCHED_CLOCK
241 select GENERIC_CLOCKEVENTS
242 select ARCH_WANT_OPTIONAL_GPIOLIB
243 select PLAT_VERSATILE
244 select ARM_TIMER_SP804
245 select GPIO_PL061 if GPIOLIB
247 This enables support for ARM Ltd RealView boards.
249 config ARCH_VERSATILE
250 bool "ARM Ltd. Versatile family"
254 select HAVE_SCHED_CLOCK
256 select GENERIC_CLOCKEVENTS
257 select ARCH_WANT_OPTIONAL_GPIOLIB
258 select PLAT_VERSATILE
259 select ARM_TIMER_SP804
261 This enables support for ARM Ltd Versatile board.
264 bool "ARM Ltd. Versatile Express family"
265 select ARCH_WANT_OPTIONAL_GPIOLIB
267 select ARM_TIMER_SP804
269 select GENERIC_CLOCKEVENTS
271 select HAVE_SCHED_CLOCK
273 select PLAT_VERSATILE
275 This enables support for the ARM Ltd Versatile Express boards.
279 select ARCH_REQUIRE_GPIOLIB
282 This enables support for systems based on the Atmel AT91RM9200,
283 AT91SAM9 and AT91CAP9 processors.
286 bool "Broadcom BCMRING"
291 select GENERIC_CLOCKEVENTS
292 select ARCH_WANT_OPTIONAL_GPIOLIB
294 Support for Broadcom's BCMRing platform.
297 bool "Cirrus Logic CLPS711x/EP721x-based"
299 select ARCH_USES_GETTIMEOFFSET
301 Support for Cirrus Logic 711x/721x based boards.
304 bool "Cavium Networks CNS3XXX family"
306 select GENERIC_CLOCKEVENTS
308 select MIGHT_HAVE_PCI
309 select PCI_DOMAINS if PCI
311 Support for Cavium Networks CNS3XXX platform.
314 bool "Cortina Systems Gemini"
316 select ARCH_REQUIRE_GPIOLIB
317 select ARCH_USES_GETTIMEOFFSET
319 Support for the Cortina Systems Gemini family SoCs
326 select ARCH_USES_GETTIMEOFFSET
328 This is an evaluation board for the StrongARM processor available
329 from Digital. It has limited hardware on-board, including an
330 Ethernet interface, two PCMCIA sockets, two serial ports and a
339 select ARCH_REQUIRE_GPIOLIB
340 select ARCH_HAS_HOLES_MEMORYMODEL
341 select ARCH_USES_GETTIMEOFFSET
343 This enables support for the Cirrus EP93xx series of CPUs.
345 config ARCH_FOOTBRIDGE
349 select ARCH_USES_GETTIMEOFFSET
351 Support for systems based on the DC21285 companion chip
352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
355 bool "Freescale MXC/iMX-based"
356 select GENERIC_CLOCKEVENTS
357 select ARCH_REQUIRE_GPIOLIB
360 Support for Freescale MXC/iMX-based family of processors
363 bool "Freescale MXS-based"
364 select GENERIC_CLOCKEVENTS
365 select ARCH_REQUIRE_GPIOLIB
368 Support for Freescale MXS-based family of processors
371 bool "Freescale STMP3xxx"
374 select ARCH_REQUIRE_GPIOLIB
375 select GENERIC_CLOCKEVENTS
376 select USB_ARCH_HAS_EHCI
378 Support for systems based on the Freescale 3xxx CPUs.
381 bool "Hilscher NetX based"
384 select GENERIC_CLOCKEVENTS
386 This enables support for systems based on the Hilscher NetX Soc
389 bool "Hynix HMS720x-based"
392 select ARCH_USES_GETTIMEOFFSET
394 This enables support for systems based on the Hynix HMS720x
402 select ARCH_SUPPORTS_MSI
405 Support for Intel's IOP13XX (XScale) family of processors.
413 select ARCH_REQUIRE_GPIOLIB
415 Support for Intel's 80219 and IOP32X (XScale) family of
424 select ARCH_REQUIRE_GPIOLIB
426 Support for Intel's IOP33X (XScale) family of processors.
433 select ARCH_USES_GETTIMEOFFSET
435 Support for Intel's IXP23xx (XScale) family of processors.
438 bool "IXP2400/2800-based"
442 select ARCH_USES_GETTIMEOFFSET
444 Support for Intel's IXP2400/2800 (XScale) family of processors.
451 select GENERIC_CLOCKEVENTS
452 select HAVE_SCHED_CLOCK
453 select MIGHT_HAVE_PCI
454 select DMABOUNCE if PCI
456 Support for Intel's IXP4XX (XScale) family of processors.
461 select ARCH_REQUIRE_GPIOLIB
462 select GENERIC_CLOCKEVENTS
465 Support for the Marvell Dove SoC 88AP510
468 bool "Marvell Kirkwood"
471 select ARCH_REQUIRE_GPIOLIB
472 select GENERIC_CLOCKEVENTS
475 Support for the following Marvell Kirkwood series SoCs:
476 88F6180, 88F6192 and 88F6281.
479 bool "Marvell Loki (88RC8480)"
481 select GENERIC_CLOCKEVENTS
484 Support for the Marvell Loki (88RC8480) SoC.
489 select ARCH_REQUIRE_GPIOLIB
492 select USB_ARCH_HAS_OHCI
495 select GENERIC_CLOCKEVENTS
497 Support for the NXP LPC32XX family of processors
500 bool "Marvell MV78xx0"
503 select ARCH_REQUIRE_GPIOLIB
504 select GENERIC_CLOCKEVENTS
507 Support for the following Marvell MV78xx0 series SoCs:
515 select ARCH_REQUIRE_GPIOLIB
516 select GENERIC_CLOCKEVENTS
519 Support for the following Marvell Orion 5x series SoCs:
520 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
521 Orion-2 (5281), Orion-1-90 (6183).
524 bool "Marvell PXA168/910/MMP2"
526 select ARCH_REQUIRE_GPIOLIB
528 select GENERIC_CLOCKEVENTS
529 select HAVE_SCHED_CLOCK
534 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
537 bool "Micrel/Kendin KS8695"
539 select ARCH_REQUIRE_GPIOLIB
540 select ARCH_USES_GETTIMEOFFSET
542 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
543 System-on-Chip devices.
546 bool "NetSilicon NS9xxx"
549 select GENERIC_CLOCKEVENTS
552 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
555 <http://www.digi.com/products/microprocessors/index.jsp>
558 bool "Nuvoton W90X900 CPU"
560 select ARCH_REQUIRE_GPIOLIB
562 select GENERIC_CLOCKEVENTS
564 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
565 At present, the w90x900 has been renamed nuc900, regarding
566 the ARM series product line, you can login the following
567 link address to know more.
569 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
570 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
573 bool "Nuvoton NUC93X CPU"
577 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
578 low-power and high performance MPEG-4/JPEG multimedia controller chip.
584 select GENERIC_CLOCKEVENTS
587 select HAVE_SCHED_CLOCK
588 select ARCH_HAS_BARRIERS if CACHE_L2X0
589 select ARCH_HAS_CPUFREQ
591 This enables support for NVIDIA Tegra based systems (Tegra APX,
592 Tegra 6xx and Tegra 2 series).
595 bool "Philips Nexperia PNX4008 Mobile"
598 select ARCH_USES_GETTIMEOFFSET
600 This enables support for Philips PNX4008 mobile platform.
603 bool "PXA2xx/PXA3xx-based"
606 select ARCH_HAS_CPUFREQ
608 select ARCH_REQUIRE_GPIOLIB
609 select GENERIC_CLOCKEVENTS
610 select HAVE_SCHED_CLOCK
615 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
620 select GENERIC_CLOCKEVENTS
621 select ARCH_REQUIRE_GPIOLIB
623 Support for Qualcomm MSM/QSD based systems. This runs on the
624 apps processor of the MSM/QSD and depends on a shared memory
625 interface to the modem processor which runs the baseband
626 stack and controls some vital subsystems
627 (clock and power control, etc).
630 bool "Renesas SH-Mobile / R-Mobile"
633 select GENERIC_CLOCKEVENTS
636 select MULTI_IRQ_HANDLER
638 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
645 select ARCH_MAY_HAVE_PC_FDC
646 select HAVE_PATA_PLATFORM
649 select ARCH_SPARSEMEM_ENABLE
650 select ARCH_USES_GETTIMEOFFSET
652 On the Acorn Risc-PC, Linux can support the internal IDE disk and
653 CD-ROM interface, serial and parallel port, and the floppy drive.
659 select ARCH_SPARSEMEM_ENABLE
661 select ARCH_HAS_CPUFREQ
663 select GENERIC_CLOCKEVENTS
665 select HAVE_SCHED_CLOCK
667 select ARCH_REQUIRE_GPIOLIB
669 Support for StrongARM 11x0 based boards.
672 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
674 select ARCH_HAS_CPUFREQ
676 select ARCH_USES_GETTIMEOFFSET
677 select HAVE_S3C2410_I2C if I2C
679 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
680 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
681 the Samsung SMDK2410 development board (and derivatives).
683 Note, the S3C2416 and the S3C2450 are so close that they even share
684 the same SoC ID code. This means that there is no seperate machine
685 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
688 bool "Samsung S3C64XX"
694 select ARCH_USES_GETTIMEOFFSET
695 select ARCH_HAS_CPUFREQ
696 select ARCH_REQUIRE_GPIOLIB
697 select SAMSUNG_CLKSRC
698 select SAMSUNG_IRQ_VIC_TIMER
699 select SAMSUNG_IRQ_UART
700 select S3C_GPIO_TRACK
701 select S3C_GPIO_PULL_UPDOWN
702 select S3C_GPIO_CFG_S3C24XX
703 select S3C_GPIO_CFG_S3C64XX
705 select USB_ARCH_HAS_OHCI
706 select SAMSUNG_GPIOLIB_4BIT
707 select HAVE_S3C2410_I2C if I2C
708 select HAVE_S3C2410_WATCHDOG if WATCHDOG
710 Samsung S3C64XX series based systems
713 bool "Samsung S5P6440 S5P6450"
717 select HAVE_S3C2410_WATCHDOG if WATCHDOG
718 select ARCH_USES_GETTIMEOFFSET
719 select HAVE_S3C2410_I2C if I2C
720 select HAVE_S3C_RTC if RTC_CLASS
722 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
726 bool "Samsung S5P6442"
730 select ARCH_USES_GETTIMEOFFSET
731 select HAVE_S3C2410_WATCHDOG if WATCHDOG
733 Samsung S5P6442 CPU based systems
736 bool "Samsung S5PC100"
740 select ARM_L1_CACHE_SHIFT_6
741 select ARCH_USES_GETTIMEOFFSET
742 select HAVE_S3C2410_I2C if I2C
743 select HAVE_S3C_RTC if RTC_CLASS
744 select HAVE_S3C2410_WATCHDOG if WATCHDOG
746 Samsung S5PC100 series based systems
749 bool "Samsung S5PV210/S5PC110"
751 select ARCH_SPARSEMEM_ENABLE
754 select ARM_L1_CACHE_SHIFT_6
755 select ARCH_HAS_CPUFREQ
756 select ARCH_USES_GETTIMEOFFSET
757 select HAVE_S3C2410_I2C if I2C
758 select HAVE_S3C_RTC if RTC_CLASS
759 select HAVE_S3C2410_WATCHDOG if WATCHDOG
761 Samsung S5PV210/S5PC110 series based systems
764 bool "Samsung S5PV310/S5PC210"
766 select ARCH_SPARSEMEM_ENABLE
769 select ARCH_HAS_CPUFREQ
770 select GENERIC_CLOCKEVENTS
771 select HAVE_S3C_RTC if RTC_CLASS
772 select HAVE_S3C2410_I2C if I2C
773 select HAVE_S3C2410_WATCHDOG if WATCHDOG
775 Samsung S5PV310 series based systems
784 select ARCH_USES_GETTIMEOFFSET
786 Support for the StrongARM based Digital DNARD machine, also known
787 as "Shark" (<http://www.shark-linux.de/shark.html>).
790 bool "Telechips TCC ARM926-based systems"
794 select GENERIC_CLOCKEVENTS
796 Support for Telechips TCC ARM926-based systems.
799 bool "ST-Ericsson U300 Series"
802 select HAVE_SCHED_CLOCK
806 select GENERIC_CLOCKEVENTS
810 Support for ST-Ericsson U300 series mobile platforms.
813 bool "ST-Ericsson U8500 Series"
816 select GENERIC_CLOCKEVENTS
818 select ARCH_REQUIRE_GPIOLIB
819 select ARCH_HAS_CPUFREQ
821 Support for ST-Ericsson's Ux500 architecture
824 bool "STMicroelectronics Nomadik"
829 select GENERIC_CLOCKEVENTS
830 select ARCH_REQUIRE_GPIOLIB
832 Support for the Nomadik platform by ST-Ericsson
836 select GENERIC_CLOCKEVENTS
837 select ARCH_REQUIRE_GPIOLIB
841 select GENERIC_ALLOCATOR
842 select ARCH_HAS_HOLES_MEMORYMODEL
844 Support for TI's DaVinci platform.
849 select ARCH_REQUIRE_GPIOLIB
850 select ARCH_HAS_CPUFREQ
851 select GENERIC_CLOCKEVENTS
852 select HAVE_SCHED_CLOCK
853 select ARCH_HAS_HOLES_MEMORYMODEL
855 Support for TI's OMAP platform (OMAP1/2/3/4).
860 select ARCH_REQUIRE_GPIOLIB
862 select GENERIC_CLOCKEVENTS
865 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
870 # This is sorted alphabetically by mach-* pathname. However, plat-*
871 # Kconfigs may be included either alphabetically (according to the
872 # plat- suffix) or along side the corresponding mach-* source.
874 source "arch/arm/mach-aaec2000/Kconfig"
876 source "arch/arm/mach-at91/Kconfig"
878 source "arch/arm/mach-bcmring/Kconfig"
880 source "arch/arm/mach-clps711x/Kconfig"
882 source "arch/arm/mach-cns3xxx/Kconfig"
884 source "arch/arm/mach-davinci/Kconfig"
886 source "arch/arm/mach-dove/Kconfig"
888 source "arch/arm/mach-ep93xx/Kconfig"
890 source "arch/arm/mach-footbridge/Kconfig"
892 source "arch/arm/mach-gemini/Kconfig"
894 source "arch/arm/mach-h720x/Kconfig"
896 source "arch/arm/mach-integrator/Kconfig"
898 source "arch/arm/mach-iop32x/Kconfig"
900 source "arch/arm/mach-iop33x/Kconfig"
902 source "arch/arm/mach-iop13xx/Kconfig"
904 source "arch/arm/mach-ixp4xx/Kconfig"
906 source "arch/arm/mach-ixp2000/Kconfig"
908 source "arch/arm/mach-ixp23xx/Kconfig"
910 source "arch/arm/mach-kirkwood/Kconfig"
912 source "arch/arm/mach-ks8695/Kconfig"
914 source "arch/arm/mach-loki/Kconfig"
916 source "arch/arm/mach-lpc32xx/Kconfig"
918 source "arch/arm/mach-msm/Kconfig"
920 source "arch/arm/mach-mv78xx0/Kconfig"
922 source "arch/arm/plat-mxc/Kconfig"
924 source "arch/arm/mach-mxs/Kconfig"
926 source "arch/arm/mach-netx/Kconfig"
928 source "arch/arm/mach-nomadik/Kconfig"
929 source "arch/arm/plat-nomadik/Kconfig"
931 source "arch/arm/mach-ns9xxx/Kconfig"
933 source "arch/arm/mach-nuc93x/Kconfig"
935 source "arch/arm/plat-omap/Kconfig"
937 source "arch/arm/mach-omap1/Kconfig"
939 source "arch/arm/mach-omap2/Kconfig"
941 source "arch/arm/mach-orion5x/Kconfig"
943 source "arch/arm/mach-pxa/Kconfig"
944 source "arch/arm/plat-pxa/Kconfig"
946 source "arch/arm/mach-mmp/Kconfig"
948 source "arch/arm/mach-realview/Kconfig"
950 source "arch/arm/mach-sa1100/Kconfig"
952 source "arch/arm/plat-samsung/Kconfig"
953 source "arch/arm/plat-s3c24xx/Kconfig"
954 source "arch/arm/plat-s5p/Kconfig"
956 source "arch/arm/plat-spear/Kconfig"
958 source "arch/arm/plat-tcc/Kconfig"
961 source "arch/arm/mach-s3c2400/Kconfig"
962 source "arch/arm/mach-s3c2410/Kconfig"
963 source "arch/arm/mach-s3c2412/Kconfig"
964 source "arch/arm/mach-s3c2416/Kconfig"
965 source "arch/arm/mach-s3c2440/Kconfig"
966 source "arch/arm/mach-s3c2443/Kconfig"
970 source "arch/arm/mach-s3c64xx/Kconfig"
973 source "arch/arm/mach-s5p64x0/Kconfig"
975 source "arch/arm/mach-s5p6442/Kconfig"
977 source "arch/arm/mach-s5pc100/Kconfig"
979 source "arch/arm/mach-s5pv210/Kconfig"
981 source "arch/arm/mach-s5pv310/Kconfig"
983 source "arch/arm/mach-shmobile/Kconfig"
985 source "arch/arm/plat-stmp3xxx/Kconfig"
987 source "arch/arm/mach-tegra/Kconfig"
989 source "arch/arm/mach-u300/Kconfig"
991 source "arch/arm/mach-ux500/Kconfig"
993 source "arch/arm/mach-versatile/Kconfig"
995 source "arch/arm/mach-vexpress/Kconfig"
997 source "arch/arm/mach-w90x900/Kconfig"
999 # Definitions to make life easier
1005 select GENERIC_CLOCKEVENTS
1006 select HAVE_SCHED_CLOCK
1010 select HAVE_SCHED_CLOCK
1015 config PLAT_VERSATILE
1018 config ARM_TIMER_SP804
1021 source arch/arm/mm/Kconfig
1024 bool "Enable iWMMXt support"
1025 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1026 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1028 Enable support for iWMMXt context switching at run time if
1029 running on a CPU that supports it.
1031 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1034 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1038 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1039 (!ARCH_OMAP3 || OMAP3_EMU)
1043 config MULTI_IRQ_HANDLER
1046 Allow each machine to specify it's own IRQ handler at run time.
1049 source "arch/arm/Kconfig-nommu"
1052 config ARM_ERRATA_411920
1053 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1056 Invalidation of the Instruction Cache operation can
1057 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1058 It does not affect the MPCore. This option enables the ARM Ltd.
1059 recommended workaround.
1061 config ARM_ERRATA_430973
1062 bool "ARM errata: Stale prediction on replaced interworking branch"
1065 This option enables the workaround for the 430973 Cortex-A8
1066 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1067 interworking branch is replaced with another code sequence at the
1068 same virtual address, whether due to self-modifying code or virtual
1069 to physical address re-mapping, Cortex-A8 does not recover from the
1070 stale interworking branch prediction. This results in Cortex-A8
1071 executing the new code sequence in the incorrect ARM or Thumb state.
1072 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1073 and also flushes the branch target cache at every context switch.
1074 Note that setting specific bits in the ACTLR register may not be
1075 available in non-secure mode.
1077 config ARM_ERRATA_458693
1078 bool "ARM errata: Processor deadlock when a false hazard is created"
1081 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1082 erratum. For very specific sequences of memory operations, it is
1083 possible for a hazard condition intended for a cache line to instead
1084 be incorrectly associated with a different cache line. This false
1085 hazard might then cause a processor deadlock. The workaround enables
1086 the L1 caching of the NEON accesses and disables the PLD instruction
1087 in the ACTLR register. Note that setting specific bits in the ACTLR
1088 register may not be available in non-secure mode.
1090 config ARM_ERRATA_460075
1091 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1094 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1095 erratum. Any asynchronous access to the L2 cache may encounter a
1096 situation in which recent store transactions to the L2 cache are lost
1097 and overwritten with stale memory contents from external memory. The
1098 workaround disables the write-allocate mode for the L2 cache via the
1099 ACTLR register. Note that setting specific bits in the ACTLR register
1100 may not be available in non-secure mode.
1102 config ARM_ERRATA_742230
1103 bool "ARM errata: DMB operation may be faulty"
1104 depends on CPU_V7 && SMP
1106 This option enables the workaround for the 742230 Cortex-A9
1107 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1108 between two write operations may not ensure the correct visibility
1109 ordering of the two writes. This workaround sets a specific bit in
1110 the diagnostic register of the Cortex-A9 which causes the DMB
1111 instruction to behave as a DSB, ensuring the correct behaviour of
1114 config ARM_ERRATA_742231
1115 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1116 depends on CPU_V7 && SMP
1118 This option enables the workaround for the 742231 Cortex-A9
1119 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1120 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1121 accessing some data located in the same cache line, may get corrupted
1122 data due to bad handling of the address hazard when the line gets
1123 replaced from one of the CPUs at the same time as another CPU is
1124 accessing it. This workaround sets specific bits in the diagnostic
1125 register of the Cortex-A9 which reduces the linefill issuing
1126 capabilities of the processor.
1128 config PL310_ERRATA_588369
1129 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1130 depends on CACHE_L2X0 && ARCH_OMAP4
1132 The PL310 L2 cache controller implements three types of Clean &
1133 Invalidate maintenance operations: by Physical Address
1134 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1135 They are architecturally defined to behave as the execution of a
1136 clean operation followed immediately by an invalidate operation,
1137 both performing to the same memory location. This functionality
1138 is not correctly implemented in PL310 as clean lines are not
1139 invalidated as a result of these operations. Note that this errata
1140 uses Texas Instrument's secure monitor api.
1142 config ARM_ERRATA_720789
1143 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1144 depends on CPU_V7 && SMP
1146 This option enables the workaround for the 720789 Cortex-A9 (prior to
1147 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1148 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1149 As a consequence of this erratum, some TLB entries which should be
1150 invalidated are not, resulting in an incoherency in the system page
1151 tables. The workaround changes the TLB flushing routines to invalidate
1152 entries regardless of the ASID.
1154 config ARM_ERRATA_743622
1155 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1158 This option enables the workaround for the 743622 Cortex-A9
1159 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1160 optimisation in the Cortex-A9 Store Buffer may lead to data
1161 corruption. This workaround sets a specific bit in the diagnostic
1162 register of the Cortex-A9 which disables the Store Buffer
1163 optimisation, preventing the defect from occurring. This has no
1164 visible impact on the overall performance or power consumption of the
1169 source "arch/arm/common/Kconfig"
1179 Find out whether you have ISA slots on your motherboard. ISA is the
1180 name of a bus system, i.e. the way the CPU talks to the other stuff
1181 inside your box. Other bus systems are PCI, EISA, MicroChannel
1182 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1183 newer boards don't support it. If you have ISA, say Y, otherwise N.
1185 # Select ISA DMA controller support
1190 # Select ISA DMA interface
1195 bool "PCI support" if MIGHT_HAVE_PCI
1197 Find out whether you have a PCI motherboard. PCI is the name of a
1198 bus system, i.e. the way the CPU talks to the other stuff inside
1199 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1200 VESA. If you have PCI, say Y, otherwise N.
1206 config PCI_NANOENGINE
1207 bool "BSE nanoEngine PCI support"
1208 depends on SA1100_NANOENGINE
1210 Enable PCI on the BSE nanoEngine board.
1215 # Select the host bridge type
1216 config PCI_HOST_VIA82C505
1218 depends on PCI && ARCH_SHARK
1221 config PCI_HOST_ITE8152
1223 depends on PCI && MACH_ARMCORE
1227 source "drivers/pci/Kconfig"
1229 source "drivers/pcmcia/Kconfig"
1233 menu "Kernel Features"
1235 source "kernel/time/Kconfig"
1238 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1239 depends on EXPERIMENTAL
1240 depends on GENERIC_CLOCKEVENTS
1241 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1242 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1243 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1244 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1245 select USE_GENERIC_SMP_HELPERS
1246 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1248 This enables support for systems with more than one CPU. If you have
1249 a system with only one CPU, like most personal computers, say N. If
1250 you have a system with more than one CPU, say Y.
1252 If you say N here, the kernel will run on single and multiprocessor
1253 machines, but will use only one CPU of a multiprocessor machine. If
1254 you say Y here, the kernel will run on many, but not all, single
1255 processor machines. On a single processor machine, the kernel will
1256 run faster if you say N here.
1258 See also <file:Documentation/i386/IO-APIC.txt>,
1259 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1260 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1262 If you don't know what to do here, say N.
1265 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1266 depends on EXPERIMENTAL
1267 depends on SMP && !XIP_KERNEL
1270 SMP kernels contain instructions which fail on non-SMP processors.
1271 Enabling this option allows the kernel to modify itself to make
1272 these instructions safe. Disabling it allows about 1K of space
1275 If you don't know what to do here, say Y.
1281 This option enables support for the ARM system coherency unit
1288 This options enables support for the ARM timer and watchdog unit
1291 prompt "Memory split"
1294 Select the desired split between kernel and user memory.
1296 If you are not absolutely sure what you are doing, leave this
1300 bool "3G/1G user/kernel split"
1302 bool "2G/2G user/kernel split"
1304 bool "1G/3G user/kernel split"
1309 default 0x40000000 if VMSPLIT_1G
1310 default 0x80000000 if VMSPLIT_2G
1314 int "Maximum number of CPUs (2-32)"
1320 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1321 depends on SMP && HOTPLUG && EXPERIMENTAL
1322 depends on !ARCH_MSM
1324 Say Y here to experiment with turning CPUs off and on. CPUs
1325 can be controlled through /sys/devices/system/cpu.
1328 bool "Use local timer interrupts"
1331 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1333 Enable support for local timers on SMP platforms, rather then the
1334 legacy IPI broadcast method. Local timers allows the system
1335 accounting to be spread across the timer interval, preventing a
1336 "thundering herd" at every timer tick.
1338 source kernel/Kconfig.preempt
1342 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1343 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1344 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1345 default AT91_TIMER_HZ if ARCH_AT91
1346 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1349 config THUMB2_KERNEL
1350 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1351 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1353 select ARM_ASM_UNIFIED
1355 By enabling this option, the kernel will be compiled in
1356 Thumb-2 mode. A compiler/assembler that understand the unified
1357 ARM-Thumb syntax is needed.
1361 config ARM_ASM_UNIFIED
1365 bool "Use the ARM EABI to compile the kernel"
1367 This option allows for the kernel to be compiled using the latest
1368 ARM ABI (aka EABI). This is only useful if you are using a user
1369 space environment that is also compiled with EABI.
1371 Since there are major incompatibilities between the legacy ABI and
1372 EABI, especially with regard to structure member alignment, this
1373 option also changes the kernel syscall calling convention to
1374 disambiguate both ABIs and allow for backward compatibility support
1375 (selected with CONFIG_OABI_COMPAT).
1377 To use this you need GCC version 4.0.0 or later.
1380 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1381 depends on AEABI && EXPERIMENTAL
1384 This option preserves the old syscall interface along with the
1385 new (ARM EABI) one. It also provides a compatibility layer to
1386 intercept syscalls that have structure arguments which layout
1387 in memory differs between the legacy ABI and the new ARM EABI
1388 (only for non "thumb" binaries). This option adds a tiny
1389 overhead to all syscalls and produces a slightly larger kernel.
1390 If you know you'll be using only pure EABI user space then you
1391 can say N here. If this option is not selected and you attempt
1392 to execute a legacy ABI binary then the result will be
1393 UNPREDICTABLE (in fact it can be predicted that it won't work
1394 at all). If in doubt say Y.
1396 config ARCH_HAS_HOLES_MEMORYMODEL
1399 config ARCH_SPARSEMEM_ENABLE
1402 config ARCH_SPARSEMEM_DEFAULT
1403 def_bool ARCH_SPARSEMEM_ENABLE
1405 config ARCH_SELECT_MEMORY_MODEL
1406 def_bool ARCH_SPARSEMEM_ENABLE
1409 bool "High Memory Support (EXPERIMENTAL)"
1410 depends on MMU && EXPERIMENTAL
1412 The address space of ARM processors is only 4 Gigabytes large
1413 and it has to accommodate user address space, kernel address
1414 space as well as some memory mapped IO. That means that, if you
1415 have a large amount of physical memory and/or IO, not all of the
1416 memory can be "permanently mapped" by the kernel. The physical
1417 memory that is not permanently mapped is called "high memory".
1419 Depending on the selected kernel/user memory split, minimum
1420 vmalloc space and actual amount of RAM, you may not need this
1421 option which should result in a slightly faster kernel.
1426 bool "Allocate 2nd-level pagetables from highmem"
1428 depends on !OUTER_CACHE
1430 config HW_PERF_EVENTS
1431 bool "Enable hardware performance counter support for perf events"
1432 depends on PERF_EVENTS && CPU_HAS_PMU
1435 Enable hardware performance counter support for perf events. If
1436 disabled, perf events will use software events only.
1440 config FORCE_MAX_ZONEORDER
1441 int "Maximum zone order" if ARCH_SHMOBILE
1442 range 11 64 if ARCH_SHMOBILE
1443 default "9" if SA1111
1446 The kernel memory allocator divides physically contiguous memory
1447 blocks into "zones", where each zone is a power of two number of
1448 pages. This option selects the largest power of two that the kernel
1449 keeps in the memory allocator. If you need to allocate very large
1450 blocks of physically contiguous memory, then you may need to
1451 increase this value.
1453 This config option is actually maximum order plus one. For example,
1454 a value of 11 means that the largest free memory block is 2^10 pages.
1457 bool "Timer and CPU usage LEDs"
1458 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1459 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1460 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1461 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1462 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1463 ARCH_AT91 || ARCH_DAVINCI || \
1464 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1466 If you say Y here, the LEDs on your machine will be used
1467 to provide useful information about your current system status.
1469 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1470 be able to select which LEDs are active using the options below. If
1471 you are compiling a kernel for the EBSA-110 or the LART however, the
1472 red LED will simply flash regularly to indicate that the system is
1473 still functional. It is safe to say Y here if you have a CATS
1474 system, but the driver will do nothing.
1477 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1478 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1479 || MACH_OMAP_PERSEUS2
1481 depends on !GENERIC_CLOCKEVENTS
1482 default y if ARCH_EBSA110
1484 If you say Y here, one of the system LEDs (the green one on the
1485 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1486 will flash regularly to indicate that the system is still
1487 operational. This is mainly useful to kernel hackers who are
1488 debugging unstable kernels.
1490 The LART uses the same LED for both Timer LED and CPU usage LED
1491 functions. You may choose to use both, but the Timer LED function
1492 will overrule the CPU usage LED.
1495 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1497 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1498 || MACH_OMAP_PERSEUS2
1501 If you say Y here, the red LED will be used to give a good real
1502 time indication of CPU usage, by lighting whenever the idle task
1503 is not currently executing.
1505 The LART uses the same LED for both Timer LED and CPU usage LED
1506 functions. You may choose to use both, but the Timer LED function
1507 will overrule the CPU usage LED.
1509 config ALIGNMENT_TRAP
1511 depends on CPU_CP15_MMU
1512 default y if !ARCH_EBSA110
1513 select HAVE_PROC_CPU if PROC_FS
1515 ARM processors cannot fetch/store information which is not
1516 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1517 address divisible by 4. On 32-bit ARM processors, these non-aligned
1518 fetch/store instructions will be emulated in software if you say
1519 here, which has a severe performance impact. This is necessary for
1520 correct operation of some network protocols. With an IP-only
1521 configuration it is safe to say N, otherwise say Y.
1523 config UACCESS_WITH_MEMCPY
1524 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1525 depends on MMU && EXPERIMENTAL
1526 default y if CPU_FEROCEON
1528 Implement faster copy_to_user and clear_user methods for CPU
1529 cores where a 8-word STM instruction give significantly higher
1530 memory write throughput than a sequence of individual 32bit stores.
1532 A possible side effect is a slight increase in scheduling latency
1533 between threads sharing the same address space if they invoke
1534 such copy operations with large buffers.
1536 However, if the CPU data cache is using a write-allocate mode,
1537 this option is unlikely to provide any performance gain.
1541 prompt "Enable seccomp to safely compute untrusted bytecode"
1543 This kernel feature is useful for number crunching applications
1544 that may need to compute untrusted bytecode during their
1545 execution. By using pipes or other transports made available to
1546 the process as file descriptors supporting the read/write
1547 syscalls, it's possible to isolate those applications in
1548 their own address space using seccomp. Once seccomp is
1549 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1550 and the task is only allowed to execute a few safe syscalls
1551 defined by each seccomp mode.
1553 config CC_STACKPROTECTOR
1554 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1555 depends on EXPERIMENTAL
1557 This option turns on the -fstack-protector GCC feature. This
1558 feature puts, at the beginning of functions, a canary value on
1559 the stack just before the return address, and validates
1560 the value just before actually returning. Stack based buffer
1561 overflows (that need to overwrite this return address) now also
1562 overwrite the canary, which gets detected and the attack is then
1563 neutralized via a kernel panic.
1564 This feature requires gcc version 4.2 or above.
1566 config DEPRECATED_PARAM_STRUCT
1567 bool "Provide old way to pass kernel parameters"
1569 This was deprecated in 2001 and announced to live on for 5 years.
1570 Some old boot loaders still use this way.
1576 # Compressed boot loader in ROM. Yes, we really want to ask about
1577 # TEXT and BSS so we preserve their values in the config files.
1578 config ZBOOT_ROM_TEXT
1579 hex "Compressed ROM boot loader base address"
1582 The physical address at which the ROM-able zImage is to be
1583 placed in the target. Platforms which normally make use of
1584 ROM-able zImage formats normally set this to a suitable
1585 value in their defconfig file.
1587 If ZBOOT_ROM is not enabled, this has no effect.
1589 config ZBOOT_ROM_BSS
1590 hex "Compressed ROM boot loader BSS address"
1593 The base address of an area of read/write memory in the target
1594 for the ROM-able zImage which must be available while the
1595 decompressor is running. It must be large enough to hold the
1596 entire decompressed kernel plus an additional 128 KiB.
1597 Platforms which normally make use of ROM-able zImage formats
1598 normally set this to a suitable value in their defconfig file.
1600 If ZBOOT_ROM is not enabled, this has no effect.
1603 bool "Compressed boot loader in ROM/flash"
1604 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1606 Say Y here if you intend to execute your compressed kernel image
1607 (zImage) directly from ROM or flash. If unsure, say N.
1610 string "Default kernel command string"
1613 On some architectures (EBSA110 and CATS), there is currently no way
1614 for the boot loader to pass arguments to the kernel. For these
1615 architectures, you should supply some command-line options at build
1616 time by entering them here. As a minimum, you should specify the
1617 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1619 config CMDLINE_FORCE
1620 bool "Always use the default kernel command string"
1621 depends on CMDLINE != ""
1623 Always use the default kernel command string, even if the boot
1624 loader passes other arguments to the kernel.
1625 This is useful if you cannot or don't want to change the
1626 command-line options your boot loader passes to the kernel.
1631 bool "Kernel Execute-In-Place from ROM"
1632 depends on !ZBOOT_ROM
1634 Execute-In-Place allows the kernel to run from non-volatile storage
1635 directly addressable by the CPU, such as NOR flash. This saves RAM
1636 space since the text section of the kernel is not loaded from flash
1637 to RAM. Read-write sections, such as the data section and stack,
1638 are still copied to RAM. The XIP kernel is not compressed since
1639 it has to run directly from flash, so it will take more space to
1640 store it. The flash address used to link the kernel object files,
1641 and for storing it, is configuration dependent. Therefore, if you
1642 say Y here, you must know the proper physical address where to
1643 store the kernel image depending on your own flash memory usage.
1645 Also note that the make target becomes "make xipImage" rather than
1646 "make zImage" or "make Image". The final kernel binary to put in
1647 ROM memory will be arch/arm/boot/xipImage.
1651 config XIP_PHYS_ADDR
1652 hex "XIP Kernel Physical Location"
1653 depends on XIP_KERNEL
1654 default "0x00080000"
1656 This is the physical address in your flash memory the kernel will
1657 be linked for and stored to. This address is dependent on your
1661 bool "Kexec system call (EXPERIMENTAL)"
1662 depends on EXPERIMENTAL
1664 kexec is a system call that implements the ability to shutdown your
1665 current kernel, and to start another kernel. It is like a reboot
1666 but it is independent of the system firmware. And like a reboot
1667 you can start any kernel with it, not just Linux.
1669 It is an ongoing process to be certain the hardware in a machine
1670 is properly shutdown, so do not be surprised if this code does not
1671 initially work for you. It may help to enable device hotplugging
1675 bool "Export atags in procfs"
1679 Should the atags used to boot the kernel be exported in an "atags"
1680 file in procfs. Useful with kexec.
1683 bool "Build kdump crash kernel (EXPERIMENTAL)"
1684 depends on EXPERIMENTAL
1686 Generate crash dump after being started by kexec. This should
1687 be normally only set in special crash dump kernels which are
1688 loaded in the main kernel with kexec-tools into a specially
1689 reserved region and then later executed after a crash by
1690 kdump/kexec. The crash dump kernel must be compiled to a
1691 memory address not used by the main kernel
1693 For more details see Documentation/kdump/kdump.txt
1695 config AUTO_ZRELADDR
1696 bool "Auto calculation of the decompressed kernel image address"
1697 depends on !ZBOOT_ROM && !ARCH_U300
1699 ZRELADDR is the physical address where the decompressed kernel
1700 image will be placed. If AUTO_ZRELADDR is selected, the address
1701 will be determined at run-time by masking the current IP with
1702 0xf8000000. This assumes the zImage being placed in the first 128MB
1703 from start of memory.
1707 menu "CPU Power Management"
1711 source "drivers/cpufreq/Kconfig"
1714 tristate "CPUfreq driver for i.MX CPUs"
1715 depends on ARCH_MXC && CPU_FREQ
1717 This enables the CPUfreq driver for i.MX CPUs.
1719 config CPU_FREQ_SA1100
1722 config CPU_FREQ_SA1110
1725 config CPU_FREQ_INTEGRATOR
1726 tristate "CPUfreq driver for ARM Integrator CPUs"
1727 depends on ARCH_INTEGRATOR && CPU_FREQ
1730 This enables the CPUfreq driver for ARM Integrator CPUs.
1732 For details, take a look at <file:Documentation/cpu-freq>.
1738 depends on CPU_FREQ && ARCH_PXA && PXA25x
1740 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1742 config CPU_FREQ_S3C64XX
1743 bool "CPUfreq support for Samsung S3C64XX CPUs"
1744 depends on CPU_FREQ && CPU_S3C6410
1749 Internal configuration node for common cpufreq on Samsung SoC
1751 config CPU_FREQ_S3C24XX
1752 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1753 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1756 This enables the CPUfreq driver for the Samsung S3C24XX family
1759 For details, take a look at <file:Documentation/cpu-freq>.
1763 config CPU_FREQ_S3C24XX_PLL
1764 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1765 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1767 Compile in support for changing the PLL frequency from the
1768 S3C24XX series CPUfreq driver. The PLL takes time to settle
1769 after a frequency change, so by default it is not enabled.
1771 This also means that the PLL tables for the selected CPU(s) will
1772 be built which may increase the size of the kernel image.
1774 config CPU_FREQ_S3C24XX_DEBUG
1775 bool "Debug CPUfreq Samsung driver core"
1776 depends on CPU_FREQ_S3C24XX
1778 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1780 config CPU_FREQ_S3C24XX_IODEBUG
1781 bool "Debug CPUfreq Samsung driver IO timing"
1782 depends on CPU_FREQ_S3C24XX
1784 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1786 config CPU_FREQ_S3C24XX_DEBUGFS
1787 bool "Export debugfs for CPUFreq"
1788 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1790 Export status information via debugfs.
1794 source "drivers/cpuidle/Kconfig"
1798 menu "Floating point emulation"
1800 comment "At least one emulation must be selected"
1803 bool "NWFPE math emulation"
1804 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1806 Say Y to include the NWFPE floating point emulator in the kernel.
1807 This is necessary to run most binaries. Linux does not currently
1808 support floating point hardware so you need to say Y here even if
1809 your machine has an FPA or floating point co-processor podule.
1811 You may say N here if you are going to load the Acorn FPEmulator
1812 early in the bootup.
1815 bool "Support extended precision"
1816 depends on FPE_NWFPE
1818 Say Y to include 80-bit support in the kernel floating-point
1819 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1820 Note that gcc does not generate 80-bit operations by default,
1821 so in most cases this option only enlarges the size of the
1822 floating point emulator without any good reason.
1824 You almost surely want to say N here.
1827 bool "FastFPE math emulation (EXPERIMENTAL)"
1828 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1830 Say Y here to include the FAST floating point emulator in the kernel.
1831 This is an experimental much faster emulator which now also has full
1832 precision for the mantissa. It does not support any exceptions.
1833 It is very simple, and approximately 3-6 times faster than NWFPE.
1835 It should be sufficient for most programs. It may be not suitable
1836 for scientific calculations, but you have to check this for yourself.
1837 If you do not feel you need a faster FP emulation you should better
1841 bool "VFP-format floating point maths"
1842 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1844 Say Y to include VFP support code in the kernel. This is needed
1845 if your hardware includes a VFP unit.
1847 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1848 release notes and additional status information.
1850 Say N if your target does not have VFP hardware.
1858 bool "Advanced SIMD (NEON) Extension support"
1859 depends on VFPv3 && CPU_V7
1861 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1866 menu "Userspace binary formats"
1868 source "fs/Kconfig.binfmt"
1871 tristate "RISC OS personality"
1874 Say Y here to include the kernel code necessary if you want to run
1875 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1876 experimental; if this sounds frightening, say N and sleep in peace.
1877 You can also say M here to compile this support as a module (which
1878 will be called arthur).
1882 menu "Power management options"
1884 source "kernel/power/Kconfig"
1886 config ARCH_SUSPEND_POSSIBLE
1891 source "net/Kconfig"
1893 source "drivers/Kconfig"
1897 source "arch/arm/Kconfig.debug"
1899 source "security/Kconfig"
1901 source "crypto/Kconfig"
1903 source "lib/Kconfig"