[PATCH] arm: task_pt_regs()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / kernel / ptrace.c
blobe591f72bcdeb0abf8d6714e94219de4cdc2d7720
1 /*
2 * linux/arch/arm/kernel/ptrace.c
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/config.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/mm.h>
16 #include <linux/smp.h>
17 #include <linux/smp_lock.h>
18 #include <linux/ptrace.h>
19 #include <linux/user.h>
20 #include <linux/security.h>
21 #include <linux/init.h>
22 #include <linux/signal.h>
24 #include <asm/uaccess.h>
25 #include <asm/pgtable.h>
26 #include <asm/system.h>
27 #include <asm/traps.h>
29 #include "ptrace.h"
31 #define REG_PC 15
32 #define REG_PSR 16
34 * does not yet catch signals sent when the child dies.
35 * in exit.c or in signal.c.
38 #if 0
40 * Breakpoint SWI instruction: SWI &9F0001
42 #define BREAKINST_ARM 0xef9f0001
43 #define BREAKINST_THUMB 0xdf00 /* fill this in later */
44 #else
46 * New breakpoints - use an undefined instruction. The ARM architecture
47 * reference manual guarantees that the following instruction space
48 * will produce an undefined instruction exception on all CPUs:
50 * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
51 * Thumb: 1101 1110 xxxx xxxx
53 #define BREAKINST_ARM 0xe7f001f0
54 #define BREAKINST_THUMB 0xde01
55 #endif
58 * this routine will get a word off of the processes privileged stack.
59 * the offset is how far from the base addr as stored in the THREAD.
60 * this routine assumes that all the privileged stacks are in our
61 * data space.
63 static inline long get_user_reg(struct task_struct *task, int offset)
65 return task_pt_regs(task)->uregs[offset];
69 * this routine will put a word on the processes privileged stack.
70 * the offset is how far from the base addr as stored in the THREAD.
71 * this routine assumes that all the privileged stacks are in our
72 * data space.
74 static inline int
75 put_user_reg(struct task_struct *task, int offset, long data)
77 struct pt_regs newregs, *regs = task_pt_regs(task);
78 int ret = -EINVAL;
80 newregs = *regs;
81 newregs.uregs[offset] = data;
83 if (valid_user_regs(&newregs)) {
84 regs->uregs[offset] = data;
85 ret = 0;
88 return ret;
91 static inline int
92 read_u32(struct task_struct *task, unsigned long addr, u32 *res)
94 int ret;
96 ret = access_process_vm(task, addr, res, sizeof(*res), 0);
98 return ret == sizeof(*res) ? 0 : -EIO;
101 static inline int
102 read_instr(struct task_struct *task, unsigned long addr, u32 *res)
104 int ret;
106 if (addr & 1) {
107 u16 val;
108 ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
109 ret = ret == sizeof(val) ? 0 : -EIO;
110 *res = val;
111 } else {
112 u32 val;
113 ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
114 ret = ret == sizeof(val) ? 0 : -EIO;
115 *res = val;
117 return ret;
121 * Get value of register `rn' (in the instruction)
123 static unsigned long
124 ptrace_getrn(struct task_struct *child, unsigned long insn)
126 unsigned int reg = (insn >> 16) & 15;
127 unsigned long val;
129 val = get_user_reg(child, reg);
130 if (reg == 15)
131 val = pc_pointer(val + 8);
133 return val;
137 * Get value of operand 2 (in an ALU instruction)
139 static unsigned long
140 ptrace_getaluop2(struct task_struct *child, unsigned long insn)
142 unsigned long val;
143 int shift;
144 int type;
146 if (insn & 1 << 25) {
147 val = insn & 255;
148 shift = (insn >> 8) & 15;
149 type = 3;
150 } else {
151 val = get_user_reg (child, insn & 15);
153 if (insn & (1 << 4))
154 shift = (int)get_user_reg (child, (insn >> 8) & 15);
155 else
156 shift = (insn >> 7) & 31;
158 type = (insn >> 5) & 3;
161 switch (type) {
162 case 0: val <<= shift; break;
163 case 1: val >>= shift; break;
164 case 2:
165 val = (((signed long)val) >> shift);
166 break;
167 case 3:
168 val = (val >> shift) | (val << (32 - shift));
169 break;
171 return val;
175 * Get value of operand 2 (in a LDR instruction)
177 static unsigned long
178 ptrace_getldrop2(struct task_struct *child, unsigned long insn)
180 unsigned long val;
181 int shift;
182 int type;
184 val = get_user_reg(child, insn & 15);
185 shift = (insn >> 7) & 31;
186 type = (insn >> 5) & 3;
188 switch (type) {
189 case 0: val <<= shift; break;
190 case 1: val >>= shift; break;
191 case 2:
192 val = (((signed long)val) >> shift);
193 break;
194 case 3:
195 val = (val >> shift) | (val << (32 - shift));
196 break;
198 return val;
201 #define OP_MASK 0x01e00000
202 #define OP_AND 0x00000000
203 #define OP_EOR 0x00200000
204 #define OP_SUB 0x00400000
205 #define OP_RSB 0x00600000
206 #define OP_ADD 0x00800000
207 #define OP_ADC 0x00a00000
208 #define OP_SBC 0x00c00000
209 #define OP_RSC 0x00e00000
210 #define OP_ORR 0x01800000
211 #define OP_MOV 0x01a00000
212 #define OP_BIC 0x01c00000
213 #define OP_MVN 0x01e00000
215 static unsigned long
216 get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
218 u32 alt = 0;
220 switch (insn & 0x0e000000) {
221 case 0x00000000:
222 case 0x02000000: {
224 * data processing
226 long aluop1, aluop2, ccbit;
228 if ((insn & 0x0fffffd0) == 0x012fff10) {
230 * bx or blx
232 alt = get_user_reg(child, insn & 15);
233 break;
237 if ((insn & 0xf000) != 0xf000)
238 break;
240 aluop1 = ptrace_getrn(child, insn);
241 aluop2 = ptrace_getaluop2(child, insn);
242 ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
244 switch (insn & OP_MASK) {
245 case OP_AND: alt = aluop1 & aluop2; break;
246 case OP_EOR: alt = aluop1 ^ aluop2; break;
247 case OP_SUB: alt = aluop1 - aluop2; break;
248 case OP_RSB: alt = aluop2 - aluop1; break;
249 case OP_ADD: alt = aluop1 + aluop2; break;
250 case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
251 case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
252 case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
253 case OP_ORR: alt = aluop1 | aluop2; break;
254 case OP_MOV: alt = aluop2; break;
255 case OP_BIC: alt = aluop1 & ~aluop2; break;
256 case OP_MVN: alt = ~aluop2; break;
258 break;
261 case 0x04000000:
262 case 0x06000000:
264 * ldr
266 if ((insn & 0x0010f000) == 0x0010f000) {
267 unsigned long base;
269 base = ptrace_getrn(child, insn);
270 if (insn & 1 << 24) {
271 long aluop2;
273 if (insn & 0x02000000)
274 aluop2 = ptrace_getldrop2(child, insn);
275 else
276 aluop2 = insn & 0xfff;
278 if (insn & 1 << 23)
279 base += aluop2;
280 else
281 base -= aluop2;
283 if (read_u32(child, base, &alt) == 0)
284 alt = pc_pointer(alt);
286 break;
288 case 0x08000000:
290 * ldm
292 if ((insn & 0x00108000) == 0x00108000) {
293 unsigned long base;
294 unsigned int nr_regs;
296 if (insn & (1 << 23)) {
297 nr_regs = hweight16(insn & 65535) << 2;
299 if (!(insn & (1 << 24)))
300 nr_regs -= 4;
301 } else {
302 if (insn & (1 << 24))
303 nr_regs = -4;
304 else
305 nr_regs = 0;
308 base = ptrace_getrn(child, insn);
310 if (read_u32(child, base + nr_regs, &alt) == 0)
311 alt = pc_pointer(alt);
312 break;
314 break;
316 case 0x0a000000: {
318 * bl or b
320 signed long displ;
321 /* It's a branch/branch link: instead of trying to
322 * figure out whether the branch will be taken or not,
323 * we'll put a breakpoint at both locations. This is
324 * simpler, more reliable, and probably not a whole lot
325 * slower than the alternative approach of emulating the
326 * branch.
328 displ = (insn & 0x00ffffff) << 8;
329 displ = (displ >> 6) + 8;
330 if (displ != 0 && displ != 4)
331 alt = pc + displ;
333 break;
336 return alt;
339 static int
340 swap_insn(struct task_struct *task, unsigned long addr,
341 void *old_insn, void *new_insn, int size)
343 int ret;
345 ret = access_process_vm(task, addr, old_insn, size, 0);
346 if (ret == size)
347 ret = access_process_vm(task, addr, new_insn, size, 1);
348 return ret;
351 static void
352 add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
354 int nr = dbg->nsaved;
356 if (nr < 2) {
357 u32 new_insn = BREAKINST_ARM;
358 int res;
360 res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
362 if (res == 4) {
363 dbg->bp[nr].address = addr;
364 dbg->nsaved += 1;
366 } else
367 printk(KERN_ERR "ptrace: too many breakpoints\n");
371 * Clear one breakpoint in the user program. We copy what the hardware
372 * does and use bit 0 of the address to indicate whether this is a Thumb
373 * breakpoint or an ARM breakpoint.
375 static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
377 unsigned long addr = bp->address;
378 union debug_insn old_insn;
379 int ret;
381 if (addr & 1) {
382 ret = swap_insn(task, addr & ~1, &old_insn.thumb,
383 &bp->insn.thumb, 2);
385 if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
386 printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
387 "0x%08lx (0x%04x)\n", task->comm, task->pid,
388 addr, old_insn.thumb);
389 } else {
390 ret = swap_insn(task, addr & ~3, &old_insn.arm,
391 &bp->insn.arm, 4);
393 if (ret != 4 || old_insn.arm != BREAKINST_ARM)
394 printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
395 "0x%08lx (0x%08x)\n", task->comm, task->pid,
396 addr, old_insn.arm);
400 void ptrace_set_bpt(struct task_struct *child)
402 struct pt_regs *regs;
403 unsigned long pc;
404 u32 insn;
405 int res;
407 regs = task_pt_regs(child);
408 pc = instruction_pointer(regs);
410 if (thumb_mode(regs)) {
411 printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
412 return;
415 res = read_instr(child, pc, &insn);
416 if (!res) {
417 struct debug_info *dbg = &child->thread.debug;
418 unsigned long alt;
420 dbg->nsaved = 0;
422 alt = get_branch_address(child, pc, insn);
423 if (alt)
424 add_breakpoint(child, dbg, alt);
427 * Note that we ignore the result of setting the above
428 * breakpoint since it may fail. When it does, this is
429 * not so much an error, but a forewarning that we may
430 * be receiving a prefetch abort shortly.
432 * If we don't set this breakpoint here, then we can
433 * lose control of the thread during single stepping.
435 if (!alt || predicate(insn) != PREDICATE_ALWAYS)
436 add_breakpoint(child, dbg, pc + 4);
441 * Ensure no single-step breakpoint is pending. Returns non-zero
442 * value if child was being single-stepped.
444 void ptrace_cancel_bpt(struct task_struct *child)
446 int i, nsaved = child->thread.debug.nsaved;
448 child->thread.debug.nsaved = 0;
450 if (nsaved > 2) {
451 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
452 nsaved = 2;
455 for (i = 0; i < nsaved; i++)
456 clear_breakpoint(child, &child->thread.debug.bp[i]);
460 * Called by kernel/ptrace.c when detaching..
462 * Make sure the single step bit is not set.
464 void ptrace_disable(struct task_struct *child)
466 child->ptrace &= ~PT_SINGLESTEP;
467 ptrace_cancel_bpt(child);
471 * Handle hitting a breakpoint.
473 void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
475 siginfo_t info;
477 ptrace_cancel_bpt(tsk);
479 info.si_signo = SIGTRAP;
480 info.si_errno = 0;
481 info.si_code = TRAP_BRKPT;
482 info.si_addr = (void __user *)instruction_pointer(regs);
484 force_sig_info(SIGTRAP, &info, tsk);
487 static int break_trap(struct pt_regs *regs, unsigned int instr)
489 ptrace_break(current, regs);
490 return 0;
493 static struct undef_hook arm_break_hook = {
494 .instr_mask = 0x0fffffff,
495 .instr_val = 0x07f001f0,
496 .cpsr_mask = PSR_T_BIT,
497 .cpsr_val = 0,
498 .fn = break_trap,
501 static struct undef_hook thumb_break_hook = {
502 .instr_mask = 0xffff,
503 .instr_val = 0xde01,
504 .cpsr_mask = PSR_T_BIT,
505 .cpsr_val = PSR_T_BIT,
506 .fn = break_trap,
509 static int __init ptrace_break_init(void)
511 register_undef_hook(&arm_break_hook);
512 register_undef_hook(&thumb_break_hook);
513 return 0;
516 core_initcall(ptrace_break_init);
519 * Read the word at offset "off" into the "struct user". We
520 * actually access the pt_regs stored on the kernel stack.
522 static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
523 unsigned long __user *ret)
525 unsigned long tmp;
527 if (off & 3 || off >= sizeof(struct user))
528 return -EIO;
530 tmp = 0;
531 if (off < sizeof(struct pt_regs))
532 tmp = get_user_reg(tsk, off >> 2);
534 return put_user(tmp, ret);
538 * Write the word at offset "off" into "struct user". We
539 * actually access the pt_regs stored on the kernel stack.
541 static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
542 unsigned long val)
544 if (off & 3 || off >= sizeof(struct user))
545 return -EIO;
547 if (off >= sizeof(struct pt_regs))
548 return 0;
550 return put_user_reg(tsk, off >> 2, val);
554 * Get all user integer registers.
556 static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
558 struct pt_regs *regs = task_pt_regs(tsk);
560 return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
564 * Set all user integer registers.
566 static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
568 struct pt_regs newregs;
569 int ret;
571 ret = -EFAULT;
572 if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
573 struct pt_regs *regs = task_pt_regs(tsk);
575 ret = -EINVAL;
576 if (valid_user_regs(&newregs)) {
577 *regs = newregs;
578 ret = 0;
582 return ret;
586 * Get the child FPU state.
588 static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
590 return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
591 sizeof(struct user_fp)) ? -EFAULT : 0;
595 * Set the child FPU state.
597 static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
599 struct thread_info *thread = task_thread_info(tsk);
600 thread->used_cp[1] = thread->used_cp[2] = 1;
601 return copy_from_user(&thread->fpstate, ufp,
602 sizeof(struct user_fp)) ? -EFAULT : 0;
605 #ifdef CONFIG_IWMMXT
608 * Get the child iWMMXt state.
610 static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
612 struct thread_info *thread = task_thread_info(tsk);
613 void *ptr = &thread->fpstate;
615 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
616 return -ENODATA;
617 iwmmxt_task_disable(thread); /* force it to ram */
618 /* The iWMMXt state is stored doubleword-aligned. */
619 if (((long) ptr) & 4)
620 ptr += 4;
621 return copy_to_user(ufp, ptr, 0x98) ? -EFAULT : 0;
625 * Set the child iWMMXt state.
627 static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
629 struct thread_info *thread = task_thread_info(tsk);
630 void *ptr = &thread->fpstate;
632 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
633 return -EACCES;
634 iwmmxt_task_release(thread); /* force a reload */
635 /* The iWMMXt state is stored doubleword-aligned. */
636 if (((long) ptr) & 4)
637 ptr += 4;
638 return copy_from_user(ptr, ufp, 0x98) ? -EFAULT : 0;
641 #endif
643 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
645 unsigned long tmp;
646 int ret;
648 switch (request) {
650 * read word at location "addr" in the child process.
652 case PTRACE_PEEKTEXT:
653 case PTRACE_PEEKDATA:
654 ret = access_process_vm(child, addr, &tmp,
655 sizeof(unsigned long), 0);
656 if (ret == sizeof(unsigned long))
657 ret = put_user(tmp, (unsigned long __user *) data);
658 else
659 ret = -EIO;
660 break;
662 case PTRACE_PEEKUSR:
663 ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
664 break;
667 * write the word at location addr.
669 case PTRACE_POKETEXT:
670 case PTRACE_POKEDATA:
671 ret = access_process_vm(child, addr, &data,
672 sizeof(unsigned long), 1);
673 if (ret == sizeof(unsigned long))
674 ret = 0;
675 else
676 ret = -EIO;
677 break;
679 case PTRACE_POKEUSR:
680 ret = ptrace_write_user(child, addr, data);
681 break;
684 * continue/restart and stop at next (return from) syscall
686 case PTRACE_SYSCALL:
687 case PTRACE_CONT:
688 ret = -EIO;
689 if (!valid_signal(data))
690 break;
691 if (request == PTRACE_SYSCALL)
692 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
693 else
694 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
695 child->exit_code = data;
696 /* make sure single-step breakpoint is gone. */
697 child->ptrace &= ~PT_SINGLESTEP;
698 ptrace_cancel_bpt(child);
699 wake_up_process(child);
700 ret = 0;
701 break;
704 * make the child exit. Best I can do is send it a sigkill.
705 * perhaps it should be put in the status that it wants to
706 * exit.
708 case PTRACE_KILL:
709 /* make sure single-step breakpoint is gone. */
710 child->ptrace &= ~PT_SINGLESTEP;
711 ptrace_cancel_bpt(child);
712 if (child->exit_state != EXIT_ZOMBIE) {
713 child->exit_code = SIGKILL;
714 wake_up_process(child);
716 ret = 0;
717 break;
720 * execute single instruction.
722 case PTRACE_SINGLESTEP:
723 ret = -EIO;
724 if (!valid_signal(data))
725 break;
726 child->ptrace |= PT_SINGLESTEP;
727 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
728 child->exit_code = data;
729 /* give it a chance to run. */
730 wake_up_process(child);
731 ret = 0;
732 break;
734 case PTRACE_DETACH:
735 ret = ptrace_detach(child, data);
736 break;
738 case PTRACE_GETREGS:
739 ret = ptrace_getregs(child, (void __user *)data);
740 break;
742 case PTRACE_SETREGS:
743 ret = ptrace_setregs(child, (void __user *)data);
744 break;
746 case PTRACE_GETFPREGS:
747 ret = ptrace_getfpregs(child, (void __user *)data);
748 break;
750 case PTRACE_SETFPREGS:
751 ret = ptrace_setfpregs(child, (void __user *)data);
752 break;
754 #ifdef CONFIG_IWMMXT
755 case PTRACE_GETWMMXREGS:
756 ret = ptrace_getwmmxregs(child, (void __user *)data);
757 break;
759 case PTRACE_SETWMMXREGS:
760 ret = ptrace_setwmmxregs(child, (void __user *)data);
761 break;
762 #endif
764 case PTRACE_GET_THREAD_AREA:
765 ret = put_user(task_thread_info(child)->tp_value,
766 (unsigned long __user *) data);
767 break;
769 default:
770 ret = ptrace_request(child, request, addr, data);
771 break;
774 return ret;
777 asmlinkage void syscall_trace(int why, struct pt_regs *regs)
779 unsigned long ip;
781 if (!test_thread_flag(TIF_SYSCALL_TRACE))
782 return;
783 if (!(current->ptrace & PT_PTRACED))
784 return;
787 * Save IP. IP is used to denote syscall entry/exit:
788 * IP = 0 -> entry, = 1 -> exit
790 ip = regs->ARM_ip;
791 regs->ARM_ip = why;
793 /* the 0x80 provides a way for the tracing parent to distinguish
794 between a syscall stop and SIGTRAP delivery */
795 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
796 ? 0x80 : 0));
798 * this isn't the same as continuing with a signal, but it will do
799 * for normal use. strace only continues with a signal if the
800 * stopping signal is not SIGTRAP. -brl
802 if (current->exit_code) {
803 send_sig(current->exit_code, current, 1);
804 current->exit_code = 0;
806 regs->ARM_ip = ip;