[ARM] 4550/1: sched_clock on PXA should cope with run time clock rate selection
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-pxa / generic.c
blob9d6a2c00d7628de71def0616e5411593c5facc46
1 /*
2 * linux/arch/arm/mach-pxa/generic.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code common to all PXA machines.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <linux/ioport.h>
25 #include <linux/pm.h>
26 #include <linux/string.h>
28 #include <asm/hardware.h>
29 #include <asm/irq.h>
30 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/mach/map.h>
34 #include <asm/arch/pxa-regs.h>
35 #include <asm/arch/gpio.h>
36 #include <asm/arch/udc.h>
37 #include <asm/arch/pxafb.h>
38 #include <asm/arch/mmc.h>
39 #include <asm/arch/irda.h>
40 #include <asm/arch/i2c.h>
42 #include "devices.h"
43 #include "generic.h"
46 * Handy function to set GPIO alternate functions
49 int pxa_gpio_mode(int gpio_mode)
51 unsigned long flags;
52 int gpio = gpio_mode & GPIO_MD_MASK_NR;
53 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
54 int gafr;
56 if (gpio > PXA_LAST_GPIO)
57 return -EINVAL;
59 local_irq_save(flags);
60 if (gpio_mode & GPIO_DFLT_LOW)
61 GPCR(gpio) = GPIO_bit(gpio);
62 else if (gpio_mode & GPIO_DFLT_HIGH)
63 GPSR(gpio) = GPIO_bit(gpio);
64 if (gpio_mode & GPIO_MD_MASK_DIR)
65 GPDR(gpio) |= GPIO_bit(gpio);
66 else
67 GPDR(gpio) &= ~GPIO_bit(gpio);
68 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
69 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
70 local_irq_restore(flags);
72 return 0;
75 EXPORT_SYMBOL(pxa_gpio_mode);
78 * Return GPIO level
80 int pxa_gpio_get_value(unsigned gpio)
82 return __gpio_get_value(gpio);
85 EXPORT_SYMBOL(pxa_gpio_get_value);
88 * Set output GPIO level
90 void pxa_gpio_set_value(unsigned gpio, int value)
92 __gpio_set_value(gpio, value);
95 EXPORT_SYMBOL(pxa_gpio_set_value);
98 * Routine to safely enable or disable a clock in the CKEN
100 void pxa_set_cken(int clock, int enable)
102 unsigned long flags;
103 local_irq_save(flags);
105 if (enable)
106 CKEN |= (1 << clock);
107 else
108 CKEN &= ~(1 << clock);
110 local_irq_restore(flags);
113 EXPORT_SYMBOL(pxa_set_cken);
116 * Intel PXA2xx internal register mapping.
118 * Note 1: not all PXA2xx variants implement all those addresses.
120 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
121 * and cache flush area.
123 static struct map_desc standard_io_desc[] __initdata = {
124 { /* Devs */
125 .virtual = 0xf2000000,
126 .pfn = __phys_to_pfn(0x40000000),
127 .length = 0x02000000,
128 .type = MT_DEVICE
129 }, { /* LCD */
130 .virtual = 0xf4000000,
131 .pfn = __phys_to_pfn(0x44000000),
132 .length = 0x00100000,
133 .type = MT_DEVICE
134 }, { /* Mem Ctl */
135 .virtual = 0xf6000000,
136 .pfn = __phys_to_pfn(0x48000000),
137 .length = 0x00100000,
138 .type = MT_DEVICE
139 }, { /* USB host */
140 .virtual = 0xf8000000,
141 .pfn = __phys_to_pfn(0x4c000000),
142 .length = 0x00100000,
143 .type = MT_DEVICE
144 }, { /* Camera */
145 .virtual = 0xfa000000,
146 .pfn = __phys_to_pfn(0x50000000),
147 .length = 0x00100000,
148 .type = MT_DEVICE
149 }, { /* IMem ctl */
150 .virtual = 0xfe000000,
151 .pfn = __phys_to_pfn(0x58000000),
152 .length = 0x00100000,
153 .type = MT_DEVICE
154 }, { /* UNCACHED_PHYS_0 */
155 .virtual = 0xff000000,
156 .pfn = __phys_to_pfn(0x00000000),
157 .length = 0x00100000,
158 .type = MT_DEVICE
162 void __init pxa_map_io(void)
164 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
165 get_clk_frequency_khz(1);
169 static struct resource pxamci_resources[] = {
170 [0] = {
171 .start = 0x41100000,
172 .end = 0x41100fff,
173 .flags = IORESOURCE_MEM,
175 [1] = {
176 .start = IRQ_MMC,
177 .end = IRQ_MMC,
178 .flags = IORESOURCE_IRQ,
182 static u64 pxamci_dmamask = 0xffffffffUL;
184 struct platform_device pxa_device_mci = {
185 .name = "pxa2xx-mci",
186 .id = -1,
187 .dev = {
188 .dma_mask = &pxamci_dmamask,
189 .coherent_dma_mask = 0xffffffff,
191 .num_resources = ARRAY_SIZE(pxamci_resources),
192 .resource = pxamci_resources,
195 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
197 pxa_device_mci.dev.platform_data = info;
201 static struct pxa2xx_udc_mach_info pxa_udc_info;
203 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
205 memcpy(&pxa_udc_info, info, sizeof *info);
208 static struct resource pxa2xx_udc_resources[] = {
209 [0] = {
210 .start = 0x40600000,
211 .end = 0x4060ffff,
212 .flags = IORESOURCE_MEM,
214 [1] = {
215 .start = IRQ_USB,
216 .end = IRQ_USB,
217 .flags = IORESOURCE_IRQ,
221 static u64 udc_dma_mask = ~(u32)0;
223 struct platform_device pxa_device_udc = {
224 .name = "pxa2xx-udc",
225 .id = -1,
226 .resource = pxa2xx_udc_resources,
227 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
228 .dev = {
229 .platform_data = &pxa_udc_info,
230 .dma_mask = &udc_dma_mask,
234 static struct resource pxafb_resources[] = {
235 [0] = {
236 .start = 0x44000000,
237 .end = 0x4400ffff,
238 .flags = IORESOURCE_MEM,
240 [1] = {
241 .start = IRQ_LCD,
242 .end = IRQ_LCD,
243 .flags = IORESOURCE_IRQ,
247 static u64 fb_dma_mask = ~(u64)0;
249 struct platform_device pxa_device_fb = {
250 .name = "pxa2xx-fb",
251 .id = -1,
252 .dev = {
253 .dma_mask = &fb_dma_mask,
254 .coherent_dma_mask = 0xffffffff,
256 .num_resources = ARRAY_SIZE(pxafb_resources),
257 .resource = pxafb_resources,
260 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
262 pxa_device_fb.dev.platform_data = info;
265 void __init set_pxa_fb_parent(struct device *parent_dev)
267 pxa_device_fb.dev.parent = parent_dev;
270 struct platform_device pxa_device_ffuart= {
271 .name = "pxa2xx-uart",
272 .id = 0,
274 struct platform_device pxa_device_btuart = {
275 .name = "pxa2xx-uart",
276 .id = 1,
278 struct platform_device pxa_device_stuart = {
279 .name = "pxa2xx-uart",
280 .id = 2,
282 struct platform_device pxa_device_hwuart = {
283 .name = "pxa2xx-uart",
284 .id = 3,
287 static struct resource pxai2c_resources[] = {
289 .start = 0x40301680,
290 .end = 0x403016a3,
291 .flags = IORESOURCE_MEM,
292 }, {
293 .start = IRQ_I2C,
294 .end = IRQ_I2C,
295 .flags = IORESOURCE_IRQ,
299 struct platform_device pxa_device_i2c = {
300 .name = "pxa2xx-i2c",
301 .id = 0,
302 .resource = pxai2c_resources,
303 .num_resources = ARRAY_SIZE(pxai2c_resources),
306 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
308 pxa_device_i2c.dev.platform_data = info;
311 static struct resource pxai2s_resources[] = {
313 .start = 0x40400000,
314 .end = 0x40400083,
315 .flags = IORESOURCE_MEM,
316 }, {
317 .start = IRQ_I2S,
318 .end = IRQ_I2S,
319 .flags = IORESOURCE_IRQ,
323 struct platform_device pxa_device_i2s = {
324 .name = "pxa2xx-i2s",
325 .id = -1,
326 .resource = pxai2s_resources,
327 .num_resources = ARRAY_SIZE(pxai2s_resources),
330 static u64 pxaficp_dmamask = ~(u32)0;
332 struct platform_device pxa_device_ficp = {
333 .name = "pxa2xx-ir",
334 .id = -1,
335 .dev = {
336 .dma_mask = &pxaficp_dmamask,
337 .coherent_dma_mask = 0xffffffff,
341 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
343 pxa_device_ficp.dev.platform_data = info;
346 struct platform_device pxa_device_rtc = {
347 .name = "sa1100-rtc",
348 .id = -1,