mac80211: make ieee80211_find_sta per virtual interface
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
blobe0b5b4aef41df6e4a67ada66297f0db0f00f51b5
1 /******************************************************************************
3 * GPL LICENSE SUMMARY
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
49 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
50 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
51 0, COEX_UNASSOC_IDLE_FLAGS},
52 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
53 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
54 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
55 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
56 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
57 0, COEX_CALIBRATION_FLAGS},
58 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
59 0, COEX_PERIODIC_CALIBRATION_FLAGS},
60 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
61 0, COEX_CONNECTION_ESTAB_FLAGS},
62 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
63 0, COEX_ASSOCIATED_IDLE_FLAGS},
64 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
65 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
66 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
67 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
68 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
69 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
70 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
71 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
72 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
73 0, COEX_STAND_ALONE_DEBUG_FLAGS},
74 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
75 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
76 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
77 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
80 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
81 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
82 IWL_RATE_SISO_##s##M_PLCP, \
83 IWL_RATE_MIMO2_##s##M_PLCP,\
84 IWL_RATE_MIMO3_##s##M_PLCP,\
85 IWL_RATE_##r##M_IEEE, \
86 IWL_RATE_##ip##M_INDEX, \
87 IWL_RATE_##in##M_INDEX, \
88 IWL_RATE_##rp##M_INDEX, \
89 IWL_RATE_##rn##M_INDEX, \
90 IWL_RATE_##pp##M_INDEX, \
91 IWL_RATE_##np##M_INDEX }
93 u32 iwl_debug_level;
94 EXPORT_SYMBOL(iwl_debug_level);
96 static irqreturn_t iwl_isr(int irq, void *data);
99 * Parameter order:
100 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
102 * If there isn't a valid next or previous rate then INV is used which
103 * maps to IWL_RATE_INVALID
106 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
107 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
108 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
109 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
110 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
111 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
112 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
113 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
114 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
115 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
116 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
117 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
118 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
119 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
120 /* FIXME:RS: ^^ should be INV (legacy) */
122 EXPORT_SYMBOL(iwl_rates);
125 * translate ucode response to mac80211 tx status control values
127 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
128 struct ieee80211_tx_info *info)
130 struct ieee80211_tx_rate *r = &info->control.rates[0];
132 info->antenna_sel_tx =
133 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
134 if (rate_n_flags & RATE_MCS_HT_MSK)
135 r->flags |= IEEE80211_TX_RC_MCS;
136 if (rate_n_flags & RATE_MCS_GF_MSK)
137 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
138 if (rate_n_flags & RATE_MCS_HT40_MSK)
139 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
140 if (rate_n_flags & RATE_MCS_DUP_MSK)
141 r->flags |= IEEE80211_TX_RC_DUP_DATA;
142 if (rate_n_flags & RATE_MCS_SGI_MSK)
143 r->flags |= IEEE80211_TX_RC_SHORT_GI;
144 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
146 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
148 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
150 int idx = 0;
152 /* HT rate format */
153 if (rate_n_flags & RATE_MCS_HT_MSK) {
154 idx = (rate_n_flags & 0xff);
156 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
157 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
158 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
159 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
161 idx += IWL_FIRST_OFDM_RATE;
162 /* skip 9M not supported in ht*/
163 if (idx >= IWL_RATE_9M_INDEX)
164 idx += 1;
165 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
166 return idx;
168 /* legacy rate format, search for match in table */
169 } else {
170 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
171 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
172 return idx;
175 return -1;
177 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
179 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
181 int idx = 0;
182 int band_offset = 0;
184 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
185 if (rate_n_flags & RATE_MCS_HT_MSK) {
186 idx = (rate_n_flags & 0xff);
187 return idx;
188 /* Legacy rate format, search for match in table */
189 } else {
190 if (band == IEEE80211_BAND_5GHZ)
191 band_offset = IWL_FIRST_OFDM_RATE;
192 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
193 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
194 return idx - band_offset;
197 return -1;
200 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
202 int i;
203 u8 ind = ant;
204 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
205 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
206 if (priv->hw_params.valid_tx_ant & BIT(ind))
207 return ind;
209 return ant;
212 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
213 EXPORT_SYMBOL(iwl_bcast_addr);
216 /* This function both allocates and initializes hw and priv. */
217 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
218 struct ieee80211_ops *hw_ops)
220 struct iwl_priv *priv;
222 /* mac80211 allocates memory for this device instance, including
223 * space for this driver's private structure */
224 struct ieee80211_hw *hw =
225 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
226 if (hw == NULL) {
227 printk(KERN_ERR "%s: Can not allocate network device\n",
228 cfg->name);
229 goto out;
232 priv = hw->priv;
233 priv->hw = hw;
235 out:
236 return hw;
238 EXPORT_SYMBOL(iwl_alloc_all);
240 void iwl_hw_detect(struct iwl_priv *priv)
242 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
243 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
244 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
246 EXPORT_SYMBOL(iwl_hw_detect);
248 int iwl_hw_nic_init(struct iwl_priv *priv)
250 unsigned long flags;
251 struct iwl_rx_queue *rxq = &priv->rxq;
252 int ret;
254 /* nic_init */
255 spin_lock_irqsave(&priv->lock, flags);
256 priv->cfg->ops->lib->apm_ops.init(priv);
257 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
258 spin_unlock_irqrestore(&priv->lock, flags);
260 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
262 priv->cfg->ops->lib->apm_ops.config(priv);
264 /* Allocate the RX queue, or reset if it is already allocated */
265 if (!rxq->bd) {
266 ret = iwl_rx_queue_alloc(priv);
267 if (ret) {
268 IWL_ERR(priv, "Unable to initialize Rx queue\n");
269 return -ENOMEM;
271 } else
272 iwl_rx_queue_reset(priv, rxq);
274 iwl_rx_replenish(priv);
276 iwl_rx_init(priv, rxq);
278 spin_lock_irqsave(&priv->lock, flags);
280 rxq->need_update = 1;
281 iwl_rx_queue_update_write_ptr(priv, rxq);
283 spin_unlock_irqrestore(&priv->lock, flags);
285 /* Allocate and init all Tx and Command queues */
286 ret = iwl_txq_ctx_reset(priv);
287 if (ret)
288 return ret;
290 set_bit(STATUS_INIT, &priv->status);
292 return 0;
294 EXPORT_SYMBOL(iwl_hw_nic_init);
297 * QoS support
299 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
301 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
302 return;
304 priv->qos_data.def_qos_parm.qos_flags = 0;
306 if (priv->qos_data.qos_cap.q_AP.queue_request &&
307 !priv->qos_data.qos_cap.q_AP.txop_request)
308 priv->qos_data.def_qos_parm.qos_flags |=
309 QOS_PARAM_FLG_TXOP_TYPE_MSK;
310 if (priv->qos_data.qos_active)
311 priv->qos_data.def_qos_parm.qos_flags |=
312 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
314 if (priv->current_ht_config.is_ht)
315 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
317 if (force || iwl_is_associated(priv)) {
318 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
319 priv->qos_data.qos_active,
320 priv->qos_data.def_qos_parm.qos_flags);
322 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
323 sizeof(struct iwl_qosparam_cmd),
324 &priv->qos_data.def_qos_parm, NULL);
327 EXPORT_SYMBOL(iwl_activate_qos);
330 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
331 * (802.11b) (802.11a/g)
332 * AC_BK 15 1023 7 0 0
333 * AC_BE 15 1023 3 0 0
334 * AC_VI 7 15 2 6.016ms 3.008ms
335 * AC_VO 3 7 2 3.264ms 1.504ms
337 void iwl_reset_qos(struct iwl_priv *priv)
339 u16 cw_min = 15;
340 u16 cw_max = 1023;
341 u8 aifs = 2;
342 bool is_legacy = false;
343 unsigned long flags;
344 int i;
346 spin_lock_irqsave(&priv->lock, flags);
347 /* QoS always active in AP and ADHOC mode
348 * In STA mode wait for association
350 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
351 priv->iw_mode == NL80211_IFTYPE_AP)
352 priv->qos_data.qos_active = 1;
353 else
354 priv->qos_data.qos_active = 0;
356 /* check for legacy mode */
357 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
358 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
359 (priv->iw_mode == NL80211_IFTYPE_STATION &&
360 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
361 cw_min = 31;
362 is_legacy = 1;
365 if (priv->qos_data.qos_active)
366 aifs = 3;
368 /* AC_BE */
369 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
370 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
371 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
372 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
373 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
375 if (priv->qos_data.qos_active) {
376 /* AC_BK */
377 i = 1;
378 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
379 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
380 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
381 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
382 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
384 /* AC_VI */
385 i = 2;
386 priv->qos_data.def_qos_parm.ac[i].cw_min =
387 cpu_to_le16((cw_min + 1) / 2 - 1);
388 priv->qos_data.def_qos_parm.ac[i].cw_max =
389 cpu_to_le16(cw_min);
390 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
391 if (is_legacy)
392 priv->qos_data.def_qos_parm.ac[i].edca_txop =
393 cpu_to_le16(6016);
394 else
395 priv->qos_data.def_qos_parm.ac[i].edca_txop =
396 cpu_to_le16(3008);
397 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
399 /* AC_VO */
400 i = 3;
401 priv->qos_data.def_qos_parm.ac[i].cw_min =
402 cpu_to_le16((cw_min + 1) / 4 - 1);
403 priv->qos_data.def_qos_parm.ac[i].cw_max =
404 cpu_to_le16((cw_min + 1) / 2 - 1);
405 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
406 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
407 if (is_legacy)
408 priv->qos_data.def_qos_parm.ac[i].edca_txop =
409 cpu_to_le16(3264);
410 else
411 priv->qos_data.def_qos_parm.ac[i].edca_txop =
412 cpu_to_le16(1504);
413 } else {
414 for (i = 1; i < 4; i++) {
415 priv->qos_data.def_qos_parm.ac[i].cw_min =
416 cpu_to_le16(cw_min);
417 priv->qos_data.def_qos_parm.ac[i].cw_max =
418 cpu_to_le16(cw_max);
419 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
420 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
421 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
424 IWL_DEBUG_QOS(priv, "set QoS to default \n");
426 spin_unlock_irqrestore(&priv->lock, flags);
428 EXPORT_SYMBOL(iwl_reset_qos);
430 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
431 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
432 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
433 struct ieee80211_sta_ht_cap *ht_info,
434 enum ieee80211_band band)
436 u16 max_bit_rate = 0;
437 u8 rx_chains_num = priv->hw_params.rx_chains_num;
438 u8 tx_chains_num = priv->hw_params.tx_chains_num;
440 ht_info->cap = 0;
441 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
443 ht_info->ht_supported = true;
445 if (priv->cfg->ht_greenfield_support)
446 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
447 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
448 if (priv->cfg->support_sm_ps)
449 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
450 (WLAN_HT_CAP_SM_PS_DYNAMIC << 2));
451 else
452 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
453 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
455 max_bit_rate = MAX_BIT_RATE_20_MHZ;
456 if (priv->hw_params.ht40_channel & BIT(band)) {
457 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
458 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
459 ht_info->mcs.rx_mask[4] = 0x01;
460 max_bit_rate = MAX_BIT_RATE_40_MHZ;
463 if (priv->cfg->mod_params->amsdu_size_8K)
464 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
466 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
467 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
469 ht_info->mcs.rx_mask[0] = 0xFF;
470 if (rx_chains_num >= 2)
471 ht_info->mcs.rx_mask[1] = 0xFF;
472 if (rx_chains_num >= 3)
473 ht_info->mcs.rx_mask[2] = 0xFF;
475 /* Highest supported Rx data rate */
476 max_bit_rate *= rx_chains_num;
477 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
478 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
480 /* Tx MCS capabilities */
481 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
482 if (tx_chains_num != rx_chains_num) {
483 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
484 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
485 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
490 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
492 int iwlcore_init_geos(struct iwl_priv *priv)
494 struct iwl_channel_info *ch;
495 struct ieee80211_supported_band *sband;
496 struct ieee80211_channel *channels;
497 struct ieee80211_channel *geo_ch;
498 struct ieee80211_rate *rates;
499 int i = 0;
501 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
502 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
503 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
504 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
505 return 0;
508 channels = kzalloc(sizeof(struct ieee80211_channel) *
509 priv->channel_count, GFP_KERNEL);
510 if (!channels)
511 return -ENOMEM;
513 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
514 GFP_KERNEL);
515 if (!rates) {
516 kfree(channels);
517 return -ENOMEM;
520 /* 5.2GHz channels start after the 2.4GHz channels */
521 sband = &priv->bands[IEEE80211_BAND_5GHZ];
522 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
523 /* just OFDM */
524 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
525 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
527 if (priv->cfg->sku & IWL_SKU_N)
528 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
529 IEEE80211_BAND_5GHZ);
531 sband = &priv->bands[IEEE80211_BAND_2GHZ];
532 sband->channels = channels;
533 /* OFDM & CCK */
534 sband->bitrates = rates;
535 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
537 if (priv->cfg->sku & IWL_SKU_N)
538 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
539 IEEE80211_BAND_2GHZ);
541 priv->ieee_channels = channels;
542 priv->ieee_rates = rates;
544 for (i = 0; i < priv->channel_count; i++) {
545 ch = &priv->channel_info[i];
547 /* FIXME: might be removed if scan is OK */
548 if (!is_channel_valid(ch))
549 continue;
551 if (is_channel_a_band(ch))
552 sband = &priv->bands[IEEE80211_BAND_5GHZ];
553 else
554 sband = &priv->bands[IEEE80211_BAND_2GHZ];
556 geo_ch = &sband->channels[sband->n_channels++];
558 geo_ch->center_freq =
559 ieee80211_channel_to_frequency(ch->channel);
560 geo_ch->max_power = ch->max_power_avg;
561 geo_ch->max_antenna_gain = 0xff;
562 geo_ch->hw_value = ch->channel;
564 if (is_channel_valid(ch)) {
565 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
566 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
568 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
569 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
571 if (ch->flags & EEPROM_CHANNEL_RADAR)
572 geo_ch->flags |= IEEE80211_CHAN_RADAR;
574 geo_ch->flags |= ch->ht40_extension_channel;
576 if (ch->max_power_avg > priv->tx_power_device_lmt)
577 priv->tx_power_device_lmt = ch->max_power_avg;
578 } else {
579 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
582 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
583 ch->channel, geo_ch->center_freq,
584 is_channel_a_band(ch) ? "5.2" : "2.4",
585 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
586 "restricted" : "valid",
587 geo_ch->flags);
590 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
591 priv->cfg->sku & IWL_SKU_A) {
592 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
593 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
594 priv->pci_dev->device,
595 priv->pci_dev->subsystem_device);
596 priv->cfg->sku &= ~IWL_SKU_A;
599 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
600 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
601 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
603 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
605 return 0;
607 EXPORT_SYMBOL(iwlcore_init_geos);
610 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
612 void iwlcore_free_geos(struct iwl_priv *priv)
614 kfree(priv->ieee_channels);
615 kfree(priv->ieee_rates);
616 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
618 EXPORT_SYMBOL(iwlcore_free_geos);
621 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
622 * function.
624 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
625 __le32 *tx_flags)
627 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
628 *tx_flags |= TX_CMD_FLG_RTS_MSK;
629 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
630 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
631 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
632 *tx_flags |= TX_CMD_FLG_CTS_MSK;
635 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
637 static bool is_single_rx_stream(struct iwl_priv *priv)
639 return !priv->current_ht_config.is_ht ||
640 priv->current_ht_config.single_chain_sufficient;
643 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
644 enum ieee80211_band band,
645 u16 channel, u8 extension_chan_offset)
647 const struct iwl_channel_info *ch_info;
649 ch_info = iwl_get_channel_info(priv, band, channel);
650 if (!is_channel_valid(ch_info))
651 return 0;
653 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
654 return !(ch_info->ht40_extension_channel &
655 IEEE80211_CHAN_NO_HT40PLUS);
656 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
657 return !(ch_info->ht40_extension_channel &
658 IEEE80211_CHAN_NO_HT40MINUS);
660 return 0;
663 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
664 struct ieee80211_sta_ht_cap *sta_ht_inf)
666 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
668 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
669 return 0;
671 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
672 * the bit will not set if it is pure 40MHz case
674 if (sta_ht_inf) {
675 if (!sta_ht_inf->ht_supported)
676 return 0;
678 #ifdef CONFIG_IWLWIFI_DEBUG
679 if (priv->disable_ht40)
680 return 0;
681 #endif
682 return iwl_is_channel_extension(priv, priv->band,
683 le16_to_cpu(priv->staging_rxon.channel),
684 ht_conf->extension_chan_offset);
686 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
688 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
690 u16 new_val = 0;
691 u16 beacon_factor = 0;
693 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
694 new_val = beacon_val / beacon_factor;
696 if (!new_val)
697 new_val = max_beacon_val;
699 return new_val;
702 void iwl_setup_rxon_timing(struct iwl_priv *priv)
704 u64 tsf;
705 s32 interval_tm, rem;
706 unsigned long flags;
707 struct ieee80211_conf *conf = NULL;
708 u16 beacon_int;
710 conf = ieee80211_get_hw_conf(priv->hw);
712 spin_lock_irqsave(&priv->lock, flags);
713 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
714 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
716 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
717 beacon_int = priv->beacon_int;
718 priv->rxon_timing.atim_window = 0;
719 } else {
720 beacon_int = priv->vif->bss_conf.beacon_int;
722 /* TODO: we need to get atim_window from upper stack
723 * for now we set to 0 */
724 priv->rxon_timing.atim_window = 0;
727 beacon_int = iwl_adjust_beacon_interval(beacon_int,
728 priv->hw_params.max_beacon_itrvl * 1024);
729 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
731 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
732 interval_tm = beacon_int * 1024;
733 rem = do_div(tsf, interval_tm);
734 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
736 spin_unlock_irqrestore(&priv->lock, flags);
737 IWL_DEBUG_ASSOC(priv,
738 "beacon interval %d beacon timer %d beacon tim %d\n",
739 le16_to_cpu(priv->rxon_timing.beacon_interval),
740 le32_to_cpu(priv->rxon_timing.beacon_init_val),
741 le16_to_cpu(priv->rxon_timing.atim_window));
743 EXPORT_SYMBOL(iwl_setup_rxon_timing);
745 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
747 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
749 if (hw_decrypt)
750 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
751 else
752 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
755 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
758 * iwl_check_rxon_cmd - validate RXON structure is valid
760 * NOTE: This is really only useful during development and can eventually
761 * be #ifdef'd out once the driver is stable and folks aren't actively
762 * making changes
764 int iwl_check_rxon_cmd(struct iwl_priv *priv)
766 int error = 0;
767 int counter = 1;
768 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
770 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
771 error |= le32_to_cpu(rxon->flags &
772 (RXON_FLG_TGJ_NARROW_BAND_MSK |
773 RXON_FLG_RADAR_DETECT_MSK));
774 if (error)
775 IWL_WARN(priv, "check 24G fields %d | %d\n",
776 counter++, error);
777 } else {
778 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
779 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
780 if (error)
781 IWL_WARN(priv, "check 52 fields %d | %d\n",
782 counter++, error);
783 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
784 if (error)
785 IWL_WARN(priv, "check 52 CCK %d | %d\n",
786 counter++, error);
788 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
789 if (error)
790 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
792 /* make sure basic rates 6Mbps and 1Mbps are supported */
793 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
794 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
795 if (error)
796 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
798 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
799 if (error)
800 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
802 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
803 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
804 if (error)
805 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
806 counter++, error);
808 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
809 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
810 if (error)
811 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
812 counter++, error);
814 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
815 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
816 if (error)
817 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
818 counter++, error);
820 if (error)
821 IWL_WARN(priv, "Tuning to channel %d\n",
822 le16_to_cpu(rxon->channel));
824 if (error) {
825 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
826 return -1;
828 return 0;
830 EXPORT_SYMBOL(iwl_check_rxon_cmd);
833 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
834 * @priv: staging_rxon is compared to active_rxon
836 * If the RXON structure is changing enough to require a new tune,
837 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
838 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
840 int iwl_full_rxon_required(struct iwl_priv *priv)
843 /* These items are only settable from the full RXON command */
844 if (!(iwl_is_associated(priv)) ||
845 compare_ether_addr(priv->staging_rxon.bssid_addr,
846 priv->active_rxon.bssid_addr) ||
847 compare_ether_addr(priv->staging_rxon.node_addr,
848 priv->active_rxon.node_addr) ||
849 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
850 priv->active_rxon.wlap_bssid_addr) ||
851 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
852 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
853 (priv->staging_rxon.air_propagation !=
854 priv->active_rxon.air_propagation) ||
855 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
856 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
857 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
858 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
859 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
860 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
861 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
862 return 1;
864 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
865 * be updated with the RXON_ASSOC command -- however only some
866 * flag transitions are allowed using RXON_ASSOC */
868 /* Check if we are not switching bands */
869 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
870 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
871 return 1;
873 /* Check if we are switching association toggle */
874 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
875 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
876 return 1;
878 return 0;
880 EXPORT_SYMBOL(iwl_full_rxon_required);
882 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
884 int i;
885 int rate_mask;
887 /* Set rate mask*/
888 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
889 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
890 else
891 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
893 /* Find lowest valid rate */
894 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
895 i = iwl_rates[i].next_ieee) {
896 if (rate_mask & (1 << i))
897 return iwl_rates[i].plcp;
900 /* No valid rate was found. Assign the lowest one */
901 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
902 return IWL_RATE_1M_PLCP;
903 else
904 return IWL_RATE_6M_PLCP;
906 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
908 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
910 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
912 if (!ht_conf->is_ht) {
913 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
914 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
915 RXON_FLG_HT40_PROT_MSK |
916 RXON_FLG_HT_PROT_MSK);
917 return;
920 /* FIXME: if the definition of ht_protection changed, the "translation"
921 * will be needed for rxon->flags
923 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
925 /* Set up channel bandwidth:
926 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
927 /* clear the HT channel mode before set the mode */
928 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
929 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
930 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
931 /* pure ht40 */
932 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
933 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
934 /* Note: control channel is opposite of extension channel */
935 switch (ht_conf->extension_chan_offset) {
936 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
937 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
938 break;
939 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
940 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
941 break;
943 } else {
944 /* Note: control channel is opposite of extension channel */
945 switch (ht_conf->extension_chan_offset) {
946 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
947 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
948 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
949 break;
950 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
951 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
952 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
953 break;
954 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
955 default:
956 /* channel location only valid if in Mixed mode */
957 IWL_ERR(priv, "invalid extension channel offset\n");
958 break;
961 } else {
962 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
965 if (priv->cfg->ops->hcmd->set_rxon_chain)
966 priv->cfg->ops->hcmd->set_rxon_chain(priv);
968 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
969 "extension channel offset 0x%x\n",
970 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
971 ht_conf->extension_chan_offset);
972 return;
974 EXPORT_SYMBOL(iwl_set_rxon_ht);
976 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
977 #define IWL_NUM_RX_CHAINS_SINGLE 2
978 #define IWL_NUM_IDLE_CHAINS_DUAL 2
979 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
982 * Determine how many receiver/antenna chains to use.
984 * More provides better reception via diversity. Fewer saves power
985 * at the expense of throughput, but only when not in powersave to
986 * start with.
988 * MIMO (dual stream) requires at least 2, but works better with 3.
989 * This does not determine *which* chains to use, just how many.
991 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
993 /* # of Rx chains to use when expecting MIMO. */
994 if (is_single_rx_stream(priv))
995 return IWL_NUM_RX_CHAINS_SINGLE;
996 else
997 return IWL_NUM_RX_CHAINS_MULTIPLE;
1001 * When we are in power saving mode, unless device support spatial
1002 * multiplexing power save, use the active count for rx chain count.
1004 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1006 int idle_cnt = active_cnt;
1007 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1009 if (priv->cfg->support_sm_ps) {
1010 /* # Rx chains when idling and maybe trying to save power */
1011 switch (priv->current_ht_config.sm_ps) {
1012 case WLAN_HT_CAP_SM_PS_STATIC:
1013 case WLAN_HT_CAP_SM_PS_DYNAMIC:
1014 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
1015 IWL_NUM_IDLE_CHAINS_SINGLE;
1016 break;
1017 case WLAN_HT_CAP_SM_PS_DISABLED:
1018 idle_cnt = (is_cam) ? active_cnt :
1019 IWL_NUM_IDLE_CHAINS_SINGLE;
1020 break;
1021 case WLAN_HT_CAP_SM_PS_INVALID:
1022 default:
1023 IWL_ERR(priv, "invalid sm_ps mode %d\n",
1024 priv->current_ht_config.sm_ps);
1025 WARN_ON(1);
1026 break;
1029 return idle_cnt;
1032 /* up to 4 chains */
1033 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1035 u8 res;
1036 res = (chain_bitmap & BIT(0)) >> 0;
1037 res += (chain_bitmap & BIT(1)) >> 1;
1038 res += (chain_bitmap & BIT(2)) >> 2;
1039 res += (chain_bitmap & BIT(3)) >> 3;
1040 return res;
1044 * iwl_is_monitor_mode - Determine if interface in monitor mode
1046 * priv->iw_mode is set in add_interface, but add_interface is
1047 * never called for monitor mode. The only way mac80211 informs us about
1048 * monitor mode is through configuring filters (call to configure_filter).
1050 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1052 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1054 EXPORT_SYMBOL(iwl_is_monitor_mode);
1057 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1059 * Selects how many and which Rx receivers/antennas/chains to use.
1060 * This should not be used for scan command ... it puts data in wrong place.
1062 void iwl_set_rxon_chain(struct iwl_priv *priv)
1064 bool is_single = is_single_rx_stream(priv);
1065 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1066 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1067 u32 active_chains;
1068 u16 rx_chain;
1070 /* Tell uCode which antennas are actually connected.
1071 * Before first association, we assume all antennas are connected.
1072 * Just after first association, iwl_chain_noise_calibration()
1073 * checks which antennas actually *are* connected. */
1074 if (priv->chain_noise_data.active_chains)
1075 active_chains = priv->chain_noise_data.active_chains;
1076 else
1077 active_chains = priv->hw_params.valid_rx_ant;
1079 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1081 /* How many receivers should we use? */
1082 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1083 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1086 /* correct rx chain count according hw settings
1087 * and chain noise calibration
1089 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1090 if (valid_rx_cnt < active_rx_cnt)
1091 active_rx_cnt = valid_rx_cnt;
1093 if (valid_rx_cnt < idle_rx_cnt)
1094 idle_rx_cnt = valid_rx_cnt;
1096 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1097 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1099 /* copied from 'iwl_bg_request_scan()' */
1100 /* Force use of chains B and C (0x6) for Rx for 4965
1101 * Avoid A (0x1) because of its off-channel reception on A-band.
1102 * MIMO is not used here, but value is required */
1103 if (iwl_is_monitor_mode(priv) &&
1104 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1105 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1106 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1107 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1108 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1109 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1112 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1114 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1115 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1116 else
1117 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1119 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1120 priv->staging_rxon.rx_chain,
1121 active_rx_cnt, idle_rx_cnt);
1123 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1124 active_rx_cnt < idle_rx_cnt);
1126 EXPORT_SYMBOL(iwl_set_rxon_chain);
1129 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1130 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1131 * @channel: Any channel valid for the requested phymode
1133 * In addition to setting the staging RXON, priv->phymode is also set.
1135 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1136 * in the staging RXON flag structure based on the phymode
1138 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1140 enum ieee80211_band band = ch->band;
1141 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1143 if (!iwl_get_channel_info(priv, band, channel)) {
1144 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1145 channel, band);
1146 return -EINVAL;
1149 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1150 (priv->band == band))
1151 return 0;
1153 priv->staging_rxon.channel = cpu_to_le16(channel);
1154 if (band == IEEE80211_BAND_5GHZ)
1155 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1156 else
1157 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1159 priv->band = band;
1161 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1163 return 0;
1165 EXPORT_SYMBOL(iwl_set_rxon_channel);
1167 void iwl_set_flags_for_band(struct iwl_priv *priv,
1168 enum ieee80211_band band)
1170 if (band == IEEE80211_BAND_5GHZ) {
1171 priv->staging_rxon.flags &=
1172 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1173 | RXON_FLG_CCK_MSK);
1174 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1175 } else {
1176 /* Copied from iwl_post_associate() */
1177 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1178 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1179 else
1180 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1182 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1183 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1185 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1186 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1187 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1192 * initialize rxon structure with default values from eeprom
1194 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1196 const struct iwl_channel_info *ch_info;
1198 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1200 switch (mode) {
1201 case NL80211_IFTYPE_AP:
1202 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1203 break;
1205 case NL80211_IFTYPE_STATION:
1206 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1207 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1208 break;
1210 case NL80211_IFTYPE_ADHOC:
1211 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1212 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1213 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1214 RXON_FILTER_ACCEPT_GRP_MSK;
1215 break;
1217 default:
1218 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1219 break;
1222 #if 0
1223 /* TODO: Figure out when short_preamble would be set and cache from
1224 * that */
1225 if (!hw_to_local(priv->hw)->short_preamble)
1226 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1227 else
1228 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1229 #endif
1231 ch_info = iwl_get_channel_info(priv, priv->band,
1232 le16_to_cpu(priv->active_rxon.channel));
1234 if (!ch_info)
1235 ch_info = &priv->channel_info[0];
1238 * in some case A channels are all non IBSS
1239 * in this case force B/G channel
1241 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1242 !(is_channel_ibss(ch_info)))
1243 ch_info = &priv->channel_info[0];
1245 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1246 priv->band = ch_info->band;
1248 iwl_set_flags_for_band(priv, priv->band);
1250 priv->staging_rxon.ofdm_basic_rates =
1251 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1252 priv->staging_rxon.cck_basic_rates =
1253 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1255 /* clear both MIX and PURE40 mode flag */
1256 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1257 RXON_FLG_CHANNEL_MODE_PURE_40);
1258 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1259 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1260 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1261 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1262 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1264 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1266 static void iwl_set_rate(struct iwl_priv *priv)
1268 const struct ieee80211_supported_band *hw = NULL;
1269 struct ieee80211_rate *rate;
1270 int i;
1272 hw = iwl_get_hw_mode(priv, priv->band);
1273 if (!hw) {
1274 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1275 return;
1278 priv->active_rate = 0;
1279 priv->active_rate_basic = 0;
1281 for (i = 0; i < hw->n_bitrates; i++) {
1282 rate = &(hw->bitrates[i]);
1283 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1284 priv->active_rate |= (1 << rate->hw_value);
1287 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1288 priv->active_rate, priv->active_rate_basic);
1291 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1292 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1293 * OFDM
1295 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1296 priv->staging_rxon.cck_basic_rates =
1297 ((priv->active_rate_basic &
1298 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1299 else
1300 priv->staging_rxon.cck_basic_rates =
1301 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1303 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1304 priv->staging_rxon.ofdm_basic_rates =
1305 ((priv->active_rate_basic &
1306 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1307 IWL_FIRST_OFDM_RATE) & 0xFF;
1308 else
1309 priv->staging_rxon.ofdm_basic_rates =
1310 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1313 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1315 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1316 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1317 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1319 if (!le32_to_cpu(csa->status)) {
1320 rxon->channel = csa->channel;
1321 priv->staging_rxon.channel = csa->channel;
1322 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1323 le16_to_cpu(csa->channel));
1324 } else
1325 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1326 le16_to_cpu(csa->channel));
1328 EXPORT_SYMBOL(iwl_rx_csa);
1330 #ifdef CONFIG_IWLWIFI_DEBUG
1331 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1333 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1335 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1336 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1337 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1338 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1339 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1340 le32_to_cpu(rxon->filter_flags));
1341 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1342 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1343 rxon->ofdm_basic_rates);
1344 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1345 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1346 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1347 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1349 #endif
1351 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1353 void iwl_irq_handle_error(struct iwl_priv *priv)
1355 /* Set the FW error flag -- cleared on iwl_down */
1356 set_bit(STATUS_FW_ERROR, &priv->status);
1358 /* Cancel currently queued command. */
1359 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1361 #ifdef CONFIG_IWLWIFI_DEBUG
1362 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
1363 priv->cfg->ops->lib->dump_nic_error_log(priv);
1364 priv->cfg->ops->lib->dump_nic_event_log(priv);
1365 iwl_print_rx_config_cmd(priv);
1367 #endif
1369 wake_up_interruptible(&priv->wait_command_queue);
1371 /* Keep the restart process from trying to send host
1372 * commands by clearing the INIT status bit */
1373 clear_bit(STATUS_READY, &priv->status);
1375 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1376 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1377 "Restarting adapter due to uCode error.\n");
1379 if (priv->cfg->mod_params->restart_fw)
1380 queue_work(priv->workqueue, &priv->restart);
1383 EXPORT_SYMBOL(iwl_irq_handle_error);
1385 int iwl_apm_stop_master(struct iwl_priv *priv)
1387 int ret = 0;
1389 /* stop device's busmaster DMA activity */
1390 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1392 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1393 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1394 if (ret)
1395 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1397 IWL_DEBUG_INFO(priv, "stop master\n");
1399 return ret;
1401 EXPORT_SYMBOL(iwl_apm_stop_master);
1403 void iwl_apm_stop(struct iwl_priv *priv)
1405 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1407 /* Stop device's DMA activity */
1408 iwl_apm_stop_master(priv);
1410 /* Reset the entire device */
1411 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1413 udelay(10);
1416 * Clear "initialization complete" bit to move adapter from
1417 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1419 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1421 EXPORT_SYMBOL(iwl_apm_stop);
1425 * Start up NIC's basic functionality after it has been reset
1426 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1427 * NOTE: This does not load uCode nor start the embedded processor
1429 int iwl_apm_init(struct iwl_priv *priv)
1431 int ret = 0;
1432 u16 lctl;
1434 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1437 * Use "set_bit" below rather than "write", to preserve any hardware
1438 * bits already set by default after reset.
1441 /* Disable L0S exit timer (platform NMI Work/Around) */
1442 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1443 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1446 * Disable L0s without affecting L1;
1447 * don't wait for ICH L0s (ICH bug W/A)
1449 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1450 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1452 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1453 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1456 * Enable HAP INTA (interrupt from management bus) to
1457 * wake device's PCI Express link L1a -> L0s
1458 * NOTE: This is no-op for 3945 (non-existant bit)
1460 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1461 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1464 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1465 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1466 * If so (likely), disable L0S, so device moves directly L0->L1;
1467 * costs negligible amount of power savings.
1468 * If not (unlikely), enable L0S, so there is at least some
1469 * power savings, even without L1.
1471 if (priv->cfg->set_l0s) {
1472 lctl = iwl_pcie_link_ctl(priv);
1473 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1474 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1475 /* L1-ASPM enabled; disable(!) L0S */
1476 iwl_set_bit(priv, CSR_GIO_REG,
1477 CSR_GIO_REG_VAL_L0S_ENABLED);
1478 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1479 } else {
1480 /* L1-ASPM disabled; enable(!) L0S */
1481 iwl_clear_bit(priv, CSR_GIO_REG,
1482 CSR_GIO_REG_VAL_L0S_ENABLED);
1483 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1487 /* Configure analog phase-lock-loop before activating to D0A */
1488 if (priv->cfg->pll_cfg_val)
1489 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1492 * Set "initialization complete" bit to move adapter from
1493 * D0U* --> D0A* (powered-up active) state.
1495 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1498 * Wait for clock stabilization; once stabilized, access to
1499 * device-internal resources is supported, e.g. iwl_write_prph()
1500 * and accesses to uCode SRAM.
1502 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1503 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1504 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1505 if (ret < 0) {
1506 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1507 goto out;
1511 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1512 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1513 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1514 * and don't need BSM to restore data after power-saving sleep.
1516 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1517 * do not disable clocks. This preserves any hardware bits already
1518 * set by default in "CLK_CTRL_REG" after reset.
1520 if (priv->cfg->use_bsm)
1521 iwl_write_prph(priv, APMG_CLK_EN_REG,
1522 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1523 else
1524 iwl_write_prph(priv, APMG_CLK_EN_REG,
1525 APMG_CLK_VAL_DMA_CLK_RQT);
1526 udelay(20);
1528 /* Disable L1-Active */
1529 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1530 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1532 out:
1533 return ret;
1535 EXPORT_SYMBOL(iwl_apm_init);
1539 void iwl_configure_filter(struct ieee80211_hw *hw,
1540 unsigned int changed_flags,
1541 unsigned int *total_flags,
1542 u64 multicast)
1544 struct iwl_priv *priv = hw->priv;
1545 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1547 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1548 changed_flags, *total_flags);
1550 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1551 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1552 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1553 else
1554 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1556 if (changed_flags & FIF_ALLMULTI) {
1557 if (*total_flags & FIF_ALLMULTI)
1558 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1559 else
1560 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1562 if (changed_flags & FIF_CONTROL) {
1563 if (*total_flags & FIF_CONTROL)
1564 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1565 else
1566 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1568 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1569 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1570 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1571 else
1572 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1575 /* We avoid iwl_commit_rxon here to commit the new filter flags
1576 * since mac80211 will call ieee80211_hw_config immediately.
1577 * (mc_list is not supported at this time). Otherwise, we need to
1578 * queue a background iwl_commit_rxon work.
1581 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1582 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1584 EXPORT_SYMBOL(iwl_configure_filter);
1586 int iwl_set_hw_params(struct iwl_priv *priv)
1588 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1589 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1590 if (priv->cfg->mod_params->amsdu_size_8K)
1591 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1592 else
1593 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1595 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1597 if (priv->cfg->mod_params->disable_11n)
1598 priv->cfg->sku &= ~IWL_SKU_N;
1600 /* Device-specific setup */
1601 return priv->cfg->ops->lib->set_hw_params(priv);
1603 EXPORT_SYMBOL(iwl_set_hw_params);
1605 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1607 int ret = 0;
1608 s8 prev_tx_power = priv->tx_power_user_lmt;
1610 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1611 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1612 tx_power,
1613 IWL_TX_POWER_TARGET_POWER_MIN);
1614 return -EINVAL;
1617 if (tx_power > priv->tx_power_device_lmt) {
1618 IWL_WARN(priv,
1619 "Requested user TXPOWER %d above upper limit %d.\n",
1620 tx_power, priv->tx_power_device_lmt);
1621 return -EINVAL;
1624 if (priv->tx_power_user_lmt != tx_power)
1625 force = true;
1627 /* if nic is not up don't send command */
1628 if (iwl_is_ready_rf(priv)) {
1629 priv->tx_power_user_lmt = tx_power;
1630 if (force && priv->cfg->ops->lib->send_tx_power)
1631 ret = priv->cfg->ops->lib->send_tx_power(priv);
1632 else if (!priv->cfg->ops->lib->send_tx_power)
1633 ret = -EOPNOTSUPP;
1635 * if fail to set tx_power, restore the orig. tx power
1637 if (ret)
1638 priv->tx_power_user_lmt = prev_tx_power;
1642 * Even this is an async host command, the command
1643 * will always report success from uCode
1644 * So once driver can placing the command into the queue
1645 * successfully, driver can use priv->tx_power_user_lmt
1646 * to reflect the current tx power
1648 return ret;
1650 EXPORT_SYMBOL(iwl_set_tx_power);
1652 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1654 /* Free dram table */
1655 void iwl_free_isr_ict(struct iwl_priv *priv)
1657 if (priv->ict_tbl_vir) {
1658 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1659 PAGE_SIZE, priv->ict_tbl_vir,
1660 priv->ict_tbl_dma);
1661 priv->ict_tbl_vir = NULL;
1664 EXPORT_SYMBOL(iwl_free_isr_ict);
1667 /* allocate dram shared table it is a PAGE_SIZE aligned
1668 * also reset all data related to ICT table interrupt.
1670 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1673 if (priv->cfg->use_isr_legacy)
1674 return 0;
1675 /* allocate shrared data table */
1676 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1677 ICT_COUNT) + PAGE_SIZE,
1678 &priv->ict_tbl_dma);
1679 if (!priv->ict_tbl_vir)
1680 return -ENOMEM;
1682 /* align table to PAGE_SIZE boundry */
1683 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1685 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1686 (unsigned long long)priv->ict_tbl_dma,
1687 (unsigned long long)priv->aligned_ict_tbl_dma,
1688 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1690 priv->ict_tbl = priv->ict_tbl_vir +
1691 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1693 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1694 priv->ict_tbl, priv->ict_tbl_vir,
1695 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1697 /* reset table and index to all 0 */
1698 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1699 priv->ict_index = 0;
1701 /* add periodic RX interrupt */
1702 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1703 return 0;
1705 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1707 /* Device is going up inform it about using ICT interrupt table,
1708 * also we need to tell the driver to start using ICT interrupt.
1710 int iwl_reset_ict(struct iwl_priv *priv)
1712 u32 val;
1713 unsigned long flags;
1715 if (!priv->ict_tbl_vir)
1716 return 0;
1718 spin_lock_irqsave(&priv->lock, flags);
1719 iwl_disable_interrupts(priv);
1721 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1723 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1725 val |= CSR_DRAM_INT_TBL_ENABLE;
1726 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1728 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1729 "aligned dma address %Lx\n",
1730 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1732 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1733 priv->use_ict = true;
1734 priv->ict_index = 0;
1735 iwl_write32(priv, CSR_INT, priv->inta_mask);
1736 iwl_enable_interrupts(priv);
1737 spin_unlock_irqrestore(&priv->lock, flags);
1739 return 0;
1741 EXPORT_SYMBOL(iwl_reset_ict);
1743 /* Device is going down disable ict interrupt usage */
1744 void iwl_disable_ict(struct iwl_priv *priv)
1746 unsigned long flags;
1748 spin_lock_irqsave(&priv->lock, flags);
1749 priv->use_ict = false;
1750 spin_unlock_irqrestore(&priv->lock, flags);
1752 EXPORT_SYMBOL(iwl_disable_ict);
1754 /* interrupt handler using ict table, with this interrupt driver will
1755 * stop using INTA register to get device's interrupt, reading this register
1756 * is expensive, device will write interrupts in ICT dram table, increment
1757 * index then will fire interrupt to driver, driver will OR all ICT table
1758 * entries from current index up to table entry with 0 value. the result is
1759 * the interrupt we need to service, driver will set the entries back to 0 and
1760 * set index.
1762 irqreturn_t iwl_isr_ict(int irq, void *data)
1764 struct iwl_priv *priv = data;
1765 u32 inta, inta_mask;
1766 u32 val = 0;
1768 if (!priv)
1769 return IRQ_NONE;
1771 /* dram interrupt table not set yet,
1772 * use legacy interrupt.
1774 if (!priv->use_ict)
1775 return iwl_isr(irq, data);
1777 spin_lock(&priv->lock);
1779 /* Disable (but don't clear!) interrupts here to avoid
1780 * back-to-back ISRs and sporadic interrupts from our NIC.
1781 * If we have something to service, the tasklet will re-enable ints.
1782 * If we *don't* have something, we'll re-enable before leaving here.
1784 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1785 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1788 /* Ignore interrupt if there's nothing in NIC to service.
1789 * This may be due to IRQ shared with another device,
1790 * or due to sporadic interrupts thrown from our NIC. */
1791 if (!priv->ict_tbl[priv->ict_index]) {
1792 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1793 goto none;
1796 /* read all entries that not 0 start with ict_index */
1797 while (priv->ict_tbl[priv->ict_index]) {
1799 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1800 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1801 priv->ict_index,
1802 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1803 priv->ict_tbl[priv->ict_index] = 0;
1804 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1805 ICT_COUNT);
1809 /* We should not get this value, just ignore it. */
1810 if (val == 0xffffffff)
1811 val = 0;
1813 inta = (0xff & val) | ((0xff00 & val) << 16);
1814 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1815 inta, inta_mask, val);
1817 inta &= priv->inta_mask;
1818 priv->inta |= inta;
1820 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1821 if (likely(inta))
1822 tasklet_schedule(&priv->irq_tasklet);
1823 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1824 /* Allow interrupt if was disabled by this handler and
1825 * no tasklet was schedules, We should not enable interrupt,
1826 * tasklet will enable it.
1828 iwl_enable_interrupts(priv);
1831 spin_unlock(&priv->lock);
1832 return IRQ_HANDLED;
1834 none:
1835 /* re-enable interrupts here since we don't have anything to service.
1836 * only Re-enable if disabled by irq.
1838 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1839 iwl_enable_interrupts(priv);
1841 spin_unlock(&priv->lock);
1842 return IRQ_NONE;
1844 EXPORT_SYMBOL(iwl_isr_ict);
1847 static irqreturn_t iwl_isr(int irq, void *data)
1849 struct iwl_priv *priv = data;
1850 u32 inta, inta_mask;
1851 #ifdef CONFIG_IWLWIFI_DEBUG
1852 u32 inta_fh;
1853 #endif
1854 if (!priv)
1855 return IRQ_NONE;
1857 spin_lock(&priv->lock);
1859 /* Disable (but don't clear!) interrupts here to avoid
1860 * back-to-back ISRs and sporadic interrupts from our NIC.
1861 * If we have something to service, the tasklet will re-enable ints.
1862 * If we *don't* have something, we'll re-enable before leaving here. */
1863 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1864 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1866 /* Discover which interrupts are active/pending */
1867 inta = iwl_read32(priv, CSR_INT);
1869 /* Ignore interrupt if there's nothing in NIC to service.
1870 * This may be due to IRQ shared with another device,
1871 * or due to sporadic interrupts thrown from our NIC. */
1872 if (!inta) {
1873 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1874 goto none;
1877 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1878 /* Hardware disappeared. It might have already raised
1879 * an interrupt */
1880 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1881 goto unplugged;
1884 #ifdef CONFIG_IWLWIFI_DEBUG
1885 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1886 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1887 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1888 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1890 #endif
1892 priv->inta |= inta;
1893 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1894 if (likely(inta))
1895 tasklet_schedule(&priv->irq_tasklet);
1896 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1897 iwl_enable_interrupts(priv);
1899 unplugged:
1900 spin_unlock(&priv->lock);
1901 return IRQ_HANDLED;
1903 none:
1904 /* re-enable interrupts here since we don't have anything to service. */
1905 /* only Re-enable if diabled by irq and no schedules tasklet. */
1906 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1907 iwl_enable_interrupts(priv);
1909 spin_unlock(&priv->lock);
1910 return IRQ_NONE;
1913 irqreturn_t iwl_isr_legacy(int irq, void *data)
1915 struct iwl_priv *priv = data;
1916 u32 inta, inta_mask;
1917 u32 inta_fh;
1918 if (!priv)
1919 return IRQ_NONE;
1921 spin_lock(&priv->lock);
1923 /* Disable (but don't clear!) interrupts here to avoid
1924 * back-to-back ISRs and sporadic interrupts from our NIC.
1925 * If we have something to service, the tasklet will re-enable ints.
1926 * If we *don't* have something, we'll re-enable before leaving here. */
1927 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1928 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1930 /* Discover which interrupts are active/pending */
1931 inta = iwl_read32(priv, CSR_INT);
1932 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1934 /* Ignore interrupt if there's nothing in NIC to service.
1935 * This may be due to IRQ shared with another device,
1936 * or due to sporadic interrupts thrown from our NIC. */
1937 if (!inta && !inta_fh) {
1938 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1939 goto none;
1942 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1943 /* Hardware disappeared. It might have already raised
1944 * an interrupt */
1945 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1946 goto unplugged;
1949 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1950 inta, inta_mask, inta_fh);
1952 inta &= ~CSR_INT_BIT_SCD;
1954 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1955 if (likely(inta || inta_fh))
1956 tasklet_schedule(&priv->irq_tasklet);
1958 unplugged:
1959 spin_unlock(&priv->lock);
1960 return IRQ_HANDLED;
1962 none:
1963 /* re-enable interrupts here since we don't have anything to service. */
1964 /* only Re-enable if diabled by irq */
1965 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1966 iwl_enable_interrupts(priv);
1967 spin_unlock(&priv->lock);
1968 return IRQ_NONE;
1970 EXPORT_SYMBOL(iwl_isr_legacy);
1972 int iwl_send_bt_config(struct iwl_priv *priv)
1974 struct iwl_bt_cmd bt_cmd = {
1975 .flags = BT_COEX_MODE_4W,
1976 .lead_time = BT_LEAD_TIME_DEF,
1977 .max_kill = BT_MAX_KILL_DEF,
1978 .kill_ack_mask = 0,
1979 .kill_cts_mask = 0,
1982 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1983 sizeof(struct iwl_bt_cmd), &bt_cmd);
1985 EXPORT_SYMBOL(iwl_send_bt_config);
1987 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1989 u32 stat_flags = 0;
1990 struct iwl_host_cmd cmd = {
1991 .id = REPLY_STATISTICS_CMD,
1992 .flags = flags,
1993 .len = sizeof(stat_flags),
1994 .data = (u8 *) &stat_flags,
1996 return iwl_send_cmd(priv, &cmd);
1998 EXPORT_SYMBOL(iwl_send_statistics_request);
2001 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2002 * using sample data 100 bytes apart. If these sample points are good,
2003 * it's a pretty good bet that everything between them is good, too.
2005 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2007 u32 val;
2008 int ret = 0;
2009 u32 errcnt = 0;
2010 u32 i;
2012 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2014 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2015 /* read data comes through single port, auto-incr addr */
2016 /* NOTE: Use the debugless read so we don't flood kernel log
2017 * if IWL_DL_IO is set */
2018 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2019 i + IWL49_RTC_INST_LOWER_BOUND);
2020 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2021 if (val != le32_to_cpu(*image)) {
2022 ret = -EIO;
2023 errcnt++;
2024 if (errcnt >= 3)
2025 break;
2029 return ret;
2033 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2034 * looking at all data.
2036 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2037 u32 len)
2039 u32 val;
2040 u32 save_len = len;
2041 int ret = 0;
2042 u32 errcnt;
2044 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2046 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2047 IWL49_RTC_INST_LOWER_BOUND);
2049 errcnt = 0;
2050 for (; len > 0; len -= sizeof(u32), image++) {
2051 /* read data comes through single port, auto-incr addr */
2052 /* NOTE: Use the debugless read so we don't flood kernel log
2053 * if IWL_DL_IO is set */
2054 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2055 if (val != le32_to_cpu(*image)) {
2056 IWL_ERR(priv, "uCode INST section is invalid at "
2057 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2058 save_len - len, val, le32_to_cpu(*image));
2059 ret = -EIO;
2060 errcnt++;
2061 if (errcnt >= 20)
2062 break;
2066 if (!errcnt)
2067 IWL_DEBUG_INFO(priv,
2068 "ucode image in INSTRUCTION memory is good\n");
2070 return ret;
2074 * iwl_verify_ucode - determine which instruction image is in SRAM,
2075 * and verify its contents
2077 int iwl_verify_ucode(struct iwl_priv *priv)
2079 __le32 *image;
2080 u32 len;
2081 int ret;
2083 /* Try bootstrap */
2084 image = (__le32 *)priv->ucode_boot.v_addr;
2085 len = priv->ucode_boot.len;
2086 ret = iwlcore_verify_inst_sparse(priv, image, len);
2087 if (!ret) {
2088 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2089 return 0;
2092 /* Try initialize */
2093 image = (__le32 *)priv->ucode_init.v_addr;
2094 len = priv->ucode_init.len;
2095 ret = iwlcore_verify_inst_sparse(priv, image, len);
2096 if (!ret) {
2097 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2098 return 0;
2101 /* Try runtime/protocol */
2102 image = (__le32 *)priv->ucode_code.v_addr;
2103 len = priv->ucode_code.len;
2104 ret = iwlcore_verify_inst_sparse(priv, image, len);
2105 if (!ret) {
2106 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2107 return 0;
2110 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2112 /* Since nothing seems to match, show first several data entries in
2113 * instruction SRAM, so maybe visual inspection will give a clue.
2114 * Selection of bootstrap image (vs. other images) is arbitrary. */
2115 image = (__le32 *)priv->ucode_boot.v_addr;
2116 len = priv->ucode_boot.len;
2117 ret = iwl_verify_inst_full(priv, image, len);
2119 return ret;
2121 EXPORT_SYMBOL(iwl_verify_ucode);
2124 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2126 struct iwl_ct_kill_config cmd;
2127 struct iwl_ct_kill_throttling_config adv_cmd;
2128 unsigned long flags;
2129 int ret = 0;
2131 spin_lock_irqsave(&priv->lock, flags);
2132 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2133 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2134 spin_unlock_irqrestore(&priv->lock, flags);
2135 priv->thermal_throttle.ct_kill_toggle = false;
2137 if (priv->cfg->support_ct_kill_exit) {
2138 adv_cmd.critical_temperature_enter =
2139 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2140 adv_cmd.critical_temperature_exit =
2141 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2143 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2144 sizeof(adv_cmd), &adv_cmd);
2145 if (ret)
2146 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2147 else
2148 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2149 "succeeded, "
2150 "critical temperature enter is %d,"
2151 "exit is %d\n",
2152 priv->hw_params.ct_kill_threshold,
2153 priv->hw_params.ct_kill_exit_threshold);
2154 } else {
2155 cmd.critical_temperature_R =
2156 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2158 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2159 sizeof(cmd), &cmd);
2160 if (ret)
2161 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2162 else
2163 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2164 "succeeded, "
2165 "critical temperature is %d\n",
2166 priv->hw_params.ct_kill_threshold);
2169 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2173 * CARD_STATE_CMD
2175 * Use: Sets the device's internal card state to enable, disable, or halt
2177 * When in the 'enable' state the card operates as normal.
2178 * When in the 'disable' state, the card enters into a low power mode.
2179 * When in the 'halt' state, the card is shut down and must be fully
2180 * restarted to come back on.
2182 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2184 struct iwl_host_cmd cmd = {
2185 .id = REPLY_CARD_STATE_CMD,
2186 .len = sizeof(u32),
2187 .data = &flags,
2188 .flags = meta_flag,
2191 return iwl_send_cmd(priv, &cmd);
2194 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2195 struct iwl_rx_mem_buffer *rxb)
2197 #ifdef CONFIG_IWLWIFI_DEBUG
2198 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2199 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2200 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2201 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2202 #endif
2204 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2206 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2207 struct iwl_rx_mem_buffer *rxb)
2209 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2210 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2211 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2212 "notification for %s:\n", len,
2213 get_cmd_string(pkt->hdr.cmd));
2214 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2216 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2218 void iwl_rx_reply_error(struct iwl_priv *priv,
2219 struct iwl_rx_mem_buffer *rxb)
2221 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2223 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2224 "seq 0x%04X ser 0x%08X\n",
2225 le32_to_cpu(pkt->u.err_resp.error_type),
2226 get_cmd_string(pkt->u.err_resp.cmd_id),
2227 pkt->u.err_resp.cmd_id,
2228 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2229 le32_to_cpu(pkt->u.err_resp.error_info));
2231 EXPORT_SYMBOL(iwl_rx_reply_error);
2233 void iwl_clear_isr_stats(struct iwl_priv *priv)
2235 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2238 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2239 const struct ieee80211_tx_queue_params *params)
2241 struct iwl_priv *priv = hw->priv;
2242 unsigned long flags;
2243 int q;
2245 IWL_DEBUG_MAC80211(priv, "enter\n");
2247 if (!iwl_is_ready_rf(priv)) {
2248 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2249 return -EIO;
2252 if (queue >= AC_NUM) {
2253 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2254 return 0;
2257 q = AC_NUM - 1 - queue;
2259 spin_lock_irqsave(&priv->lock, flags);
2261 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2262 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2263 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2264 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2265 cpu_to_le16((params->txop * 32));
2267 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2268 priv->qos_data.qos_active = 1;
2270 if (priv->iw_mode == NL80211_IFTYPE_AP)
2271 iwl_activate_qos(priv, 1);
2272 else if (priv->assoc_id && iwl_is_associated(priv))
2273 iwl_activate_qos(priv, 0);
2275 spin_unlock_irqrestore(&priv->lock, flags);
2277 IWL_DEBUG_MAC80211(priv, "leave\n");
2278 return 0;
2280 EXPORT_SYMBOL(iwl_mac_conf_tx);
2282 static void iwl_ht_conf(struct iwl_priv *priv,
2283 struct ieee80211_bss_conf *bss_conf)
2285 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2286 struct ieee80211_sta *sta;
2288 IWL_DEBUG_MAC80211(priv, "enter: \n");
2290 if (!ht_conf->is_ht)
2291 return;
2293 ht_conf->ht_protection =
2294 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2295 ht_conf->non_GF_STA_present =
2296 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2298 ht_conf->single_chain_sufficient = false;
2300 switch (priv->iw_mode) {
2301 case NL80211_IFTYPE_STATION:
2302 rcu_read_lock();
2303 sta = ieee80211_find_sta(priv->vif, priv->bssid);
2304 if (sta) {
2305 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2306 int maxstreams;
2308 maxstreams = (ht_cap->mcs.tx_params &
2309 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2310 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2311 maxstreams += 1;
2313 ht_conf->sm_ps =
2314 (u8)((ht_cap->cap & IEEE80211_HT_CAP_SM_PS)
2315 >> 2);
2316 IWL_DEBUG_MAC80211(priv, "sm_ps: 0x%x\n",
2317 ht_conf->sm_ps);
2319 if ((ht_cap->mcs.rx_mask[1] == 0) &&
2320 (ht_cap->mcs.rx_mask[2] == 0))
2321 ht_conf->single_chain_sufficient = true;
2322 if (maxstreams <= 1)
2323 ht_conf->single_chain_sufficient = true;
2324 } else {
2326 * If at all, this can only happen through a race
2327 * when the AP disconnects us while we're still
2328 * setting up the connection, in that case mac80211
2329 * will soon tell us about that.
2331 ht_conf->single_chain_sufficient = true;
2333 rcu_read_unlock();
2334 break;
2335 case NL80211_IFTYPE_ADHOC:
2336 ht_conf->single_chain_sufficient = true;
2337 break;
2338 default:
2339 break;
2342 IWL_DEBUG_MAC80211(priv, "leave\n");
2345 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2346 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2347 struct ieee80211_vif *vif,
2348 struct ieee80211_bss_conf *bss_conf,
2349 u32 changes)
2351 struct iwl_priv *priv = hw->priv;
2352 int ret;
2354 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2356 if (!iwl_is_alive(priv))
2357 return;
2359 mutex_lock(&priv->mutex);
2361 if (changes & BSS_CHANGED_BEACON &&
2362 priv->iw_mode == NL80211_IFTYPE_AP) {
2363 dev_kfree_skb(priv->ibss_beacon);
2364 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2367 if (changes & BSS_CHANGED_BEACON_INT) {
2368 priv->beacon_int = bss_conf->beacon_int;
2369 /* TODO: in AP mode, do something to make this take effect */
2372 if (changes & BSS_CHANGED_BSSID) {
2373 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2376 * If there is currently a HW scan going on in the
2377 * background then we need to cancel it else the RXON
2378 * below/in post_associate will fail.
2380 if (iwl_scan_cancel_timeout(priv, 100)) {
2381 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2382 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2383 mutex_unlock(&priv->mutex);
2384 return;
2387 /* mac80211 only sets assoc when in STATION mode */
2388 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2389 bss_conf->assoc) {
2390 memcpy(priv->staging_rxon.bssid_addr,
2391 bss_conf->bssid, ETH_ALEN);
2393 /* currently needed in a few places */
2394 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2395 } else {
2396 priv->staging_rxon.filter_flags &=
2397 ~RXON_FILTER_ASSOC_MSK;
2403 * This needs to be after setting the BSSID in case
2404 * mac80211 decides to do both changes at once because
2405 * it will invoke post_associate.
2407 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2408 changes & BSS_CHANGED_BEACON) {
2409 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2411 if (beacon)
2412 iwl_mac_beacon_update(hw, beacon);
2415 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2416 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2417 bss_conf->use_short_preamble);
2418 if (bss_conf->use_short_preamble)
2419 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2420 else
2421 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2424 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2425 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2426 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2427 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2428 else
2429 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2432 if (changes & BSS_CHANGED_BASIC_RATES) {
2433 /* XXX use this information
2435 * To do that, remove code from iwl_set_rate() and put something
2436 * like this here:
2438 if (A-band)
2439 priv->staging_rxon.ofdm_basic_rates =
2440 bss_conf->basic_rates;
2441 else
2442 priv->staging_rxon.ofdm_basic_rates =
2443 bss_conf->basic_rates >> 4;
2444 priv->staging_rxon.cck_basic_rates =
2445 bss_conf->basic_rates & 0xF;
2449 if (changes & BSS_CHANGED_HT) {
2450 iwl_ht_conf(priv, bss_conf);
2452 if (priv->cfg->ops->hcmd->set_rxon_chain)
2453 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2456 if (changes & BSS_CHANGED_ASSOC) {
2457 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2458 if (bss_conf->assoc) {
2459 priv->assoc_id = bss_conf->aid;
2460 priv->beacon_int = bss_conf->beacon_int;
2461 priv->timestamp = bss_conf->timestamp;
2462 priv->assoc_capability = bss_conf->assoc_capability;
2464 iwl_led_associate(priv);
2467 * We have just associated, don't start scan too early
2468 * leave time for EAPOL exchange to complete.
2470 * XXX: do this in mac80211
2472 priv->next_scan_jiffies = jiffies +
2473 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2474 if (!iwl_is_rfkill(priv))
2475 priv->cfg->ops->lib->post_associate(priv);
2476 } else {
2477 priv->assoc_id = 0;
2478 iwl_led_disassociate(priv);
2482 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2483 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2484 changes);
2485 ret = iwl_send_rxon_assoc(priv);
2486 if (!ret) {
2487 /* Sync active_rxon with latest change. */
2488 memcpy((void *)&priv->active_rxon,
2489 &priv->staging_rxon,
2490 sizeof(struct iwl_rxon_cmd));
2494 mutex_unlock(&priv->mutex);
2496 IWL_DEBUG_MAC80211(priv, "leave\n");
2498 EXPORT_SYMBOL(iwl_bss_info_changed);
2500 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2502 struct iwl_priv *priv = hw->priv;
2503 unsigned long flags;
2504 __le64 timestamp;
2506 IWL_DEBUG_MAC80211(priv, "enter\n");
2508 if (!iwl_is_ready_rf(priv)) {
2509 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2510 return -EIO;
2513 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2514 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2515 return -EIO;
2518 spin_lock_irqsave(&priv->lock, flags);
2520 if (priv->ibss_beacon)
2521 dev_kfree_skb(priv->ibss_beacon);
2523 priv->ibss_beacon = skb;
2525 priv->assoc_id = 0;
2526 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2527 priv->timestamp = le64_to_cpu(timestamp);
2529 IWL_DEBUG_MAC80211(priv, "leave\n");
2530 spin_unlock_irqrestore(&priv->lock, flags);
2532 iwl_reset_qos(priv);
2534 priv->cfg->ops->lib->post_associate(priv);
2537 return 0;
2539 EXPORT_SYMBOL(iwl_mac_beacon_update);
2541 int iwl_set_mode(struct iwl_priv *priv, int mode)
2543 if (mode == NL80211_IFTYPE_ADHOC) {
2544 const struct iwl_channel_info *ch_info;
2546 ch_info = iwl_get_channel_info(priv,
2547 priv->band,
2548 le16_to_cpu(priv->staging_rxon.channel));
2550 if (!ch_info || !is_channel_ibss(ch_info)) {
2551 IWL_ERR(priv, "channel %d not IBSS channel\n",
2552 le16_to_cpu(priv->staging_rxon.channel));
2553 return -EINVAL;
2557 iwl_connection_init_rx_config(priv, mode);
2559 if (priv->cfg->ops->hcmd->set_rxon_chain)
2560 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2562 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2564 iwl_clear_stations_table(priv);
2566 /* dont commit rxon if rf-kill is on*/
2567 if (!iwl_is_ready_rf(priv))
2568 return -EAGAIN;
2570 iwlcore_commit_rxon(priv);
2572 return 0;
2574 EXPORT_SYMBOL(iwl_set_mode);
2576 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2577 struct ieee80211_if_init_conf *conf)
2579 struct iwl_priv *priv = hw->priv;
2580 unsigned long flags;
2582 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2584 if (priv->vif) {
2585 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2586 return -EOPNOTSUPP;
2589 spin_lock_irqsave(&priv->lock, flags);
2590 priv->vif = conf->vif;
2591 priv->iw_mode = conf->type;
2593 spin_unlock_irqrestore(&priv->lock, flags);
2595 mutex_lock(&priv->mutex);
2597 if (conf->mac_addr) {
2598 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2599 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2602 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2603 /* we are not ready, will run again when ready */
2604 set_bit(STATUS_MODE_PENDING, &priv->status);
2606 mutex_unlock(&priv->mutex);
2608 IWL_DEBUG_MAC80211(priv, "leave\n");
2609 return 0;
2611 EXPORT_SYMBOL(iwl_mac_add_interface);
2613 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2614 struct ieee80211_if_init_conf *conf)
2616 struct iwl_priv *priv = hw->priv;
2618 IWL_DEBUG_MAC80211(priv, "enter\n");
2620 mutex_lock(&priv->mutex);
2622 if (iwl_is_ready_rf(priv)) {
2623 iwl_scan_cancel_timeout(priv, 100);
2624 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2625 iwlcore_commit_rxon(priv);
2627 if (priv->vif == conf->vif) {
2628 priv->vif = NULL;
2629 memset(priv->bssid, 0, ETH_ALEN);
2631 mutex_unlock(&priv->mutex);
2633 IWL_DEBUG_MAC80211(priv, "leave\n");
2636 EXPORT_SYMBOL(iwl_mac_remove_interface);
2639 * iwl_mac_config - mac80211 config callback
2641 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2642 * be set inappropriately and the driver currently sets the hardware up to
2643 * use it whenever needed.
2645 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2647 struct iwl_priv *priv = hw->priv;
2648 const struct iwl_channel_info *ch_info;
2649 struct ieee80211_conf *conf = &hw->conf;
2650 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2651 unsigned long flags = 0;
2652 int ret = 0;
2653 u16 ch;
2654 int scan_active = 0;
2656 mutex_lock(&priv->mutex);
2658 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2659 conf->channel->hw_value, changed);
2661 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2662 test_bit(STATUS_SCANNING, &priv->status))) {
2663 scan_active = 1;
2664 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2668 /* during scanning mac80211 will delay channel setting until
2669 * scan finish with changed = 0
2671 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2672 if (scan_active)
2673 goto set_ch_out;
2675 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2676 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2677 if (!is_channel_valid(ch_info)) {
2678 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2679 ret = -EINVAL;
2680 goto set_ch_out;
2683 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2684 !is_channel_ibss(ch_info)) {
2685 IWL_ERR(priv, "channel %d in band %d not "
2686 "IBSS channel\n",
2687 conf->channel->hw_value, conf->channel->band);
2688 ret = -EINVAL;
2689 goto set_ch_out;
2692 if (iwl_is_associated(priv) &&
2693 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2694 priv->cfg->ops->lib->set_channel_switch) {
2695 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2696 ch);
2697 goto out;
2700 spin_lock_irqsave(&priv->lock, flags);
2702 /* Configure HT40 channels */
2703 ht_conf->is_ht = conf_is_ht(conf);
2704 if (ht_conf->is_ht) {
2705 if (conf_is_ht40_minus(conf)) {
2706 ht_conf->extension_chan_offset =
2707 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2708 ht_conf->is_40mhz = true;
2709 } else if (conf_is_ht40_plus(conf)) {
2710 ht_conf->extension_chan_offset =
2711 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2712 ht_conf->is_40mhz = true;
2713 } else {
2714 ht_conf->extension_chan_offset =
2715 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2716 ht_conf->is_40mhz = false;
2718 } else
2719 ht_conf->is_40mhz = false;
2720 /* Default to no protection. Protection mode will later be set
2721 * from BSS config in iwl_ht_conf */
2722 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2724 /* if we are switching from ht to 2.4 clear flags
2725 * from any ht related info since 2.4 does not
2726 * support ht */
2727 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2728 priv->staging_rxon.flags = 0;
2730 iwl_set_rxon_channel(priv, conf->channel);
2732 iwl_set_flags_for_band(priv, conf->channel->band);
2733 spin_unlock_irqrestore(&priv->lock, flags);
2734 set_ch_out:
2735 /* The list of supported rates and rate mask can be different
2736 * for each band; since the band may have changed, reset
2737 * the rate mask to what mac80211 lists */
2738 iwl_set_rate(priv);
2741 if (changed & (IEEE80211_CONF_CHANGE_PS |
2742 IEEE80211_CONF_CHANGE_IDLE)) {
2743 ret = iwl_power_update_mode(priv, false);
2744 if (ret)
2745 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2748 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2749 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2750 priv->tx_power_user_lmt, conf->power_level);
2752 iwl_set_tx_power(priv, conf->power_level, false);
2755 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2756 if (priv->cfg->ops->hcmd->set_rxon_chain)
2757 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2759 if (!iwl_is_ready(priv)) {
2760 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2761 goto out;
2764 if (scan_active)
2765 goto out;
2767 if (memcmp(&priv->active_rxon,
2768 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2769 iwlcore_commit_rxon(priv);
2770 else
2771 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2774 out:
2775 IWL_DEBUG_MAC80211(priv, "leave\n");
2776 mutex_unlock(&priv->mutex);
2777 return ret;
2779 EXPORT_SYMBOL(iwl_mac_config);
2781 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2782 struct ieee80211_tx_queue_stats *stats)
2784 struct iwl_priv *priv = hw->priv;
2785 int i, avail;
2786 struct iwl_tx_queue *txq;
2787 struct iwl_queue *q;
2788 unsigned long flags;
2790 IWL_DEBUG_MAC80211(priv, "enter\n");
2792 if (!iwl_is_ready_rf(priv)) {
2793 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2794 return -EIO;
2797 spin_lock_irqsave(&priv->lock, flags);
2799 for (i = 0; i < AC_NUM; i++) {
2800 txq = &priv->txq[i];
2801 q = &txq->q;
2802 avail = iwl_queue_space(q);
2804 stats[i].len = q->n_window - avail;
2805 stats[i].limit = q->n_window - q->high_mark;
2806 stats[i].count = q->n_window;
2809 spin_unlock_irqrestore(&priv->lock, flags);
2811 IWL_DEBUG_MAC80211(priv, "leave\n");
2813 return 0;
2815 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2817 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2819 struct iwl_priv *priv = hw->priv;
2820 unsigned long flags;
2822 mutex_lock(&priv->mutex);
2823 IWL_DEBUG_MAC80211(priv, "enter\n");
2825 spin_lock_irqsave(&priv->lock, flags);
2826 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2827 spin_unlock_irqrestore(&priv->lock, flags);
2829 iwl_reset_qos(priv);
2831 spin_lock_irqsave(&priv->lock, flags);
2832 priv->assoc_id = 0;
2833 priv->assoc_capability = 0;
2834 priv->assoc_station_added = 0;
2836 /* new association get rid of ibss beacon skb */
2837 if (priv->ibss_beacon)
2838 dev_kfree_skb(priv->ibss_beacon);
2840 priv->ibss_beacon = NULL;
2842 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2843 priv->timestamp = 0;
2844 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2845 priv->beacon_int = 0;
2847 spin_unlock_irqrestore(&priv->lock, flags);
2849 if (!iwl_is_ready_rf(priv)) {
2850 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2851 mutex_unlock(&priv->mutex);
2852 return;
2855 /* we are restarting association process
2856 * clear RXON_FILTER_ASSOC_MSK bit
2858 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2859 iwl_scan_cancel_timeout(priv, 100);
2860 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2861 iwlcore_commit_rxon(priv);
2864 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2865 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2866 mutex_unlock(&priv->mutex);
2867 return;
2870 iwl_set_rate(priv);
2872 mutex_unlock(&priv->mutex);
2874 IWL_DEBUG_MAC80211(priv, "leave\n");
2876 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2878 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2880 if (!priv->txq)
2881 priv->txq = kzalloc(
2882 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2883 GFP_KERNEL);
2884 if (!priv->txq) {
2885 IWL_ERR(priv, "Not enough memory for txq \n");
2886 return -ENOMEM;
2888 return 0;
2890 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2892 void iwl_free_txq_mem(struct iwl_priv *priv)
2894 kfree(priv->txq);
2895 priv->txq = NULL;
2897 EXPORT_SYMBOL(iwl_free_txq_mem);
2899 int iwl_send_wimax_coex(struct iwl_priv *priv)
2901 struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2903 if (priv->cfg->support_wimax_coexist) {
2904 /* UnMask wake up src at associated sleep */
2905 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2907 /* UnMask wake up src at unassociated sleep */
2908 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2909 memcpy(coex_cmd.sta_prio, cu_priorities,
2910 sizeof(struct iwl_wimax_coex_event_entry) *
2911 COEX_NUM_OF_EVENTS);
2913 /* enabling the coexistence feature */
2914 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2916 /* enabling the priorities tables */
2917 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2918 } else {
2919 /* coexistence is disabled */
2920 memset(&coex_cmd, 0, sizeof(coex_cmd));
2922 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2923 sizeof(coex_cmd), &coex_cmd);
2925 EXPORT_SYMBOL(iwl_send_wimax_coex);
2927 #ifdef CONFIG_IWLWIFI_DEBUGFS
2929 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2931 void iwl_reset_traffic_log(struct iwl_priv *priv)
2933 priv->tx_traffic_idx = 0;
2934 priv->rx_traffic_idx = 0;
2935 if (priv->tx_traffic)
2936 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2937 if (priv->rx_traffic)
2938 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2941 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2943 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2945 if (iwl_debug_level & IWL_DL_TX) {
2946 if (!priv->tx_traffic) {
2947 priv->tx_traffic =
2948 kzalloc(traffic_size, GFP_KERNEL);
2949 if (!priv->tx_traffic)
2950 return -ENOMEM;
2953 if (iwl_debug_level & IWL_DL_RX) {
2954 if (!priv->rx_traffic) {
2955 priv->rx_traffic =
2956 kzalloc(traffic_size, GFP_KERNEL);
2957 if (!priv->rx_traffic)
2958 return -ENOMEM;
2961 iwl_reset_traffic_log(priv);
2962 return 0;
2964 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2966 void iwl_free_traffic_mem(struct iwl_priv *priv)
2968 kfree(priv->tx_traffic);
2969 priv->tx_traffic = NULL;
2971 kfree(priv->rx_traffic);
2972 priv->rx_traffic = NULL;
2974 EXPORT_SYMBOL(iwl_free_traffic_mem);
2976 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2977 u16 length, struct ieee80211_hdr *header)
2979 __le16 fc;
2980 u16 len;
2982 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2983 return;
2985 if (!priv->tx_traffic)
2986 return;
2988 fc = header->frame_control;
2989 if (ieee80211_is_data(fc)) {
2990 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2991 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2992 memcpy((priv->tx_traffic +
2993 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2994 header, len);
2995 priv->tx_traffic_idx =
2996 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2999 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3001 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3002 u16 length, struct ieee80211_hdr *header)
3004 __le16 fc;
3005 u16 len;
3007 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3008 return;
3010 if (!priv->rx_traffic)
3011 return;
3013 fc = header->frame_control;
3014 if (ieee80211_is_data(fc)) {
3015 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3016 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3017 memcpy((priv->rx_traffic +
3018 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3019 header, len);
3020 priv->rx_traffic_idx =
3021 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3024 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3026 const char *get_mgmt_string(int cmd)
3028 switch (cmd) {
3029 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3030 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3031 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3032 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3033 IWL_CMD(MANAGEMENT_PROBE_REQ);
3034 IWL_CMD(MANAGEMENT_PROBE_RESP);
3035 IWL_CMD(MANAGEMENT_BEACON);
3036 IWL_CMD(MANAGEMENT_ATIM);
3037 IWL_CMD(MANAGEMENT_DISASSOC);
3038 IWL_CMD(MANAGEMENT_AUTH);
3039 IWL_CMD(MANAGEMENT_DEAUTH);
3040 IWL_CMD(MANAGEMENT_ACTION);
3041 default:
3042 return "UNKNOWN";
3047 const char *get_ctrl_string(int cmd)
3049 switch (cmd) {
3050 IWL_CMD(CONTROL_BACK_REQ);
3051 IWL_CMD(CONTROL_BACK);
3052 IWL_CMD(CONTROL_PSPOLL);
3053 IWL_CMD(CONTROL_RTS);
3054 IWL_CMD(CONTROL_CTS);
3055 IWL_CMD(CONTROL_ACK);
3056 IWL_CMD(CONTROL_CFEND);
3057 IWL_CMD(CONTROL_CFENDACK);
3058 default:
3059 return "UNKNOWN";
3064 void iwl_clear_tx_stats(struct iwl_priv *priv)
3066 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3070 void iwl_clear_rx_stats(struct iwl_priv *priv)
3072 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3076 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3077 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3078 * Use debugFs to display the rx/rx_statistics
3079 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3080 * information will be recorded, but DATA pkt still will be recorded
3081 * for the reason of iwl_led.c need to control the led blinking based on
3082 * number of tx and rx data.
3085 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3087 struct traffic_stats *stats;
3089 if (is_tx)
3090 stats = &priv->tx_stats;
3091 else
3092 stats = &priv->rx_stats;
3094 if (ieee80211_is_mgmt(fc)) {
3095 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3096 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3097 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3098 break;
3099 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3100 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3101 break;
3102 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3103 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3104 break;
3105 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3106 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3107 break;
3108 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3109 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3110 break;
3111 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3112 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3113 break;
3114 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3115 stats->mgmt[MANAGEMENT_BEACON]++;
3116 break;
3117 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3118 stats->mgmt[MANAGEMENT_ATIM]++;
3119 break;
3120 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3121 stats->mgmt[MANAGEMENT_DISASSOC]++;
3122 break;
3123 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3124 stats->mgmt[MANAGEMENT_AUTH]++;
3125 break;
3126 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3127 stats->mgmt[MANAGEMENT_DEAUTH]++;
3128 break;
3129 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3130 stats->mgmt[MANAGEMENT_ACTION]++;
3131 break;
3133 } else if (ieee80211_is_ctl(fc)) {
3134 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3135 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3136 stats->ctrl[CONTROL_BACK_REQ]++;
3137 break;
3138 case cpu_to_le16(IEEE80211_STYPE_BACK):
3139 stats->ctrl[CONTROL_BACK]++;
3140 break;
3141 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3142 stats->ctrl[CONTROL_PSPOLL]++;
3143 break;
3144 case cpu_to_le16(IEEE80211_STYPE_RTS):
3145 stats->ctrl[CONTROL_RTS]++;
3146 break;
3147 case cpu_to_le16(IEEE80211_STYPE_CTS):
3148 stats->ctrl[CONTROL_CTS]++;
3149 break;
3150 case cpu_to_le16(IEEE80211_STYPE_ACK):
3151 stats->ctrl[CONTROL_ACK]++;
3152 break;
3153 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3154 stats->ctrl[CONTROL_CFEND]++;
3155 break;
3156 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3157 stats->ctrl[CONTROL_CFENDACK]++;
3158 break;
3160 } else {
3161 /* data */
3162 stats->data_cnt++;
3163 stats->data_bytes += len;
3166 EXPORT_SYMBOL(iwl_update_stats);
3167 #endif
3169 #ifdef CONFIG_PM
3171 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3173 struct iwl_priv *priv = pci_get_drvdata(pdev);
3176 * This function is called when system goes into suspend state
3177 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3178 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3179 * it will not call apm_ops.stop() to stop the DMA operation.
3180 * Calling apm_ops.stop here to make sure we stop the DMA.
3182 priv->cfg->ops->lib->apm_ops.stop(priv);
3184 pci_save_state(pdev);
3185 pci_disable_device(pdev);
3186 pci_set_power_state(pdev, PCI_D3hot);
3188 return 0;
3190 EXPORT_SYMBOL(iwl_pci_suspend);
3192 int iwl_pci_resume(struct pci_dev *pdev)
3194 struct iwl_priv *priv = pci_get_drvdata(pdev);
3195 int ret;
3197 pci_set_power_state(pdev, PCI_D0);
3198 ret = pci_enable_device(pdev);
3199 if (ret)
3200 return ret;
3201 pci_restore_state(pdev);
3202 iwl_enable_interrupts(priv);
3204 return 0;
3206 EXPORT_SYMBOL(iwl_pci_resume);
3208 #endif /* CONFIG_PM */