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mwl8k: factor out firmware loading and hw init code
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / mwl8k.c
blob7bd8615869834c8d342ea244e76df2a940b549eb
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
27
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
31
32 /* Register definitions */
33 #define MWL8K_HIU_GEN_PTR 0x00000c10
34 #define MWL8K_MODE_STA 0x0000005a
35 #define MWL8K_MODE_AP 0x000000a5
36 #define MWL8K_HIU_INT_CODE 0x00000c14
37 #define MWL8K_FWSTA_READY 0xf0f1f2f4
38 #define MWL8K_FWAP_READY 0xf1f2f4a5
39 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
40 #define MWL8K_HIU_SCRATCH 0x00000c40
41
42 /* Host->device communications */
43 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
44 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
45 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
46 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
47 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
48 #define MWL8K_H2A_INT_DUMMY (1 << 20)
49 #define MWL8K_H2A_INT_RESET (1 << 15)
50 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
51 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52
53 /* Device->host communications */
54 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
55 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
56 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
57 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
58 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
59 #define MWL8K_A2H_INT_DUMMY (1 << 20)
60 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
61 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
62 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
63 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
64 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
65 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
66 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
67 #define MWL8K_A2H_INT_RX_READY (1 << 1)
68 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69
70 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
71 MWL8K_A2H_INT_CHNL_SWITCHED | \
72 MWL8K_A2H_INT_QUEUE_EMPTY | \
73 MWL8K_A2H_INT_RADAR_DETECT | \
74 MWL8K_A2H_INT_RADIO_ON | \
75 MWL8K_A2H_INT_RADIO_OFF | \
76 MWL8K_A2H_INT_MAC_EVENT | \
77 MWL8K_A2H_INT_OPC_DONE | \
78 MWL8K_A2H_INT_RX_READY | \
79 MWL8K_A2H_INT_TX_DONE)
80
81 #define MWL8K_RX_QUEUES 1
82 #define MWL8K_TX_QUEUES 4
83
84 struct rxd_ops {
85 int rxd_size;
86 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
87 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
88 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
89 __le16 *qos, s8 *noise);
90 };
91
92 struct mwl8k_device_info {
93 char *part_name;
94 char *helper_image;
95 char *fw_image;
96 struct rxd_ops *ap_rxd_ops;
97 };
98
99 struct mwl8k_rx_queue {
100 int rxd_count;
101
102 /* hw receives here */
103 int head;
104
105 /* refill descs here */
106 int tail;
107
108 void *rxd;
109 dma_addr_t rxd_dma;
110 struct {
111 struct sk_buff *skb;
112 DEFINE_DMA_UNMAP_ADDR(dma);
113 } *buf;
114 };
115
116 struct mwl8k_tx_queue {
117 /* hw transmits here */
118 int head;
119
120 /* sw appends here */
121 int tail;
122
123 unsigned int len;
124 struct mwl8k_tx_desc *txd;
125 dma_addr_t txd_dma;
126 struct sk_buff **skb;
127 };
128
129 struct mwl8k_priv {
130 struct ieee80211_hw *hw;
131 struct pci_dev *pdev;
132
133 struct mwl8k_device_info *device_info;
134
135 void __iomem *sram;
136 void __iomem *regs;
137
138 /* firmware */
139 struct firmware *fw_helper;
140 struct firmware *fw_ucode;
141
142 /* hardware/firmware parameters */
143 bool ap_fw;
144 struct rxd_ops *rxd_ops;
145 struct ieee80211_supported_band band_24;
146 struct ieee80211_channel channels_24[14];
147 struct ieee80211_rate rates_24[14];
148 struct ieee80211_supported_band band_50;
149 struct ieee80211_channel channels_50[4];
150 struct ieee80211_rate rates_50[9];
151 u32 ap_macids_supported;
152 u32 sta_macids_supported;
153
154 /* firmware access */
155 struct mutex fw_mutex;
156 struct task_struct *fw_mutex_owner;
157 int fw_mutex_depth;
158 struct completion *hostcmd_wait;
159
160 /* lock held over TX and TX reap */
161 spinlock_t tx_lock;
162
163 /* TX quiesce completion, protected by fw_mutex and tx_lock */
164 struct completion *tx_wait;
165
166 /* List of interfaces. */
167 u32 macids_used;
168 struct list_head vif_list;
169
170 /* power management status cookie from firmware */
171 u32 *cookie;
172 dma_addr_t cookie_dma;
173
174 u16 num_mcaddrs;
175 u8 hw_rev;
176 u32 fw_rev;
177
178 /*
179 * Running count of TX packets in flight, to avoid
180 * iterating over the transmit rings each time.
181 */
182 int pending_tx_pkts;
183
184 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
185 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
186
187 bool radio_on;
188 bool radio_short_preamble;
189 bool sniffer_enabled;
190 bool wmm_enabled;
191
192 /* XXX need to convert this to handle multiple interfaces */
193 bool capture_beacon;
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
196
197 /*
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
201 * is checked.
202 */
203 struct work_struct finalize_join_worker;
204
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
207
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
210
211 /* Most recently reported noise in dBm */
212 s8 noise;
213 };
214
215 /* Per interface specific private data */
216 struct mwl8k_vif {
217 struct list_head list;
218 struct ieee80211_vif *vif;
219
220 /* Firmware macid for this vif. */
221 int macid;
222
223 /* Non AMPDU sequence number assigned by driver. */
224 u16 seqno;
225 };
226 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
227
228 struct mwl8k_sta {
229 /* Index into station database. Returned by UPDATE_STADB. */
230 u8 peer_id;
231 };
232 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
233
234 static const struct ieee80211_channel mwl8k_channels_24[] = {
235 { .center_freq = 2412, .hw_value = 1, },
236 { .center_freq = 2417, .hw_value = 2, },
237 { .center_freq = 2422, .hw_value = 3, },
238 { .center_freq = 2427, .hw_value = 4, },
239 { .center_freq = 2432, .hw_value = 5, },
240 { .center_freq = 2437, .hw_value = 6, },
241 { .center_freq = 2442, .hw_value = 7, },
242 { .center_freq = 2447, .hw_value = 8, },
243 { .center_freq = 2452, .hw_value = 9, },
244 { .center_freq = 2457, .hw_value = 10, },
245 { .center_freq = 2462, .hw_value = 11, },
246 { .center_freq = 2467, .hw_value = 12, },
247 { .center_freq = 2472, .hw_value = 13, },
248 { .center_freq = 2484, .hw_value = 14, },
249 };
250
251 static const struct ieee80211_rate mwl8k_rates_24[] = {
252 { .bitrate = 10, .hw_value = 2, },
253 { .bitrate = 20, .hw_value = 4, },
254 { .bitrate = 55, .hw_value = 11, },
255 { .bitrate = 110, .hw_value = 22, },
256 { .bitrate = 220, .hw_value = 44, },
257 { .bitrate = 60, .hw_value = 12, },
258 { .bitrate = 90, .hw_value = 18, },
259 { .bitrate = 120, .hw_value = 24, },
260 { .bitrate = 180, .hw_value = 36, },
261 { .bitrate = 240, .hw_value = 48, },
262 { .bitrate = 360, .hw_value = 72, },
263 { .bitrate = 480, .hw_value = 96, },
264 { .bitrate = 540, .hw_value = 108, },
265 { .bitrate = 720, .hw_value = 144, },
266 };
267
268 static const struct ieee80211_channel mwl8k_channels_50[] = {
269 { .center_freq = 5180, .hw_value = 36, },
270 { .center_freq = 5200, .hw_value = 40, },
271 { .center_freq = 5220, .hw_value = 44, },
272 { .center_freq = 5240, .hw_value = 48, },
273 };
274
275 static const struct ieee80211_rate mwl8k_rates_50[] = {
276 { .bitrate = 60, .hw_value = 12, },
277 { .bitrate = 90, .hw_value = 18, },
278 { .bitrate = 120, .hw_value = 24, },
279 { .bitrate = 180, .hw_value = 36, },
280 { .bitrate = 240, .hw_value = 48, },
281 { .bitrate = 360, .hw_value = 72, },
282 { .bitrate = 480, .hw_value = 96, },
283 { .bitrate = 540, .hw_value = 108, },
284 { .bitrate = 720, .hw_value = 144, },
285 };
286
287 /* Set or get info from Firmware */
288 #define MWL8K_CMD_GET 0x0000
289 #define MWL8K_CMD_SET 0x0001
290 #define MWL8K_CMD_SET_LIST 0x0002
291
292 /* Firmware command codes */
293 #define MWL8K_CMD_CODE_DNLD 0x0001
294 #define MWL8K_CMD_GET_HW_SPEC 0x0003
295 #define MWL8K_CMD_SET_HW_SPEC 0x0004
296 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
297 #define MWL8K_CMD_GET_STAT 0x0014
298 #define MWL8K_CMD_RADIO_CONTROL 0x001c
299 #define MWL8K_CMD_RF_TX_POWER 0x001e
300 #define MWL8K_CMD_TX_POWER 0x001f
301 #define MWL8K_CMD_RF_ANTENNA 0x0020
302 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
303 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
304 #define MWL8K_CMD_SET_POST_SCAN 0x0108
305 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
306 #define MWL8K_CMD_SET_AID 0x010d
307 #define MWL8K_CMD_SET_RATE 0x0110
308 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
309 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
310 #define MWL8K_CMD_SET_SLOT 0x0114
311 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
312 #define MWL8K_CMD_SET_WMM_MODE 0x0123
313 #define MWL8K_CMD_MIMO_CONFIG 0x0125
314 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
315 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
316 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
317 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
318 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
319 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
320 #define MWL8K_CMD_UPDATE_STADB 0x1123
321
322 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
323 {
324 u16 command = le16_to_cpu(cmd);
325
326 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
327 snprintf(buf, bufsize, "%s", #x);\
328 return buf;\
329 } while (0)
330 switch (command & ~0x8000) {
331 MWL8K_CMDNAME(CODE_DNLD);
332 MWL8K_CMDNAME(GET_HW_SPEC);
333 MWL8K_CMDNAME(SET_HW_SPEC);
334 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
335 MWL8K_CMDNAME(GET_STAT);
336 MWL8K_CMDNAME(RADIO_CONTROL);
337 MWL8K_CMDNAME(RF_TX_POWER);
338 MWL8K_CMDNAME(TX_POWER);
339 MWL8K_CMDNAME(RF_ANTENNA);
340 MWL8K_CMDNAME(SET_BEACON);
341 MWL8K_CMDNAME(SET_PRE_SCAN);
342 MWL8K_CMDNAME(SET_POST_SCAN);
343 MWL8K_CMDNAME(SET_RF_CHANNEL);
344 MWL8K_CMDNAME(SET_AID);
345 MWL8K_CMDNAME(SET_RATE);
346 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
347 MWL8K_CMDNAME(RTS_THRESHOLD);
348 MWL8K_CMDNAME(SET_SLOT);
349 MWL8K_CMDNAME(SET_EDCA_PARAMS);
350 MWL8K_CMDNAME(SET_WMM_MODE);
351 MWL8K_CMDNAME(MIMO_CONFIG);
352 MWL8K_CMDNAME(USE_FIXED_RATE);
353 MWL8K_CMDNAME(ENABLE_SNIFFER);
354 MWL8K_CMDNAME(SET_MAC_ADDR);
355 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
356 MWL8K_CMDNAME(BSS_START);
357 MWL8K_CMDNAME(SET_NEW_STN);
358 MWL8K_CMDNAME(UPDATE_STADB);
359 default:
360 snprintf(buf, bufsize, "0x%x", cmd);
361 }
362 #undef MWL8K_CMDNAME
363
364 return buf;
365 }
366
367 /* Hardware and firmware reset */
368 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
369 {
370 iowrite32(MWL8K_H2A_INT_RESET,
371 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
372 iowrite32(MWL8K_H2A_INT_RESET,
373 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
374 msleep(20);
375 }
376
377 /* Release fw image */
378 static void mwl8k_release_fw(struct firmware **fw)
379 {
380 if (*fw == NULL)
381 return;
382 release_firmware(*fw);
383 *fw = NULL;
384 }
385
386 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
387 {
388 mwl8k_release_fw(&priv->fw_ucode);
389 mwl8k_release_fw(&priv->fw_helper);
390 }
391
392 /* Request fw image */
393 static int mwl8k_request_fw(struct mwl8k_priv *priv,
394 const char *fname, struct firmware **fw)
395 {
396 /* release current image */
397 if (*fw != NULL)
398 mwl8k_release_fw(fw);
399
400 return request_firmware((const struct firmware **)fw,
401 fname, &priv->pdev->dev);
402 }
403
404 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
405 {
406 struct mwl8k_device_info *di = priv->device_info;
407 int rc;
408
409 if (di->helper_image != NULL) {
410 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
411 if (rc) {
412 printk(KERN_ERR "%s: Error requesting helper "
413 "firmware file %s\n", pci_name(priv->pdev),
414 di->helper_image);
415 return rc;
416 }
417 }
418
419 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
420 if (rc) {
421 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
422 pci_name(priv->pdev), di->fw_image);
423 mwl8k_release_fw(&priv->fw_helper);
424 return rc;
425 }
426
427 return 0;
428 }
429
430 struct mwl8k_cmd_pkt {
431 __le16 code;
432 __le16 length;
433 __u8 seq_num;
434 __u8 macid;
435 __le16 result;
436 char payload[0];
437 } __packed;
438
439 /*
440 * Firmware loading.
441 */
442 static int
443 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
444 {
445 void __iomem *regs = priv->regs;
446 dma_addr_t dma_addr;
447 int loops;
448
449 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
450 if (pci_dma_mapping_error(priv->pdev, dma_addr))
451 return -ENOMEM;
452
453 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
454 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
455 iowrite32(MWL8K_H2A_INT_DOORBELL,
456 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
457 iowrite32(MWL8K_H2A_INT_DUMMY,
458 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
459
460 loops = 1000;
461 do {
462 u32 int_code;
463
464 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
465 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
466 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
467 break;
468 }
469
470 cond_resched();
471 udelay(1);
472 } while (--loops);
473
474 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
475
476 return loops ? 0 : -ETIMEDOUT;
477 }
478
479 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
480 const u8 *data, size_t length)
481 {
482 struct mwl8k_cmd_pkt *cmd;
483 int done;
484 int rc = 0;
485
486 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
487 if (cmd == NULL)
488 return -ENOMEM;
489
490 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
491 cmd->seq_num = 0;
492 cmd->macid = 0;
493 cmd->result = 0;
494
495 done = 0;
496 while (length) {
497 int block_size = length > 256 ? 256 : length;
498
499 memcpy(cmd->payload, data + done, block_size);
500 cmd->length = cpu_to_le16(block_size);
501
502 rc = mwl8k_send_fw_load_cmd(priv, cmd,
503 sizeof(*cmd) + block_size);
504 if (rc)
505 break;
506
507 done += block_size;
508 length -= block_size;
509 }
510
511 if (!rc) {
512 cmd->length = 0;
513 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
514 }
515
516 kfree(cmd);
517
518 return rc;
519 }
520
521 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
522 const u8 *data, size_t length)
523 {
524 unsigned char *buffer;
525 int may_continue, rc = 0;
526 u32 done, prev_block_size;
527
528 buffer = kmalloc(1024, GFP_KERNEL);
529 if (buffer == NULL)
530 return -ENOMEM;
531
532 done = 0;
533 prev_block_size = 0;
534 may_continue = 1000;
535 while (may_continue > 0) {
536 u32 block_size;
537
538 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
539 if (block_size & 1) {
540 block_size &= ~1;
541 may_continue--;
542 } else {
543 done += prev_block_size;
544 length -= prev_block_size;
545 }
546
547 if (block_size > 1024 || block_size > length) {
548 rc = -EOVERFLOW;
549 break;
550 }
551
552 if (length == 0) {
553 rc = 0;
554 break;
555 }
556
557 if (block_size == 0) {
558 rc = -EPROTO;
559 may_continue--;
560 udelay(1);
561 continue;
562 }
563
564 prev_block_size = block_size;
565 memcpy(buffer, data + done, block_size);
566
567 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
568 if (rc)
569 break;
570 }
571
572 if (!rc && length != 0)
573 rc = -EREMOTEIO;
574
575 kfree(buffer);
576
577 return rc;
578 }
579
580 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
581 {
582 struct mwl8k_priv *priv = hw->priv;
583 struct firmware *fw = priv->fw_ucode;
584 int rc;
585 int loops;
586
587 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
588 struct firmware *helper = priv->fw_helper;
589
590 if (helper == NULL) {
591 printk(KERN_ERR "%s: helper image needed but none "
592 "given\n", pci_name(priv->pdev));
593 return -EINVAL;
594 }
595
596 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
597 if (rc) {
598 printk(KERN_ERR "%s: unable to load firmware "
599 "helper image\n", pci_name(priv->pdev));
600 return rc;
601 }
602 msleep(5);
603
604 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
605 } else {
606 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
607 }
608
609 if (rc) {
610 printk(KERN_ERR "%s: unable to load firmware image\n",
611 pci_name(priv->pdev));
612 return rc;
613 }
614
615 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
616
617 loops = 500000;
618 do {
619 u32 ready_code;
620
621 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
622 if (ready_code == MWL8K_FWAP_READY) {
623 priv->ap_fw = 1;
624 break;
625 } else if (ready_code == MWL8K_FWSTA_READY) {
626 priv->ap_fw = 0;
627 break;
628 }
629
630 cond_resched();
631 udelay(1);
632 } while (--loops);
633
634 return loops ? 0 : -ETIMEDOUT;
635 }
636
637
638 /* DMA header used by firmware and hardware. */
639 struct mwl8k_dma_data {
640 __le16 fwlen;
641 struct ieee80211_hdr wh;
642 char data[0];
643 } __packed;
644
645 /* Routines to add/remove DMA header from skb. */
646 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
647 {
648 struct mwl8k_dma_data *tr;
649 int hdrlen;
650
651 tr = (struct mwl8k_dma_data *)skb->data;
652 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
653
654 if (hdrlen != sizeof(tr->wh)) {
655 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
656 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
657 *((__le16 *)(tr->data - 2)) = qos;
658 } else {
659 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
660 }
661 }
662
663 if (hdrlen != sizeof(*tr))
664 skb_pull(skb, sizeof(*tr) - hdrlen);
665 }
666
667 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
668 {
669 struct ieee80211_hdr *wh;
670 int hdrlen;
671 struct mwl8k_dma_data *tr;
672
673 /*
674 * Add a firmware DMA header; the firmware requires that we
675 * present a 2-byte payload length followed by a 4-address
676 * header (without QoS field), followed (optionally) by any
677 * WEP/ExtIV header (but only filled in for CCMP).
678 */
679 wh = (struct ieee80211_hdr *)skb->data;
680
681 hdrlen = ieee80211_hdrlen(wh->frame_control);
682 if (hdrlen != sizeof(*tr))
683 skb_push(skb, sizeof(*tr) - hdrlen);
684
685 if (ieee80211_is_data_qos(wh->frame_control))
686 hdrlen -= 2;
687
688 tr = (struct mwl8k_dma_data *)skb->data;
689 if (wh != &tr->wh)
690 memmove(&tr->wh, wh, hdrlen);
691 if (hdrlen != sizeof(tr->wh))
692 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
693
694 /*
695 * Firmware length is the length of the fully formed "802.11
696 * payload". That is, everything except for the 802.11 header.
697 * This includes all crypto material including the MIC.
698 */
699 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
700 }
701
702
703 /*
704 * Packet reception for 88w8366 AP firmware.
705 */
706 struct mwl8k_rxd_8366_ap {
707 __le16 pkt_len;
708 __u8 sq2;
709 __u8 rate;
710 __le32 pkt_phys_addr;
711 __le32 next_rxd_phys_addr;
712 __le16 qos_control;
713 __le16 htsig2;
714 __le32 hw_rssi_info;
715 __le32 hw_noise_floor_info;
716 __u8 noise_floor;
717 __u8 pad0[3];
718 __u8 rssi;
719 __u8 rx_status;
720 __u8 channel;
721 __u8 rx_ctrl;
722 } __packed;
723
724 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
725 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
726 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
727
728 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
729
730 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
731 {
732 struct mwl8k_rxd_8366_ap *rxd = _rxd;
733
734 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
735 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
736 }
737
738 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
739 {
740 struct mwl8k_rxd_8366_ap *rxd = _rxd;
741
742 rxd->pkt_len = cpu_to_le16(len);
743 rxd->pkt_phys_addr = cpu_to_le32(addr);
744 wmb();
745 rxd->rx_ctrl = 0;
746 }
747
748 static int
749 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
750 __le16 *qos, s8 *noise)
751 {
752 struct mwl8k_rxd_8366_ap *rxd = _rxd;
753
754 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
755 return -1;
756 rmb();
757
758 memset(status, 0, sizeof(*status));
759
760 status->signal = -rxd->rssi;
761 *noise = -rxd->noise_floor;
762
763 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
764 status->flag |= RX_FLAG_HT;
765 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
766 status->flag |= RX_FLAG_40MHZ;
767 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
768 } else {
769 int i;
770
771 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
772 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
773 status->rate_idx = i;
774 break;
775 }
776 }
777 }
778
779 if (rxd->channel > 14) {
780 status->band = IEEE80211_BAND_5GHZ;
781 if (!(status->flag & RX_FLAG_HT))
782 status->rate_idx -= 5;
783 } else {
784 status->band = IEEE80211_BAND_2GHZ;
785 }
786 status->freq = ieee80211_channel_to_frequency(rxd->channel);
787
788 *qos = rxd->qos_control;
789
790 return le16_to_cpu(rxd->pkt_len);
791 }
792
793 static struct rxd_ops rxd_8366_ap_ops = {
794 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
795 .rxd_init = mwl8k_rxd_8366_ap_init,
796 .rxd_refill = mwl8k_rxd_8366_ap_refill,
797 .rxd_process = mwl8k_rxd_8366_ap_process,
798 };
799
800 /*
801 * Packet reception for STA firmware.
802 */
803 struct mwl8k_rxd_sta {
804 __le16 pkt_len;
805 __u8 link_quality;
806 __u8 noise_level;
807 __le32 pkt_phys_addr;
808 __le32 next_rxd_phys_addr;
809 __le16 qos_control;
810 __le16 rate_info;
811 __le32 pad0[4];
812 __u8 rssi;
813 __u8 channel;
814 __le16 pad1;
815 __u8 rx_ctrl;
816 __u8 rx_status;
817 __u8 pad2[2];
818 } __packed;
819
820 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
821 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
822 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
823 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
824 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
825 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
826
827 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
828
829 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
830 {
831 struct mwl8k_rxd_sta *rxd = _rxd;
832
833 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
834 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
835 }
836
837 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
838 {
839 struct mwl8k_rxd_sta *rxd = _rxd;
840
841 rxd->pkt_len = cpu_to_le16(len);
842 rxd->pkt_phys_addr = cpu_to_le32(addr);
843 wmb();
844 rxd->rx_ctrl = 0;
845 }
846
847 static int
848 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
849 __le16 *qos, s8 *noise)
850 {
851 struct mwl8k_rxd_sta *rxd = _rxd;
852 u16 rate_info;
853
854 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
855 return -1;
856 rmb();
857
858 rate_info = le16_to_cpu(rxd->rate_info);
859
860 memset(status, 0, sizeof(*status));
861
862 status->signal = -rxd->rssi;
863 *noise = -rxd->noise_level;
864 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
865 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
866
867 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
868 status->flag |= RX_FLAG_SHORTPRE;
869 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
870 status->flag |= RX_FLAG_40MHZ;
871 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
872 status->flag |= RX_FLAG_SHORT_GI;
873 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
874 status->flag |= RX_FLAG_HT;
875
876 if (rxd->channel > 14) {
877 status->band = IEEE80211_BAND_5GHZ;
878 if (!(status->flag & RX_FLAG_HT))
879 status->rate_idx -= 5;
880 } else {
881 status->band = IEEE80211_BAND_2GHZ;
882 }
883 status->freq = ieee80211_channel_to_frequency(rxd->channel);
884
885 *qos = rxd->qos_control;
886
887 return le16_to_cpu(rxd->pkt_len);
888 }
889
890 static struct rxd_ops rxd_sta_ops = {
891 .rxd_size = sizeof(struct mwl8k_rxd_sta),
892 .rxd_init = mwl8k_rxd_sta_init,
893 .rxd_refill = mwl8k_rxd_sta_refill,
894 .rxd_process = mwl8k_rxd_sta_process,
895 };
896
897
898 #define MWL8K_RX_DESCS 256
899 #define MWL8K_RX_MAXSZ 3800
900
901 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
902 {
903 struct mwl8k_priv *priv = hw->priv;
904 struct mwl8k_rx_queue *rxq = priv->rxq + index;
905 int size;
906 int i;
907
908 rxq->rxd_count = 0;
909 rxq->head = 0;
910 rxq->tail = 0;
911
912 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
913
914 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
915 if (rxq->rxd == NULL) {
916 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
917 return -ENOMEM;
918 }
919 memset(rxq->rxd, 0, size);
920
921 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
922 if (rxq->buf == NULL) {
923 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
924 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
925 return -ENOMEM;
926 }
927 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
928
929 for (i = 0; i < MWL8K_RX_DESCS; i++) {
930 int desc_size;
931 void *rxd;
932 int nexti;
933 dma_addr_t next_dma_addr;
934
935 desc_size = priv->rxd_ops->rxd_size;
936 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
937
938 nexti = i + 1;
939 if (nexti == MWL8K_RX_DESCS)
940 nexti = 0;
941 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
942
943 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
944 }
945
946 return 0;
947 }
948
949 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
950 {
951 struct mwl8k_priv *priv = hw->priv;
952 struct mwl8k_rx_queue *rxq = priv->rxq + index;
953 int refilled;
954
955 refilled = 0;
956 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
957 struct sk_buff *skb;
958 dma_addr_t addr;
959 int rx;
960 void *rxd;
961
962 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
963 if (skb == NULL)
964 break;
965
966 addr = pci_map_single(priv->pdev, skb->data,
967 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
968
969 rxq->rxd_count++;
970 rx = rxq->tail++;
971 if (rxq->tail == MWL8K_RX_DESCS)
972 rxq->tail = 0;
973 rxq->buf[rx].skb = skb;
974 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
975
976 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
977 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
978
979 refilled++;
980 }
981
982 return refilled;
983 }
984
985 /* Must be called only when the card's reception is completely halted */
986 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
987 {
988 struct mwl8k_priv *priv = hw->priv;
989 struct mwl8k_rx_queue *rxq = priv->rxq + index;
990 int i;
991
992 for (i = 0; i < MWL8K_RX_DESCS; i++) {
993 if (rxq->buf[i].skb != NULL) {
994 pci_unmap_single(priv->pdev,
995 dma_unmap_addr(&rxq->buf[i], dma),
996 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
997 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
998
999 kfree_skb(rxq->buf[i].skb);
1000 rxq->buf[i].skb = NULL;
1001 }
1002 }
1003
1004 kfree(rxq->buf);
1005 rxq->buf = NULL;
1006
1007 pci_free_consistent(priv->pdev,
1008 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1009 rxq->rxd, rxq->rxd_dma);
1010 rxq->rxd = NULL;
1011 }
1012
1013
1014 /*
1015 * Scan a list of BSSIDs to process for finalize join.
1016 * Allows for extension to process multiple BSSIDs.
1017 */
1018 static inline int
1019 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1020 {
1021 return priv->capture_beacon &&
1022 ieee80211_is_beacon(wh->frame_control) &&
1023 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1024 }
1025
1026 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1027 struct sk_buff *skb)
1028 {
1029 struct mwl8k_priv *priv = hw->priv;
1030
1031 priv->capture_beacon = false;
1032 memset(priv->capture_bssid, 0, ETH_ALEN);
1033
1034 /*
1035 * Use GFP_ATOMIC as rxq_process is called from
1036 * the primary interrupt handler, memory allocation call
1037 * must not sleep.
1038 */
1039 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1040 if (priv->beacon_skb != NULL)
1041 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1042 }
1043
1044 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1045 {
1046 struct mwl8k_priv *priv = hw->priv;
1047 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1048 int processed;
1049
1050 processed = 0;
1051 while (rxq->rxd_count && limit--) {
1052 struct sk_buff *skb;
1053 void *rxd;
1054 int pkt_len;
1055 struct ieee80211_rx_status status;
1056 __le16 qos;
1057
1058 skb = rxq->buf[rxq->head].skb;
1059 if (skb == NULL)
1060 break;
1061
1062 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1063
1064 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1065 &priv->noise);
1066 if (pkt_len < 0)
1067 break;
1068
1069 rxq->buf[rxq->head].skb = NULL;
1070
1071 pci_unmap_single(priv->pdev,
1072 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1073 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1074 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1075
1076 rxq->head++;
1077 if (rxq->head == MWL8K_RX_DESCS)
1078 rxq->head = 0;
1079
1080 rxq->rxd_count--;
1081
1082 skb_put(skb, pkt_len);
1083 mwl8k_remove_dma_header(skb, qos);
1084
1085 /*
1086 * Check for a pending join operation. Save a
1087 * copy of the beacon and schedule a tasklet to
1088 * send a FINALIZE_JOIN command to the firmware.
1089 */
1090 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1091 mwl8k_save_beacon(hw, skb);
1092
1093 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1094 ieee80211_rx_irqsafe(hw, skb);
1095
1096 processed++;
1097 }
1098
1099 return processed;
1100 }
1101
1102
1103 /*
1104 * Packet transmission.
1105 */
1106
1107 #define MWL8K_TXD_STATUS_OK 0x00000001
1108 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1109 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1110 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1111 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1112
1113 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1114 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1115 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1116 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1117 #define MWL8K_QOS_EOSP 0x0010
1118
1119 struct mwl8k_tx_desc {
1120 __le32 status;
1121 __u8 data_rate;
1122 __u8 tx_priority;
1123 __le16 qos_control;
1124 __le32 pkt_phys_addr;
1125 __le16 pkt_len;
1126 __u8 dest_MAC_addr[ETH_ALEN];
1127 __le32 next_txd_phys_addr;
1128 __le32 reserved;
1129 __le16 rate_info;
1130 __u8 peer_id;
1131 __u8 tx_frag_cnt;
1132 } __packed;
1133
1134 #define MWL8K_TX_DESCS 128
1135
1136 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1137 {
1138 struct mwl8k_priv *priv = hw->priv;
1139 struct mwl8k_tx_queue *txq = priv->txq + index;
1140 int size;
1141 int i;
1142
1143 txq->len = 0;
1144 txq->head = 0;
1145 txq->tail = 0;
1146
1147 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1148
1149 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1150 if (txq->txd == NULL) {
1151 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
1152 return -ENOMEM;
1153 }
1154 memset(txq->txd, 0, size);
1155
1156 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1157 if (txq->skb == NULL) {
1158 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
1159 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1160 return -ENOMEM;
1161 }
1162 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1163
1164 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1165 struct mwl8k_tx_desc *tx_desc;
1166 int nexti;
1167
1168 tx_desc = txq->txd + i;
1169 nexti = (i + 1) % MWL8K_TX_DESCS;
1170
1171 tx_desc->status = 0;
1172 tx_desc->next_txd_phys_addr =
1173 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1174 }
1175
1176 return 0;
1177 }
1178
1179 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1180 {
1181 iowrite32(MWL8K_H2A_INT_PPA_READY,
1182 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1183 iowrite32(MWL8K_H2A_INT_DUMMY,
1184 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1185 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1186 }
1187
1188 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1189 {
1190 struct mwl8k_priv *priv = hw->priv;
1191 int i;
1192
1193 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1194 struct mwl8k_tx_queue *txq = priv->txq + i;
1195 int fw_owned = 0;
1196 int drv_owned = 0;
1197 int unused = 0;
1198 int desc;
1199
1200 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1201 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1202 u32 status;
1203
1204 status = le32_to_cpu(tx_desc->status);
1205 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1206 fw_owned++;
1207 else
1208 drv_owned++;
1209
1210 if (tx_desc->pkt_len == 0)
1211 unused++;
1212 }
1213
1214 wiphy_err(hw->wiphy,
1215 "txq[%d] len=%d head=%d tail=%d "
1216 "fw_owned=%d drv_owned=%d unused=%d\n",
1217 i,
1218 txq->len, txq->head, txq->tail,
1219 fw_owned, drv_owned, unused);
1220 }
1221 }
1222
1223 /*
1224 * Must be called with priv->fw_mutex held and tx queues stopped.
1225 */
1226 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1227
1228 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1229 {
1230 struct mwl8k_priv *priv = hw->priv;
1231 DECLARE_COMPLETION_ONSTACK(tx_wait);
1232 int retry;
1233 int rc;
1234
1235 might_sleep();
1236
1237 /*
1238 * The TX queues are stopped at this point, so this test
1239 * doesn't need to take ->tx_lock.
1240 */
1241 if (!priv->pending_tx_pkts)
1242 return 0;
1243
1244 retry = 0;
1245 rc = 0;
1246
1247 spin_lock_bh(&priv->tx_lock);
1248 priv->tx_wait = &tx_wait;
1249 while (!rc) {
1250 int oldcount;
1251 unsigned long timeout;
1252
1253 oldcount = priv->pending_tx_pkts;
1254
1255 spin_unlock_bh(&priv->tx_lock);
1256 timeout = wait_for_completion_timeout(&tx_wait,
1257 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1258 spin_lock_bh(&priv->tx_lock);
1259
1260 if (timeout) {
1261 WARN_ON(priv->pending_tx_pkts);
1262 if (retry) {
1263 wiphy_notice(hw->wiphy, "tx rings drained\n");
1264 }
1265 break;
1266 }
1267
1268 if (priv->pending_tx_pkts < oldcount) {
1269 wiphy_notice(hw->wiphy,
1270 "waiting for tx rings to drain (%d -> %d pkts)\n",
1271 oldcount, priv->pending_tx_pkts);
1272 retry = 1;
1273 continue;
1274 }
1275
1276 priv->tx_wait = NULL;
1277
1278 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1279 MWL8K_TX_WAIT_TIMEOUT_MS);
1280 mwl8k_dump_tx_rings(hw);
1281
1282 rc = -ETIMEDOUT;
1283 }
1284 spin_unlock_bh(&priv->tx_lock);
1285
1286 return rc;
1287 }
1288
1289 #define MWL8K_TXD_SUCCESS(status) \
1290 ((status) & (MWL8K_TXD_STATUS_OK | \
1291 MWL8K_TXD_STATUS_OK_RETRY | \
1292 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1293
1294 static int
1295 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1296 {
1297 struct mwl8k_priv *priv = hw->priv;
1298 struct mwl8k_tx_queue *txq = priv->txq + index;
1299 int processed;
1300
1301 processed = 0;
1302 while (txq->len > 0 && limit--) {
1303 int tx;
1304 struct mwl8k_tx_desc *tx_desc;
1305 unsigned long addr;
1306 int size;
1307 struct sk_buff *skb;
1308 struct ieee80211_tx_info *info;
1309 u32 status;
1310
1311 tx = txq->head;
1312 tx_desc = txq->txd + tx;
1313
1314 status = le32_to_cpu(tx_desc->status);
1315
1316 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1317 if (!force)
1318 break;
1319 tx_desc->status &=
1320 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1321 }
1322
1323 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1324 BUG_ON(txq->len == 0);
1325 txq->len--;
1326 priv->pending_tx_pkts--;
1327
1328 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1329 size = le16_to_cpu(tx_desc->pkt_len);
1330 skb = txq->skb[tx];
1331 txq->skb[tx] = NULL;
1332
1333 BUG_ON(skb == NULL);
1334 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1335
1336 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1337
1338 /* Mark descriptor as unused */
1339 tx_desc->pkt_phys_addr = 0;
1340 tx_desc->pkt_len = 0;
1341
1342 info = IEEE80211_SKB_CB(skb);
1343 ieee80211_tx_info_clear_status(info);
1344 if (MWL8K_TXD_SUCCESS(status))
1345 info->flags |= IEEE80211_TX_STAT_ACK;
1346
1347 ieee80211_tx_status_irqsafe(hw, skb);
1348
1349 processed++;
1350 }
1351
1352 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1353 ieee80211_wake_queue(hw, index);
1354
1355 return processed;
1356 }
1357
1358 /* must be called only when the card's transmit is completely halted */
1359 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1360 {
1361 struct mwl8k_priv *priv = hw->priv;
1362 struct mwl8k_tx_queue *txq = priv->txq + index;
1363
1364 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1365
1366 kfree(txq->skb);
1367 txq->skb = NULL;
1368
1369 pci_free_consistent(priv->pdev,
1370 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1371 txq->txd, txq->txd_dma);
1372 txq->txd = NULL;
1373 }
1374
1375 static int
1376 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1377 {
1378 struct mwl8k_priv *priv = hw->priv;
1379 struct ieee80211_tx_info *tx_info;
1380 struct mwl8k_vif *mwl8k_vif;
1381 struct ieee80211_hdr *wh;
1382 struct mwl8k_tx_queue *txq;
1383 struct mwl8k_tx_desc *tx;
1384 dma_addr_t dma;
1385 u32 txstatus;
1386 u8 txdatarate;
1387 u16 qos;
1388
1389 wh = (struct ieee80211_hdr *)skb->data;
1390 if (ieee80211_is_data_qos(wh->frame_control))
1391 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1392 else
1393 qos = 0;
1394
1395 mwl8k_add_dma_header(skb);
1396 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1397
1398 tx_info = IEEE80211_SKB_CB(skb);
1399 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1400
1401 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1402 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1403 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1404 mwl8k_vif->seqno += 0x10;
1405 }
1406
1407 /* Setup firmware control bit fields for each frame type. */
1408 txstatus = 0;
1409 txdatarate = 0;
1410 if (ieee80211_is_mgmt(wh->frame_control) ||
1411 ieee80211_is_ctl(wh->frame_control)) {
1412 txdatarate = 0;
1413 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1414 } else if (ieee80211_is_data(wh->frame_control)) {
1415 txdatarate = 1;
1416 if (is_multicast_ether_addr(wh->addr1))
1417 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1418
1419 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1420 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1421 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1422 else
1423 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1424 }
1425
1426 dma = pci_map_single(priv->pdev, skb->data,
1427 skb->len, PCI_DMA_TODEVICE);
1428
1429 if (pci_dma_mapping_error(priv->pdev, dma)) {
1430 wiphy_debug(hw->wiphy,
1431 "failed to dma map skb, dropping TX frame.\n");
1432 dev_kfree_skb(skb);
1433 return NETDEV_TX_OK;
1434 }
1435
1436 spin_lock_bh(&priv->tx_lock);
1437
1438 txq = priv->txq + index;
1439
1440 BUG_ON(txq->skb[txq->tail] != NULL);
1441 txq->skb[txq->tail] = skb;
1442
1443 tx = txq->txd + txq->tail;
1444 tx->data_rate = txdatarate;
1445 tx->tx_priority = index;
1446 tx->qos_control = cpu_to_le16(qos);
1447 tx->pkt_phys_addr = cpu_to_le32(dma);
1448 tx->pkt_len = cpu_to_le16(skb->len);
1449 tx->rate_info = 0;
1450 if (!priv->ap_fw && tx_info->control.sta != NULL)
1451 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1452 else
1453 tx->peer_id = 0;
1454 wmb();
1455 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1456
1457 txq->len++;
1458 priv->pending_tx_pkts++;
1459
1460 txq->tail++;
1461 if (txq->tail == MWL8K_TX_DESCS)
1462 txq->tail = 0;
1463
1464 if (txq->head == txq->tail)
1465 ieee80211_stop_queue(hw, index);
1466
1467 mwl8k_tx_start(priv);
1468
1469 spin_unlock_bh(&priv->tx_lock);
1470
1471 return NETDEV_TX_OK;
1472 }
1473
1474
1475 /*
1476 * Firmware access.
1477 *
1478 * We have the following requirements for issuing firmware commands:
1479 * - Some commands require that the packet transmit path is idle when
1480 * the command is issued. (For simplicity, we'll just quiesce the
1481 * transmit path for every command.)
1482 * - There are certain sequences of commands that need to be issued to
1483 * the hardware sequentially, with no other intervening commands.
1484 *
1485 * This leads to an implementation of a "firmware lock" as a mutex that
1486 * can be taken recursively, and which is taken by both the low-level
1487 * command submission function (mwl8k_post_cmd) as well as any users of
1488 * that function that require issuing of an atomic sequence of commands,
1489 * and quiesces the transmit path whenever it's taken.
1490 */
1491 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1492 {
1493 struct mwl8k_priv *priv = hw->priv;
1494
1495 if (priv->fw_mutex_owner != current) {
1496 int rc;
1497
1498 mutex_lock(&priv->fw_mutex);
1499 ieee80211_stop_queues(hw);
1500
1501 rc = mwl8k_tx_wait_empty(hw);
1502 if (rc) {
1503 ieee80211_wake_queues(hw);
1504 mutex_unlock(&priv->fw_mutex);
1505
1506 return rc;
1507 }
1508
1509 priv->fw_mutex_owner = current;
1510 }
1511
1512 priv->fw_mutex_depth++;
1513
1514 return 0;
1515 }
1516
1517 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1518 {
1519 struct mwl8k_priv *priv = hw->priv;
1520
1521 if (!--priv->fw_mutex_depth) {
1522 ieee80211_wake_queues(hw);
1523 priv->fw_mutex_owner = NULL;
1524 mutex_unlock(&priv->fw_mutex);
1525 }
1526 }
1527
1528
1529 /*
1530 * Command processing.
1531 */
1532
1533 /* Timeout firmware commands after 10s */
1534 #define MWL8K_CMD_TIMEOUT_MS 10000
1535
1536 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1537 {
1538 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1539 struct mwl8k_priv *priv = hw->priv;
1540 void __iomem *regs = priv->regs;
1541 dma_addr_t dma_addr;
1542 unsigned int dma_size;
1543 int rc;
1544 unsigned long timeout = 0;
1545 u8 buf[32];
1546
1547 cmd->result = (__force __le16) 0xffff;
1548 dma_size = le16_to_cpu(cmd->length);
1549 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1550 PCI_DMA_BIDIRECTIONAL);
1551 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1552 return -ENOMEM;
1553
1554 rc = mwl8k_fw_lock(hw);
1555 if (rc) {
1556 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1557 PCI_DMA_BIDIRECTIONAL);
1558 return rc;
1559 }
1560
1561 priv->hostcmd_wait = &cmd_wait;
1562 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1563 iowrite32(MWL8K_H2A_INT_DOORBELL,
1564 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1565 iowrite32(MWL8K_H2A_INT_DUMMY,
1566 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1567
1568 timeout = wait_for_completion_timeout(&cmd_wait,
1569 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1570
1571 priv->hostcmd_wait = NULL;
1572
1573 mwl8k_fw_unlock(hw);
1574
1575 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1576 PCI_DMA_BIDIRECTIONAL);
1577
1578 if (!timeout) {
1579 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
1580 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1581 MWL8K_CMD_TIMEOUT_MS);
1582 rc = -ETIMEDOUT;
1583 } else {
1584 int ms;
1585
1586 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1587
1588 rc = cmd->result ? -EINVAL : 0;
1589 if (rc)
1590 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
1591 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1592 le16_to_cpu(cmd->result));
1593 else if (ms > 2000)
1594 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
1595 mwl8k_cmd_name(cmd->code,
1596 buf, sizeof(buf)),
1597 ms);
1598 }
1599
1600 return rc;
1601 }
1602
1603 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1604 struct ieee80211_vif *vif,
1605 struct mwl8k_cmd_pkt *cmd)
1606 {
1607 if (vif != NULL)
1608 cmd->macid = MWL8K_VIF(vif)->macid;
1609 return mwl8k_post_cmd(hw, cmd);
1610 }
1611
1612 /*
1613 * Setup code shared between STA and AP firmware images.
1614 */
1615 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1616 {
1617 struct mwl8k_priv *priv = hw->priv;
1618
1619 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1620 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1621
1622 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1623 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1624
1625 priv->band_24.band = IEEE80211_BAND_2GHZ;
1626 priv->band_24.channels = priv->channels_24;
1627 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1628 priv->band_24.bitrates = priv->rates_24;
1629 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1630
1631 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1632 }
1633
1634 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1635 {
1636 struct mwl8k_priv *priv = hw->priv;
1637
1638 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1639 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1640
1641 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1642 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1643
1644 priv->band_50.band = IEEE80211_BAND_5GHZ;
1645 priv->band_50.channels = priv->channels_50;
1646 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1647 priv->band_50.bitrates = priv->rates_50;
1648 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1649
1650 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1651 }
1652
1653 /*
1654 * CMD_GET_HW_SPEC (STA version).
1655 */
1656 struct mwl8k_cmd_get_hw_spec_sta {
1657 struct mwl8k_cmd_pkt header;
1658 __u8 hw_rev;
1659 __u8 host_interface;
1660 __le16 num_mcaddrs;
1661 __u8 perm_addr[ETH_ALEN];
1662 __le16 region_code;
1663 __le32 fw_rev;
1664 __le32 ps_cookie;
1665 __le32 caps;
1666 __u8 mcs_bitmap[16];
1667 __le32 rx_queue_ptr;
1668 __le32 num_tx_queues;
1669 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1670 __le32 caps2;
1671 __le32 num_tx_desc_per_queue;
1672 __le32 total_rxd;
1673 } __packed;
1674
1675 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1676 #define MWL8K_CAP_GREENFIELD 0x08000000
1677 #define MWL8K_CAP_AMPDU 0x04000000
1678 #define MWL8K_CAP_RX_STBC 0x01000000
1679 #define MWL8K_CAP_TX_STBC 0x00800000
1680 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1681 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1682 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1683 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1684 #define MWL8K_CAP_DELAY_BA 0x00003000
1685 #define MWL8K_CAP_MIMO 0x00000200
1686 #define MWL8K_CAP_40MHZ 0x00000100
1687 #define MWL8K_CAP_BAND_MASK 0x00000007
1688 #define MWL8K_CAP_5GHZ 0x00000004
1689 #define MWL8K_CAP_2GHZ4 0x00000001
1690
1691 static void
1692 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1693 struct ieee80211_supported_band *band, u32 cap)
1694 {
1695 int rx_streams;
1696 int tx_streams;
1697
1698 band->ht_cap.ht_supported = 1;
1699
1700 if (cap & MWL8K_CAP_MAX_AMSDU)
1701 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1702 if (cap & MWL8K_CAP_GREENFIELD)
1703 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1704 if (cap & MWL8K_CAP_AMPDU) {
1705 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1706 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1707 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1708 }
1709 if (cap & MWL8K_CAP_RX_STBC)
1710 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1711 if (cap & MWL8K_CAP_TX_STBC)
1712 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1713 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1714 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1715 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1716 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1717 if (cap & MWL8K_CAP_DELAY_BA)
1718 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1719 if (cap & MWL8K_CAP_40MHZ)
1720 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1721
1722 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1723 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1724
1725 band->ht_cap.mcs.rx_mask[0] = 0xff;
1726 if (rx_streams >= 2)
1727 band->ht_cap.mcs.rx_mask[1] = 0xff;
1728 if (rx_streams >= 3)
1729 band->ht_cap.mcs.rx_mask[2] = 0xff;
1730 band->ht_cap.mcs.rx_mask[4] = 0x01;
1731 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1732
1733 if (rx_streams != tx_streams) {
1734 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1735 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1736 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1737 }
1738 }
1739
1740 static void
1741 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1742 {
1743 struct mwl8k_priv *priv = hw->priv;
1744
1745 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1746 mwl8k_setup_2ghz_band(hw);
1747 if (caps & MWL8K_CAP_MIMO)
1748 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1749 }
1750
1751 if (caps & MWL8K_CAP_5GHZ) {
1752 mwl8k_setup_5ghz_band(hw);
1753 if (caps & MWL8K_CAP_MIMO)
1754 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1755 }
1756 }
1757
1758 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1759 {
1760 struct mwl8k_priv *priv = hw->priv;
1761 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1762 int rc;
1763 int i;
1764
1765 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1766 if (cmd == NULL)
1767 return -ENOMEM;
1768
1769 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1770 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1771
1772 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1773 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1774 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1775 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1776 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1777 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1778 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1779 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1780
1781 rc = mwl8k_post_cmd(hw, &cmd->header);
1782
1783 if (!rc) {
1784 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1785 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1786 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1787 priv->hw_rev = cmd->hw_rev;
1788 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1789 priv->ap_macids_supported = 0x00000000;
1790 priv->sta_macids_supported = 0x00000001;
1791 }
1792
1793 kfree(cmd);
1794 return rc;
1795 }
1796
1797 /*
1798 * CMD_GET_HW_SPEC (AP version).
1799 */
1800 struct mwl8k_cmd_get_hw_spec_ap {
1801 struct mwl8k_cmd_pkt header;
1802 __u8 hw_rev;
1803 __u8 host_interface;
1804 __le16 num_wcb;
1805 __le16 num_mcaddrs;
1806 __u8 perm_addr[ETH_ALEN];
1807 __le16 region_code;
1808 __le16 num_antenna;
1809 __le32 fw_rev;
1810 __le32 wcbbase0;
1811 __le32 rxwrptr;
1812 __le32 rxrdptr;
1813 __le32 ps_cookie;
1814 __le32 wcbbase1;
1815 __le32 wcbbase2;
1816 __le32 wcbbase3;
1817 } __packed;
1818
1819 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1820 {
1821 struct mwl8k_priv *priv = hw->priv;
1822 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1823 int rc;
1824
1825 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1826 if (cmd == NULL)
1827 return -ENOMEM;
1828
1829 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1830 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1831
1832 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1833 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1834
1835 rc = mwl8k_post_cmd(hw, &cmd->header);
1836
1837 if (!rc) {
1838 int off;
1839
1840 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1841 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1842 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1843 priv->hw_rev = cmd->hw_rev;
1844 mwl8k_setup_2ghz_band(hw);
1845 priv->ap_macids_supported = 0x000000ff;
1846 priv->sta_macids_supported = 0x00000000;
1847
1848 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1849 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
1850
1851 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1852 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1853
1854 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1855 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1856
1857 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1858 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
1859
1860 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1861 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
1862
1863 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1864 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
1865 }
1866
1867 kfree(cmd);
1868 return rc;
1869 }
1870
1871 /*
1872 * CMD_SET_HW_SPEC.
1873 */
1874 struct mwl8k_cmd_set_hw_spec {
1875 struct mwl8k_cmd_pkt header;
1876 __u8 hw_rev;
1877 __u8 host_interface;
1878 __le16 num_mcaddrs;
1879 __u8 perm_addr[ETH_ALEN];
1880 __le16 region_code;
1881 __le32 fw_rev;
1882 __le32 ps_cookie;
1883 __le32 caps;
1884 __le32 rx_queue_ptr;
1885 __le32 num_tx_queues;
1886 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1887 __le32 flags;
1888 __le32 num_tx_desc_per_queue;
1889 __le32 total_rxd;
1890 } __packed;
1891
1892 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1893 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1894 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1895
1896 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1897 {
1898 struct mwl8k_priv *priv = hw->priv;
1899 struct mwl8k_cmd_set_hw_spec *cmd;
1900 int rc;
1901 int i;
1902
1903 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1904 if (cmd == NULL)
1905 return -ENOMEM;
1906
1907 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1908 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1909
1910 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1911 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1912 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1913 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1914 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1915 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1916 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1917 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1918 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1919 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1920
1921 rc = mwl8k_post_cmd(hw, &cmd->header);
1922 kfree(cmd);
1923
1924 return rc;
1925 }
1926
1927 /*
1928 * CMD_MAC_MULTICAST_ADR.
1929 */
1930 struct mwl8k_cmd_mac_multicast_adr {
1931 struct mwl8k_cmd_pkt header;
1932 __le16 action;
1933 __le16 numaddr;
1934 __u8 addr[0][ETH_ALEN];
1935 };
1936
1937 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1938 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1939 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1940 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1941
1942 static struct mwl8k_cmd_pkt *
1943 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1944 struct netdev_hw_addr_list *mc_list)
1945 {
1946 struct mwl8k_priv *priv = hw->priv;
1947 struct mwl8k_cmd_mac_multicast_adr *cmd;
1948 int size;
1949 int mc_count = 0;
1950
1951 if (mc_list)
1952 mc_count = netdev_hw_addr_list_count(mc_list);
1953
1954 if (allmulti || mc_count > priv->num_mcaddrs) {
1955 allmulti = 1;
1956 mc_count = 0;
1957 }
1958
1959 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1960
1961 cmd = kzalloc(size, GFP_ATOMIC);
1962 if (cmd == NULL)
1963 return NULL;
1964
1965 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1966 cmd->header.length = cpu_to_le16(size);
1967 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1968 MWL8K_ENABLE_RX_BROADCAST);
1969
1970 if (allmulti) {
1971 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1972 } else if (mc_count) {
1973 struct netdev_hw_addr *ha;
1974 int i = 0;
1975
1976 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1977 cmd->numaddr = cpu_to_le16(mc_count);
1978 netdev_hw_addr_list_for_each(ha, mc_list) {
1979 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
1980 }
1981 }
1982
1983 return &cmd->header;
1984 }
1985
1986 /*
1987 * CMD_GET_STAT.
1988 */
1989 struct mwl8k_cmd_get_stat {
1990 struct mwl8k_cmd_pkt header;
1991 __le32 stats[64];
1992 } __packed;
1993
1994 #define MWL8K_STAT_ACK_FAILURE 9
1995 #define MWL8K_STAT_RTS_FAILURE 12
1996 #define MWL8K_STAT_FCS_ERROR 24
1997 #define MWL8K_STAT_RTS_SUCCESS 11
1998
1999 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2000 struct ieee80211_low_level_stats *stats)
2001 {
2002 struct mwl8k_cmd_get_stat *cmd;
2003 int rc;
2004
2005 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2006 if (cmd == NULL)
2007 return -ENOMEM;
2008
2009 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2010 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2011
2012 rc = mwl8k_post_cmd(hw, &cmd->header);
2013 if (!rc) {
2014 stats->dot11ACKFailureCount =
2015 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2016 stats->dot11RTSFailureCount =
2017 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2018 stats->dot11FCSErrorCount =
2019 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2020 stats->dot11RTSSuccessCount =
2021 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2022 }
2023 kfree(cmd);
2024
2025 return rc;
2026 }
2027
2028 /*
2029 * CMD_RADIO_CONTROL.
2030 */
2031 struct mwl8k_cmd_radio_control {
2032 struct mwl8k_cmd_pkt header;
2033 __le16 action;
2034 __le16 control;
2035 __le16 radio_on;
2036 } __packed;
2037
2038 static int
2039 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2040 {
2041 struct mwl8k_priv *priv = hw->priv;
2042 struct mwl8k_cmd_radio_control *cmd;
2043 int rc;
2044
2045 if (enable == priv->radio_on && !force)
2046 return 0;
2047
2048 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2049 if (cmd == NULL)
2050 return -ENOMEM;
2051
2052 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2053 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2054 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2055 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2056 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2057
2058 rc = mwl8k_post_cmd(hw, &cmd->header);
2059 kfree(cmd);
2060
2061 if (!rc)
2062 priv->radio_on = enable;
2063
2064 return rc;
2065 }
2066
2067 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2068 {
2069 return mwl8k_cmd_radio_control(hw, 0, 0);
2070 }
2071
2072 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2073 {
2074 return mwl8k_cmd_radio_control(hw, 1, 0);
2075 }
2076
2077 static int
2078 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2079 {
2080 struct mwl8k_priv *priv = hw->priv;
2081
2082 priv->radio_short_preamble = short_preamble;
2083
2084 return mwl8k_cmd_radio_control(hw, 1, 1);
2085 }
2086
2087 /*
2088 * CMD_RF_TX_POWER.
2089 */
2090 #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
2091
2092 struct mwl8k_cmd_rf_tx_power {
2093 struct mwl8k_cmd_pkt header;
2094 __le16 action;
2095 __le16 support_level;
2096 __le16 current_level;
2097 __le16 reserved;
2098 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
2099 } __packed;
2100
2101 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2102 {
2103 struct mwl8k_cmd_rf_tx_power *cmd;
2104 int rc;
2105
2106 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2107 if (cmd == NULL)
2108 return -ENOMEM;
2109
2110 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2111 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2112 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2113 cmd->support_level = cpu_to_le16(dBm);
2114
2115 rc = mwl8k_post_cmd(hw, &cmd->header);
2116 kfree(cmd);
2117
2118 return rc;
2119 }
2120
2121 /*
2122 * CMD_TX_POWER.
2123 */
2124 #define MWL8K_TX_POWER_LEVEL_TOTAL 12
2125
2126 struct mwl8k_cmd_tx_power {
2127 struct mwl8k_cmd_pkt header;
2128 __le16 action;
2129 __le16 band;
2130 __le16 channel;
2131 __le16 bw;
2132 __le16 sub_ch;
2133 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2134 } __attribute__((packed));
2135
2136 static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2137 struct ieee80211_conf *conf,
2138 unsigned short pwr)
2139 {
2140 struct ieee80211_channel *channel = conf->channel;
2141 struct mwl8k_cmd_tx_power *cmd;
2142 int rc;
2143 int i;
2144
2145 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2146 if (cmd == NULL)
2147 return -ENOMEM;
2148
2149 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2150 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2151 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2152
2153 if (channel->band == IEEE80211_BAND_2GHZ)
2154 cmd->band = cpu_to_le16(0x1);
2155 else if (channel->band == IEEE80211_BAND_5GHZ)
2156 cmd->band = cpu_to_le16(0x4);
2157
2158 cmd->channel = channel->hw_value;
2159
2160 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2161 conf->channel_type == NL80211_CHAN_HT20) {
2162 cmd->bw = cpu_to_le16(0x2);
2163 } else {
2164 cmd->bw = cpu_to_le16(0x4);
2165 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2166 cmd->sub_ch = cpu_to_le16(0x3);
2167 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2168 cmd->sub_ch = cpu_to_le16(0x1);
2169 }
2170
2171 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2172 cmd->power_level_list[i] = cpu_to_le16(pwr);
2173
2174 rc = mwl8k_post_cmd(hw, &cmd->header);
2175 kfree(cmd);
2176
2177 return rc;
2178 }
2179
2180 /*
2181 * CMD_RF_ANTENNA.
2182 */
2183 struct mwl8k_cmd_rf_antenna {
2184 struct mwl8k_cmd_pkt header;
2185 __le16 antenna;
2186 __le16 mode;
2187 } __packed;
2188
2189 #define MWL8K_RF_ANTENNA_RX 1
2190 #define MWL8K_RF_ANTENNA_TX 2
2191
2192 static int
2193 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2194 {
2195 struct mwl8k_cmd_rf_antenna *cmd;
2196 int rc;
2197
2198 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2199 if (cmd == NULL)
2200 return -ENOMEM;
2201
2202 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2203 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2204 cmd->antenna = cpu_to_le16(antenna);
2205 cmd->mode = cpu_to_le16(mask);
2206
2207 rc = mwl8k_post_cmd(hw, &cmd->header);
2208 kfree(cmd);
2209
2210 return rc;
2211 }
2212
2213 /*
2214 * CMD_SET_BEACON.
2215 */
2216 struct mwl8k_cmd_set_beacon {
2217 struct mwl8k_cmd_pkt header;
2218 __le16 beacon_len;
2219 __u8 beacon[0];
2220 };
2221
2222 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2223 struct ieee80211_vif *vif, u8 *beacon, int len)
2224 {
2225 struct mwl8k_cmd_set_beacon *cmd;
2226 int rc;
2227
2228 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2229 if (cmd == NULL)
2230 return -ENOMEM;
2231
2232 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2233 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2234 cmd->beacon_len = cpu_to_le16(len);
2235 memcpy(cmd->beacon, beacon, len);
2236
2237 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2238 kfree(cmd);
2239
2240 return rc;
2241 }
2242
2243 /*
2244 * CMD_SET_PRE_SCAN.
2245 */
2246 struct mwl8k_cmd_set_pre_scan {
2247 struct mwl8k_cmd_pkt header;
2248 } __packed;
2249
2250 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2251 {
2252 struct mwl8k_cmd_set_pre_scan *cmd;
2253 int rc;
2254
2255 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2256 if (cmd == NULL)
2257 return -ENOMEM;
2258
2259 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2260 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2261
2262 rc = mwl8k_post_cmd(hw, &cmd->header);
2263 kfree(cmd);
2264
2265 return rc;
2266 }
2267
2268 /*
2269 * CMD_SET_POST_SCAN.
2270 */
2271 struct mwl8k_cmd_set_post_scan {
2272 struct mwl8k_cmd_pkt header;
2273 __le32 isibss;
2274 __u8 bssid[ETH_ALEN];
2275 } __packed;
2276
2277 static int
2278 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2279 {
2280 struct mwl8k_cmd_set_post_scan *cmd;
2281 int rc;
2282
2283 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2284 if (cmd == NULL)
2285 return -ENOMEM;
2286
2287 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2288 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2289 cmd->isibss = 0;
2290 memcpy(cmd->bssid, mac, ETH_ALEN);
2291
2292 rc = mwl8k_post_cmd(hw, &cmd->header);
2293 kfree(cmd);
2294
2295 return rc;
2296 }
2297
2298 /*
2299 * CMD_SET_RF_CHANNEL.
2300 */
2301 struct mwl8k_cmd_set_rf_channel {
2302 struct mwl8k_cmd_pkt header;
2303 __le16 action;
2304 __u8 current_channel;
2305 __le32 channel_flags;
2306 } __packed;
2307
2308 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2309 struct ieee80211_conf *conf)
2310 {
2311 struct ieee80211_channel *channel = conf->channel;
2312 struct mwl8k_cmd_set_rf_channel *cmd;
2313 int rc;
2314
2315 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2316 if (cmd == NULL)
2317 return -ENOMEM;
2318
2319 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2320 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2321 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2322 cmd->current_channel = channel->hw_value;
2323
2324 if (channel->band == IEEE80211_BAND_2GHZ)
2325 cmd->channel_flags |= cpu_to_le32(0x00000001);
2326 else if (channel->band == IEEE80211_BAND_5GHZ)
2327 cmd->channel_flags |= cpu_to_le32(0x00000004);
2328
2329 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2330 conf->channel_type == NL80211_CHAN_HT20)
2331 cmd->channel_flags |= cpu_to_le32(0x00000080);
2332 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2333 cmd->channel_flags |= cpu_to_le32(0x000001900);
2334 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2335 cmd->channel_flags |= cpu_to_le32(0x000000900);
2336
2337 rc = mwl8k_post_cmd(hw, &cmd->header);
2338 kfree(cmd);
2339
2340 return rc;
2341 }
2342
2343 /*
2344 * CMD_SET_AID.
2345 */
2346 #define MWL8K_FRAME_PROT_DISABLED 0x00
2347 #define MWL8K_FRAME_PROT_11G 0x07
2348 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2349 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2350
2351 struct mwl8k_cmd_update_set_aid {
2352 struct mwl8k_cmd_pkt header;
2353 __le16 aid;
2354
2355 /* AP's MAC address (BSSID) */
2356 __u8 bssid[ETH_ALEN];
2357 __le16 protection_mode;
2358 __u8 supp_rates[14];
2359 } __packed;
2360
2361 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2362 {
2363 int i;
2364 int j;
2365
2366 /*
2367 * Clear nonstandard rates 4 and 13.
2368 */
2369 mask &= 0x1fef;
2370
2371 for (i = 0, j = 0; i < 14; i++) {
2372 if (mask & (1 << i))
2373 rates[j++] = mwl8k_rates_24[i].hw_value;
2374 }
2375 }
2376
2377 static int
2378 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2379 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2380 {
2381 struct mwl8k_cmd_update_set_aid *cmd;
2382 u16 prot_mode;
2383 int rc;
2384
2385 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2386 if (cmd == NULL)
2387 return -ENOMEM;
2388
2389 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2390 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2391 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2392 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2393
2394 if (vif->bss_conf.use_cts_prot) {
2395 prot_mode = MWL8K_FRAME_PROT_11G;
2396 } else {
2397 switch (vif->bss_conf.ht_operation_mode &
2398 IEEE80211_HT_OP_MODE_PROTECTION) {
2399 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2400 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2401 break;
2402 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2403 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2404 break;
2405 default:
2406 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2407 break;
2408 }
2409 }
2410 cmd->protection_mode = cpu_to_le16(prot_mode);
2411
2412 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2413
2414 rc = mwl8k_post_cmd(hw, &cmd->header);
2415 kfree(cmd);
2416
2417 return rc;
2418 }
2419
2420 /*
2421 * CMD_SET_RATE.
2422 */
2423 struct mwl8k_cmd_set_rate {
2424 struct mwl8k_cmd_pkt header;
2425 __u8 legacy_rates[14];
2426
2427 /* Bitmap for supported MCS codes. */
2428 __u8 mcs_set[16];
2429 __u8 reserved[16];
2430 } __packed;
2431
2432 static int
2433 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2434 u32 legacy_rate_mask, u8 *mcs_rates)
2435 {
2436 struct mwl8k_cmd_set_rate *cmd;
2437 int rc;
2438
2439 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2440 if (cmd == NULL)
2441 return -ENOMEM;
2442
2443 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2444 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2445 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2446 memcpy(cmd->mcs_set, mcs_rates, 16);
2447
2448 rc = mwl8k_post_cmd(hw, &cmd->header);
2449 kfree(cmd);
2450
2451 return rc;
2452 }
2453
2454 /*
2455 * CMD_FINALIZE_JOIN.
2456 */
2457 #define MWL8K_FJ_BEACON_MAXLEN 128
2458
2459 struct mwl8k_cmd_finalize_join {
2460 struct mwl8k_cmd_pkt header;
2461 __le32 sleep_interval; /* Number of beacon periods to sleep */
2462 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2463 } __packed;
2464
2465 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2466 int framelen, int dtim)
2467 {
2468 struct mwl8k_cmd_finalize_join *cmd;
2469 struct ieee80211_mgmt *payload = frame;
2470 int payload_len;
2471 int rc;
2472
2473 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2474 if (cmd == NULL)
2475 return -ENOMEM;
2476
2477 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2478 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2479 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2480
2481 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2482 if (payload_len < 0)
2483 payload_len = 0;
2484 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2485 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2486
2487 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2488
2489 rc = mwl8k_post_cmd(hw, &cmd->header);
2490 kfree(cmd);
2491
2492 return rc;
2493 }
2494
2495 /*
2496 * CMD_SET_RTS_THRESHOLD.
2497 */
2498 struct mwl8k_cmd_set_rts_threshold {
2499 struct mwl8k_cmd_pkt header;
2500 __le16 action;
2501 __le16 threshold;
2502 } __packed;
2503
2504 static int
2505 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2506 {
2507 struct mwl8k_cmd_set_rts_threshold *cmd;
2508 int rc;
2509
2510 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2511 if (cmd == NULL)
2512 return -ENOMEM;
2513
2514 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2515 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2516 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2517 cmd->threshold = cpu_to_le16(rts_thresh);
2518
2519 rc = mwl8k_post_cmd(hw, &cmd->header);
2520 kfree(cmd);
2521
2522 return rc;
2523 }
2524
2525 /*
2526 * CMD_SET_SLOT.
2527 */
2528 struct mwl8k_cmd_set_slot {
2529 struct mwl8k_cmd_pkt header;
2530 __le16 action;
2531 __u8 short_slot;
2532 } __packed;
2533
2534 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2535 {
2536 struct mwl8k_cmd_set_slot *cmd;
2537 int rc;
2538
2539 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2540 if (cmd == NULL)
2541 return -ENOMEM;
2542
2543 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2544 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2545 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2546 cmd->short_slot = short_slot_time;
2547
2548 rc = mwl8k_post_cmd(hw, &cmd->header);
2549 kfree(cmd);
2550
2551 return rc;
2552 }
2553
2554 /*
2555 * CMD_SET_EDCA_PARAMS.
2556 */
2557 struct mwl8k_cmd_set_edca_params {
2558 struct mwl8k_cmd_pkt header;
2559
2560 /* See MWL8K_SET_EDCA_XXX below */
2561 __le16 action;
2562
2563 /* TX opportunity in units of 32 us */
2564 __le16 txop;
2565
2566 union {
2567 struct {
2568 /* Log exponent of max contention period: 0...15 */
2569 __le32 log_cw_max;
2570
2571 /* Log exponent of min contention period: 0...15 */
2572 __le32 log_cw_min;
2573
2574 /* Adaptive interframe spacing in units of 32us */
2575 __u8 aifs;
2576
2577 /* TX queue to configure */
2578 __u8 txq;
2579 } ap;
2580 struct {
2581 /* Log exponent of max contention period: 0...15 */
2582 __u8 log_cw_max;
2583
2584 /* Log exponent of min contention period: 0...15 */
2585 __u8 log_cw_min;
2586
2587 /* Adaptive interframe spacing in units of 32us */
2588 __u8 aifs;
2589
2590 /* TX queue to configure */
2591 __u8 txq;
2592 } sta;
2593 };
2594 } __packed;
2595
2596 #define MWL8K_SET_EDCA_CW 0x01
2597 #define MWL8K_SET_EDCA_TXOP 0x02
2598 #define MWL8K_SET_EDCA_AIFS 0x04
2599
2600 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2601 MWL8K_SET_EDCA_TXOP | \
2602 MWL8K_SET_EDCA_AIFS)
2603
2604 static int
2605 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2606 __u16 cw_min, __u16 cw_max,
2607 __u8 aifs, __u16 txop)
2608 {
2609 struct mwl8k_priv *priv = hw->priv;
2610 struct mwl8k_cmd_set_edca_params *cmd;
2611 int rc;
2612
2613 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2614 if (cmd == NULL)
2615 return -ENOMEM;
2616
2617 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2618 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2619 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2620 cmd->txop = cpu_to_le16(txop);
2621 if (priv->ap_fw) {
2622 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2623 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2624 cmd->ap.aifs = aifs;
2625 cmd->ap.txq = qnum;
2626 } else {
2627 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2628 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2629 cmd->sta.aifs = aifs;
2630 cmd->sta.txq = qnum;
2631 }
2632
2633 rc = mwl8k_post_cmd(hw, &cmd->header);
2634 kfree(cmd);
2635
2636 return rc;
2637 }
2638
2639 /*
2640 * CMD_SET_WMM_MODE.
2641 */
2642 struct mwl8k_cmd_set_wmm_mode {
2643 struct mwl8k_cmd_pkt header;
2644 __le16 action;
2645 } __packed;
2646
2647 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2648 {
2649 struct mwl8k_priv *priv = hw->priv;
2650 struct mwl8k_cmd_set_wmm_mode *cmd;
2651 int rc;
2652
2653 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2654 if (cmd == NULL)
2655 return -ENOMEM;
2656
2657 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2658 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2659 cmd->action = cpu_to_le16(!!enable);
2660
2661 rc = mwl8k_post_cmd(hw, &cmd->header);
2662 kfree(cmd);
2663
2664 if (!rc)
2665 priv->wmm_enabled = enable;
2666
2667 return rc;
2668 }
2669
2670 /*
2671 * CMD_MIMO_CONFIG.
2672 */
2673 struct mwl8k_cmd_mimo_config {
2674 struct mwl8k_cmd_pkt header;
2675 __le32 action;
2676 __u8 rx_antenna_map;
2677 __u8 tx_antenna_map;
2678 } __packed;
2679
2680 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2681 {
2682 struct mwl8k_cmd_mimo_config *cmd;
2683 int rc;
2684
2685 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2686 if (cmd == NULL)
2687 return -ENOMEM;
2688
2689 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2690 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2691 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2692 cmd->rx_antenna_map = rx;
2693 cmd->tx_antenna_map = tx;
2694
2695 rc = mwl8k_post_cmd(hw, &cmd->header);
2696 kfree(cmd);
2697
2698 return rc;
2699 }
2700
2701 /*
2702 * CMD_USE_FIXED_RATE (STA version).
2703 */
2704 struct mwl8k_cmd_use_fixed_rate_sta {
2705 struct mwl8k_cmd_pkt header;
2706 __le32 action;
2707 __le32 allow_rate_drop;
2708 __le32 num_rates;
2709 struct {
2710 __le32 is_ht_rate;
2711 __le32 enable_retry;
2712 __le32 rate;
2713 __le32 retry_count;
2714 } rate_entry[8];
2715 __le32 rate_type;
2716 __le32 reserved1;
2717 __le32 reserved2;
2718 } __packed;
2719
2720 #define MWL8K_USE_AUTO_RATE 0x0002
2721 #define MWL8K_UCAST_RATE 0
2722
2723 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2724 {
2725 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2726 int rc;
2727
2728 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2729 if (cmd == NULL)
2730 return -ENOMEM;
2731
2732 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2733 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2734 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2735 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2736
2737 rc = mwl8k_post_cmd(hw, &cmd->header);
2738 kfree(cmd);
2739
2740 return rc;
2741 }
2742
2743 /*
2744 * CMD_USE_FIXED_RATE (AP version).
2745 */
2746 struct mwl8k_cmd_use_fixed_rate_ap {
2747 struct mwl8k_cmd_pkt header;
2748 __le32 action;
2749 __le32 allow_rate_drop;
2750 __le32 num_rates;
2751 struct mwl8k_rate_entry_ap {
2752 __le32 is_ht_rate;
2753 __le32 enable_retry;
2754 __le32 rate;
2755 __le32 retry_count;
2756 } rate_entry[4];
2757 u8 multicast_rate;
2758 u8 multicast_rate_type;
2759 u8 management_rate;
2760 } __packed;
2761
2762 static int
2763 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2764 {
2765 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2766 int rc;
2767
2768 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2769 if (cmd == NULL)
2770 return -ENOMEM;
2771
2772 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2773 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2774 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2775 cmd->multicast_rate = mcast;
2776 cmd->management_rate = mgmt;
2777
2778 rc = mwl8k_post_cmd(hw, &cmd->header);
2779 kfree(cmd);
2780
2781 return rc;
2782 }
2783
2784 /*
2785 * CMD_ENABLE_SNIFFER.
2786 */
2787 struct mwl8k_cmd_enable_sniffer {
2788 struct mwl8k_cmd_pkt header;
2789 __le32 action;
2790 } __packed;
2791
2792 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2793 {
2794 struct mwl8k_cmd_enable_sniffer *cmd;
2795 int rc;
2796
2797 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2798 if (cmd == NULL)
2799 return -ENOMEM;
2800
2801 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2802 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2803 cmd->action = cpu_to_le32(!!enable);
2804
2805 rc = mwl8k_post_cmd(hw, &cmd->header);
2806 kfree(cmd);
2807
2808 return rc;
2809 }
2810
2811 /*
2812 * CMD_SET_MAC_ADDR.
2813 */
2814 struct mwl8k_cmd_set_mac_addr {
2815 struct mwl8k_cmd_pkt header;
2816 union {
2817 struct {
2818 __le16 mac_type;
2819 __u8 mac_addr[ETH_ALEN];
2820 } mbss;
2821 __u8 mac_addr[ETH_ALEN];
2822 };
2823 } __packed;
2824
2825 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2826 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2827 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2828 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2829
2830 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2831 struct ieee80211_vif *vif, u8 *mac)
2832 {
2833 struct mwl8k_priv *priv = hw->priv;
2834 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2835 struct mwl8k_cmd_set_mac_addr *cmd;
2836 int mac_type;
2837 int rc;
2838
2839 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2840 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2841 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2842 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2843 else
2844 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2845 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2846 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2847 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2848 else
2849 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2850 }
2851
2852 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2853 if (cmd == NULL)
2854 return -ENOMEM;
2855
2856 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2857 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2858 if (priv->ap_fw) {
2859 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2860 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2861 } else {
2862 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2863 }
2864
2865 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2866 kfree(cmd);
2867
2868 return rc;
2869 }
2870
2871 /*
2872 * CMD_SET_RATEADAPT_MODE.
2873 */
2874 struct mwl8k_cmd_set_rate_adapt_mode {
2875 struct mwl8k_cmd_pkt header;
2876 __le16 action;
2877 __le16 mode;
2878 } __packed;
2879
2880 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2881 {
2882 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2883 int rc;
2884
2885 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2886 if (cmd == NULL)
2887 return -ENOMEM;
2888
2889 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2890 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2891 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2892 cmd->mode = cpu_to_le16(mode);
2893
2894 rc = mwl8k_post_cmd(hw, &cmd->header);
2895 kfree(cmd);
2896
2897 return rc;
2898 }
2899
2900 /*
2901 * CMD_BSS_START.
2902 */
2903 struct mwl8k_cmd_bss_start {
2904 struct mwl8k_cmd_pkt header;
2905 __le32 enable;
2906 } __packed;
2907
2908 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2909 struct ieee80211_vif *vif, int enable)
2910 {
2911 struct mwl8k_cmd_bss_start *cmd;
2912 int rc;
2913
2914 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2915 if (cmd == NULL)
2916 return -ENOMEM;
2917
2918 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2919 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2920 cmd->enable = cpu_to_le32(enable);
2921
2922 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2923 kfree(cmd);
2924
2925 return rc;
2926 }
2927
2928 /*
2929 * CMD_SET_NEW_STN.
2930 */
2931 struct mwl8k_cmd_set_new_stn {
2932 struct mwl8k_cmd_pkt header;
2933 __le16 aid;
2934 __u8 mac_addr[6];
2935 __le16 stn_id;
2936 __le16 action;
2937 __le16 rsvd;
2938 __le32 legacy_rates;
2939 __u8 ht_rates[4];
2940 __le16 cap_info;
2941 __le16 ht_capabilities_info;
2942 __u8 mac_ht_param_info;
2943 __u8 rev;
2944 __u8 control_channel;
2945 __u8 add_channel;
2946 __le16 op_mode;
2947 __le16 stbc;
2948 __u8 add_qos_info;
2949 __u8 is_qos_sta;
2950 __le32 fw_sta_ptr;
2951 } __packed;
2952
2953 #define MWL8K_STA_ACTION_ADD 0
2954 #define MWL8K_STA_ACTION_REMOVE 2
2955
2956 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2957 struct ieee80211_vif *vif,
2958 struct ieee80211_sta *sta)
2959 {
2960 struct mwl8k_cmd_set_new_stn *cmd;
2961 u32 rates;
2962 int rc;
2963
2964 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2965 if (cmd == NULL)
2966 return -ENOMEM;
2967
2968 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2969 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2970 cmd->aid = cpu_to_le16(sta->aid);
2971 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2972 cmd->stn_id = cpu_to_le16(sta->aid);
2973 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2974 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2975 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2976 else
2977 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2978 cmd->legacy_rates = cpu_to_le32(rates);
2979 if (sta->ht_cap.ht_supported) {
2980 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2981 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2982 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2983 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2984 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2985 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2986 ((sta->ht_cap.ampdu_density & 7) << 2);
2987 cmd->is_qos_sta = 1;
2988 }
2989
2990 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2991 kfree(cmd);
2992
2993 return rc;
2994 }
2995
2996 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2997 struct ieee80211_vif *vif)
2998 {
2999 struct mwl8k_cmd_set_new_stn *cmd;
3000 int rc;
3001
3002 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3003 if (cmd == NULL)
3004 return -ENOMEM;
3005
3006 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3007 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3008 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3009
3010 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3011 kfree(cmd);
3012
3013 return rc;
3014 }
3015
3016 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3017 struct ieee80211_vif *vif, u8 *addr)
3018 {
3019 struct mwl8k_cmd_set_new_stn *cmd;
3020 int rc;
3021
3022 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3023 if (cmd == NULL)
3024 return -ENOMEM;
3025
3026 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3027 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3028 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3029 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3030
3031 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3032 kfree(cmd);
3033
3034 return rc;
3035 }
3036
3037 /*
3038 * CMD_UPDATE_STADB.
3039 */
3040 struct ewc_ht_info {
3041 __le16 control1;
3042 __le16 control2;
3043 __le16 control3;
3044 } __packed;
3045
3046 struct peer_capability_info {
3047 /* Peer type - AP vs. STA. */
3048 __u8 peer_type;
3049
3050 /* Basic 802.11 capabilities from assoc resp. */
3051 __le16 basic_caps;
3052
3053 /* Set if peer supports 802.11n high throughput (HT). */
3054 __u8 ht_support;
3055
3056 /* Valid if HT is supported. */
3057 __le16 ht_caps;
3058 __u8 extended_ht_caps;
3059 struct ewc_ht_info ewc_info;
3060
3061 /* Legacy rate table. Intersection of our rates and peer rates. */
3062 __u8 legacy_rates[12];
3063
3064 /* HT rate table. Intersection of our rates and peer rates. */
3065 __u8 ht_rates[16];
3066 __u8 pad[16];
3067
3068 /* If set, interoperability mode, no proprietary extensions. */
3069 __u8 interop;
3070 __u8 pad2;
3071 __u8 station_id;
3072 __le16 amsdu_enabled;
3073 } __packed;
3074
3075 struct mwl8k_cmd_update_stadb {
3076 struct mwl8k_cmd_pkt header;
3077
3078 /* See STADB_ACTION_TYPE */
3079 __le32 action;
3080
3081 /* Peer MAC address */
3082 __u8 peer_addr[ETH_ALEN];
3083
3084 __le32 reserved;
3085
3086 /* Peer info - valid during add/update. */
3087 struct peer_capability_info peer_info;
3088 } __packed;
3089
3090 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3091 #define MWL8K_STA_DB_DEL_ENTRY 2
3092
3093 /* Peer Entry flags - used to define the type of the peer node */
3094 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3095
3096 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3097 struct ieee80211_vif *vif,
3098 struct ieee80211_sta *sta)
3099 {
3100 struct mwl8k_cmd_update_stadb *cmd;
3101 struct peer_capability_info *p;
3102 u32 rates;
3103 int rc;
3104
3105 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3106 if (cmd == NULL)
3107 return -ENOMEM;
3108
3109 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3110 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3111 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3112 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3113
3114 p = &cmd->peer_info;
3115 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3116 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3117 p->ht_support = sta->ht_cap.ht_supported;
3118 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
3119 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3120 ((sta->ht_cap.ampdu_density & 7) << 2);
3121 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3122 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3123 else
3124 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3125 legacy_rate_mask_to_array(p->legacy_rates, rates);
3126 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3127 p->interop = 1;
3128 p->amsdu_enabled = 0;
3129
3130 rc = mwl8k_post_cmd(hw, &cmd->header);
3131 kfree(cmd);
3132
3133 return rc ? rc : p->station_id;
3134 }
3135
3136 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3137 struct ieee80211_vif *vif, u8 *addr)
3138 {
3139 struct mwl8k_cmd_update_stadb *cmd;
3140 int rc;
3141
3142 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3143 if (cmd == NULL)
3144 return -ENOMEM;
3145
3146 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3147 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3148 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3149 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3150
3151 rc = mwl8k_post_cmd(hw, &cmd->header);
3152 kfree(cmd);
3153
3154 return rc;
3155 }
3156
3157
3158 /*
3159 * Interrupt handling.
3160 */
3161 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3162 {
3163 struct ieee80211_hw *hw = dev_id;
3164 struct mwl8k_priv *priv = hw->priv;
3165 u32 status;
3166
3167 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3168 if (!status)
3169 return IRQ_NONE;
3170
3171 if (status & MWL8K_A2H_INT_TX_DONE) {
3172 status &= ~MWL8K_A2H_INT_TX_DONE;
3173 tasklet_schedule(&priv->poll_tx_task);
3174 }
3175
3176 if (status & MWL8K_A2H_INT_RX_READY) {
3177 status &= ~MWL8K_A2H_INT_RX_READY;
3178 tasklet_schedule(&priv->poll_rx_task);
3179 }
3180
3181 if (status)
3182 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3183
3184 if (status & MWL8K_A2H_INT_OPC_DONE) {
3185 if (priv->hostcmd_wait != NULL)
3186 complete(priv->hostcmd_wait);
3187 }
3188
3189 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3190 if (!mutex_is_locked(&priv->fw_mutex) &&
3191 priv->radio_on && priv->pending_tx_pkts)
3192 mwl8k_tx_start(priv);
3193 }
3194
3195 return IRQ_HANDLED;
3196 }
3197
3198 static void mwl8k_tx_poll(unsigned long data)
3199 {
3200 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3201 struct mwl8k_priv *priv = hw->priv;
3202 int limit;
3203 int i;
3204
3205 limit = 32;
3206
3207 spin_lock_bh(&priv->tx_lock);
3208
3209 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3210 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3211
3212 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3213 complete(priv->tx_wait);
3214 priv->tx_wait = NULL;
3215 }
3216
3217 spin_unlock_bh(&priv->tx_lock);
3218
3219 if (limit) {
3220 writel(~MWL8K_A2H_INT_TX_DONE,
3221 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3222 } else {
3223 tasklet_schedule(&priv->poll_tx_task);
3224 }
3225 }
3226
3227 static void mwl8k_rx_poll(unsigned long data)
3228 {
3229 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3230 struct mwl8k_priv *priv = hw->priv;
3231 int limit;
3232
3233 limit = 32;
3234 limit -= rxq_process(hw, 0, limit);
3235 limit -= rxq_refill(hw, 0, limit);
3236
3237 if (limit) {
3238 writel(~MWL8K_A2H_INT_RX_READY,
3239 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3240 } else {
3241 tasklet_schedule(&priv->poll_rx_task);
3242 }
3243 }
3244
3245
3246 /*
3247 * Core driver operations.
3248 */
3249 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3250 {
3251 struct mwl8k_priv *priv = hw->priv;
3252 int index = skb_get_queue_mapping(skb);
3253 int rc;
3254
3255 if (!priv->radio_on) {
3256 wiphy_debug(hw->wiphy,
3257 "dropped TX frame since radio disabled\n");
3258 dev_kfree_skb(skb);
3259 return NETDEV_TX_OK;
3260 }
3261
3262 rc = mwl8k_txq_xmit(hw, index, skb);
3263
3264 return rc;
3265 }
3266
3267 static int mwl8k_start(struct ieee80211_hw *hw)
3268 {
3269 struct mwl8k_priv *priv = hw->priv;
3270 int rc;
3271
3272 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3273 IRQF_SHARED, MWL8K_NAME, hw);
3274 if (rc) {
3275 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
3276 return -EIO;
3277 }
3278
3279 /* Enable TX reclaim and RX tasklets. */
3280 tasklet_enable(&priv->poll_tx_task);
3281 tasklet_enable(&priv->poll_rx_task);
3282
3283 /* Enable interrupts */
3284 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3285
3286 rc = mwl8k_fw_lock(hw);
3287 if (!rc) {
3288 rc = mwl8k_cmd_radio_enable(hw);
3289
3290 if (!priv->ap_fw) {
3291 if (!rc)
3292 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3293
3294 if (!rc)
3295 rc = mwl8k_cmd_set_pre_scan(hw);
3296
3297 if (!rc)
3298 rc = mwl8k_cmd_set_post_scan(hw,
3299 "\x00\x00\x00\x00\x00\x00");
3300 }
3301
3302 if (!rc)
3303 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3304
3305 if (!rc)
3306 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3307
3308 mwl8k_fw_unlock(hw);
3309 }
3310
3311 if (rc) {
3312 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3313 free_irq(priv->pdev->irq, hw);
3314 tasklet_disable(&priv->poll_tx_task);
3315 tasklet_disable(&priv->poll_rx_task);
3316 }
3317
3318 return rc;
3319 }
3320
3321 static void mwl8k_stop(struct ieee80211_hw *hw)
3322 {
3323 struct mwl8k_priv *priv = hw->priv;
3324 int i;
3325
3326 mwl8k_cmd_radio_disable(hw);
3327
3328 ieee80211_stop_queues(hw);
3329
3330 /* Disable interrupts */
3331 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3332 free_irq(priv->pdev->irq, hw);
3333
3334 /* Stop finalize join worker */
3335 cancel_work_sync(&priv->finalize_join_worker);
3336 if (priv->beacon_skb != NULL)
3337 dev_kfree_skb(priv->beacon_skb);
3338
3339 /* Stop TX reclaim and RX tasklets. */
3340 tasklet_disable(&priv->poll_tx_task);
3341 tasklet_disable(&priv->poll_rx_task);
3342
3343 /* Return all skbs to mac80211 */
3344 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3345 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3346 }
3347
3348 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3349 struct ieee80211_vif *vif)
3350 {
3351 struct mwl8k_priv *priv = hw->priv;
3352 struct mwl8k_vif *mwl8k_vif;
3353 u32 macids_supported;
3354 int macid;
3355
3356 /*
3357 * Reject interface creation if sniffer mode is active, as
3358 * STA operation is mutually exclusive with hardware sniffer
3359 * mode. (Sniffer mode is only used on STA firmware.)
3360 */
3361 if (priv->sniffer_enabled) {
3362 wiphy_info(hw->wiphy,
3363 "unable to create STA interface because sniffer mode is enabled\n");
3364 return -EINVAL;
3365 }
3366
3367
3368 switch (vif->type) {
3369 case NL80211_IFTYPE_AP:
3370 macids_supported = priv->ap_macids_supported;
3371 break;
3372 case NL80211_IFTYPE_STATION:
3373 macids_supported = priv->sta_macids_supported;
3374 break;
3375 default:
3376 return -EINVAL;
3377 }
3378
3379 macid = ffs(macids_supported & ~priv->macids_used);
3380 if (!macid--)
3381 return -EBUSY;
3382
3383 /* Setup driver private area. */
3384 mwl8k_vif = MWL8K_VIF(vif);
3385 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3386 mwl8k_vif->vif = vif;
3387 mwl8k_vif->macid = macid;
3388 mwl8k_vif->seqno = 0;
3389
3390 /* Set the mac address. */
3391 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3392
3393 if (priv->ap_fw)
3394 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3395
3396 priv->macids_used |= 1 << mwl8k_vif->macid;
3397 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3398
3399 return 0;
3400 }
3401
3402 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3403 struct ieee80211_vif *vif)
3404 {
3405 struct mwl8k_priv *priv = hw->priv;
3406 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3407
3408 if (priv->ap_fw)
3409 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3410
3411 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3412
3413 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3414 list_del(&mwl8k_vif->list);
3415 }
3416
3417 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3418 {
3419 struct ieee80211_conf *conf = &hw->conf;
3420 struct mwl8k_priv *priv = hw->priv;
3421 int rc;
3422
3423 if (conf->flags & IEEE80211_CONF_IDLE) {
3424 mwl8k_cmd_radio_disable(hw);
3425 return 0;
3426 }
3427
3428 rc = mwl8k_fw_lock(hw);
3429 if (rc)
3430 return rc;
3431
3432 rc = mwl8k_cmd_radio_enable(hw);
3433 if (rc)
3434 goto out;
3435
3436 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3437 if (rc)
3438 goto out;
3439
3440 if (conf->power_level > 18)
3441 conf->power_level = 18;
3442
3443 if (priv->ap_fw) {
3444 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
3445 if (rc)
3446 goto out;
3447
3448 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3449 if (!rc)
3450 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3451 } else {
3452 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3453 if (rc)
3454 goto out;
3455 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3456 }
3457
3458 out:
3459 mwl8k_fw_unlock(hw);
3460
3461 return rc;
3462 }
3463
3464 static void
3465 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3466 struct ieee80211_bss_conf *info, u32 changed)
3467 {
3468 struct mwl8k_priv *priv = hw->priv;
3469 u32 ap_legacy_rates;
3470 u8 ap_mcs_rates[16];
3471 int rc;
3472
3473 if (mwl8k_fw_lock(hw))
3474 return;
3475
3476 /*
3477 * No need to capture a beacon if we're no longer associated.
3478 */
3479 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3480 priv->capture_beacon = false;
3481
3482 /*
3483 * Get the AP's legacy and MCS rates.
3484 */
3485 if (vif->bss_conf.assoc) {
3486 struct ieee80211_sta *ap;
3487
3488 rcu_read_lock();
3489
3490 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3491 if (ap == NULL) {
3492 rcu_read_unlock();
3493 goto out;
3494 }
3495
3496 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3497 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3498 } else {
3499 ap_legacy_rates =
3500 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3501 }
3502 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3503
3504 rcu_read_unlock();
3505 }
3506
3507 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3508 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3509 if (rc)
3510 goto out;
3511
3512 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3513 if (rc)
3514 goto out;
3515 }
3516
3517 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3518 rc = mwl8k_set_radio_preamble(hw,
3519 vif->bss_conf.use_short_preamble);
3520 if (rc)
3521 goto out;
3522 }
3523
3524 if (changed & BSS_CHANGED_ERP_SLOT) {
3525 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3526 if (rc)
3527 goto out;
3528 }
3529
3530 if (vif->bss_conf.assoc &&
3531 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3532 BSS_CHANGED_HT))) {
3533 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3534 if (rc)
3535 goto out;
3536 }
3537
3538 if (vif->bss_conf.assoc &&
3539 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3540 /*
3541 * Finalize the join. Tell rx handler to process
3542 * next beacon from our BSSID.
3543 */
3544 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3545 priv->capture_beacon = true;
3546 }
3547
3548 out:
3549 mwl8k_fw_unlock(hw);
3550 }
3551
3552 static void
3553 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3554 struct ieee80211_bss_conf *info, u32 changed)
3555 {
3556 int rc;
3557
3558 if (mwl8k_fw_lock(hw))
3559 return;
3560
3561 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3562 rc = mwl8k_set_radio_preamble(hw,
3563 vif->bss_conf.use_short_preamble);
3564 if (rc)
3565 goto out;
3566 }
3567
3568 if (changed & BSS_CHANGED_BASIC_RATES) {
3569 int idx;
3570 int rate;
3571
3572 /*
3573 * Use lowest supported basic rate for multicasts
3574 * and management frames (such as probe responses --
3575 * beacons will always go out at 1 Mb/s).
3576 */
3577 idx = ffs(vif->bss_conf.basic_rates);
3578 if (idx)
3579 idx--;
3580
3581 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3582 rate = mwl8k_rates_24[idx].hw_value;
3583 else
3584 rate = mwl8k_rates_50[idx].hw_value;
3585
3586 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3587 }
3588
3589 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3590 struct sk_buff *skb;
3591
3592 skb = ieee80211_beacon_get(hw, vif);
3593 if (skb != NULL) {
3594 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3595 kfree_skb(skb);
3596 }
3597 }
3598
3599 if (changed & BSS_CHANGED_BEACON_ENABLED)
3600 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3601
3602 out:
3603 mwl8k_fw_unlock(hw);
3604 }
3605
3606 static void
3607 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3608 struct ieee80211_bss_conf *info, u32 changed)
3609 {
3610 struct mwl8k_priv *priv = hw->priv;
3611
3612 if (!priv->ap_fw)
3613 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3614 else
3615 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3616 }
3617
3618 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3619 struct netdev_hw_addr_list *mc_list)
3620 {
3621 struct mwl8k_cmd_pkt *cmd;
3622
3623 /*
3624 * Synthesize and return a command packet that programs the
3625 * hardware multicast address filter. At this point we don't
3626 * know whether FIF_ALLMULTI is being requested, but if it is,
3627 * we'll end up throwing this packet away and creating a new
3628 * one in mwl8k_configure_filter().
3629 */
3630 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
3631
3632 return (unsigned long)cmd;
3633 }
3634
3635 static int
3636 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3637 unsigned int changed_flags,
3638 unsigned int *total_flags)
3639 {
3640 struct mwl8k_priv *priv = hw->priv;
3641
3642 /*
3643 * Hardware sniffer mode is mutually exclusive with STA
3644 * operation, so refuse to enable sniffer mode if a STA
3645 * interface is active.
3646 */
3647 if (!list_empty(&priv->vif_list)) {
3648 if (net_ratelimit())
3649 wiphy_info(hw->wiphy,
3650 "not enabling sniffer mode because STA interface is active\n");
3651 return 0;
3652 }
3653
3654 if (!priv->sniffer_enabled) {
3655 if (mwl8k_cmd_enable_sniffer(hw, 1))
3656 return 0;
3657 priv->sniffer_enabled = true;
3658 }
3659
3660 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3661 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3662 FIF_OTHER_BSS;
3663
3664 return 1;
3665 }
3666
3667 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3668 {
3669 if (!list_empty(&priv->vif_list))
3670 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3671
3672 return NULL;
3673 }
3674
3675 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3676 unsigned int changed_flags,
3677 unsigned int *total_flags,
3678 u64 multicast)
3679 {
3680 struct mwl8k_priv *priv = hw->priv;
3681 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3682
3683 /*
3684 * AP firmware doesn't allow fine-grained control over
3685 * the receive filter.
3686 */
3687 if (priv->ap_fw) {
3688 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3689 kfree(cmd);
3690 return;
3691 }
3692
3693 /*
3694 * Enable hardware sniffer mode if FIF_CONTROL or
3695 * FIF_OTHER_BSS is requested.
3696 */
3697 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3698 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3699 kfree(cmd);
3700 return;
3701 }
3702
3703 /* Clear unsupported feature flags */
3704 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3705
3706 if (mwl8k_fw_lock(hw)) {
3707 kfree(cmd);
3708 return;
3709 }
3710
3711 if (priv->sniffer_enabled) {
3712 mwl8k_cmd_enable_sniffer(hw, 0);
3713 priv->sniffer_enabled = false;
3714 }
3715
3716 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3717 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3718 /*
3719 * Disable the BSS filter.
3720 */
3721 mwl8k_cmd_set_pre_scan(hw);
3722 } else {
3723 struct mwl8k_vif *mwl8k_vif;
3724 const u8 *bssid;
3725
3726 /*
3727 * Enable the BSS filter.
3728 *
3729 * If there is an active STA interface, use that
3730 * interface's BSSID, otherwise use a dummy one
3731 * (where the OUI part needs to be nonzero for
3732 * the BSSID to be accepted by POST_SCAN).
3733 */
3734 mwl8k_vif = mwl8k_first_vif(priv);
3735 if (mwl8k_vif != NULL)
3736 bssid = mwl8k_vif->vif->bss_conf.bssid;
3737 else
3738 bssid = "\x01\x00\x00\x00\x00\x00";
3739
3740 mwl8k_cmd_set_post_scan(hw, bssid);
3741 }
3742 }
3743
3744 /*
3745 * If FIF_ALLMULTI is being requested, throw away the command
3746 * packet that ->prepare_multicast() built and replace it with
3747 * a command packet that enables reception of all multicast
3748 * packets.
3749 */
3750 if (*total_flags & FIF_ALLMULTI) {
3751 kfree(cmd);
3752 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
3753 }
3754
3755 if (cmd != NULL) {
3756 mwl8k_post_cmd(hw, cmd);
3757 kfree(cmd);
3758 }
3759
3760 mwl8k_fw_unlock(hw);
3761 }
3762
3763 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3764 {
3765 return mwl8k_cmd_set_rts_threshold(hw, value);
3766 }
3767
3768 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3769 struct ieee80211_vif *vif,
3770 struct ieee80211_sta *sta)
3771 {
3772 struct mwl8k_priv *priv = hw->priv;
3773
3774 if (priv->ap_fw)
3775 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3776 else
3777 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3778 }
3779
3780 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3781 struct ieee80211_vif *vif,
3782 struct ieee80211_sta *sta)
3783 {
3784 struct mwl8k_priv *priv = hw->priv;
3785 int ret;
3786
3787 if (!priv->ap_fw) {
3788 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3789 if (ret >= 0) {
3790 MWL8K_STA(sta)->peer_id = ret;
3791 return 0;
3792 }
3793
3794 return ret;
3795 }
3796
3797 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3798 }
3799
3800 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3801 const struct ieee80211_tx_queue_params *params)
3802 {
3803 struct mwl8k_priv *priv = hw->priv;
3804 int rc;
3805
3806 rc = mwl8k_fw_lock(hw);
3807 if (!rc) {
3808 if (!priv->wmm_enabled)
3809 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3810
3811 if (!rc)
3812 rc = mwl8k_cmd_set_edca_params(hw, queue,
3813 params->cw_min,
3814 params->cw_max,
3815 params->aifs,
3816 params->txop);
3817
3818 mwl8k_fw_unlock(hw);
3819 }
3820
3821 return rc;
3822 }
3823
3824 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3825 struct ieee80211_low_level_stats *stats)
3826 {
3827 return mwl8k_cmd_get_stat(hw, stats);
3828 }
3829
3830 static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
3831 struct survey_info *survey)
3832 {
3833 struct mwl8k_priv *priv = hw->priv;
3834 struct ieee80211_conf *conf = &hw->conf;
3835
3836 if (idx != 0)
3837 return -ENOENT;
3838
3839 survey->channel = conf->channel;
3840 survey->filled = SURVEY_INFO_NOISE_DBM;
3841 survey->noise = priv->noise;
3842
3843 return 0;
3844 }
3845
3846 static int
3847 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3848 enum ieee80211_ampdu_mlme_action action,
3849 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3850 {
3851 switch (action) {
3852 case IEEE80211_AMPDU_RX_START:
3853 case IEEE80211_AMPDU_RX_STOP:
3854 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3855 return -ENOTSUPP;
3856 return 0;
3857 default:
3858 return -ENOTSUPP;
3859 }
3860 }
3861
3862 static const struct ieee80211_ops mwl8k_ops = {
3863 .tx = mwl8k_tx,
3864 .start = mwl8k_start,
3865 .stop = mwl8k_stop,
3866 .add_interface = mwl8k_add_interface,
3867 .remove_interface = mwl8k_remove_interface,
3868 .config = mwl8k_config,
3869 .bss_info_changed = mwl8k_bss_info_changed,
3870 .prepare_multicast = mwl8k_prepare_multicast,
3871 .configure_filter = mwl8k_configure_filter,
3872 .set_rts_threshold = mwl8k_set_rts_threshold,
3873 .sta_add = mwl8k_sta_add,
3874 .sta_remove = mwl8k_sta_remove,
3875 .conf_tx = mwl8k_conf_tx,
3876 .get_stats = mwl8k_get_stats,
3877 .get_survey = mwl8k_get_survey,
3878 .ampdu_action = mwl8k_ampdu_action,
3879 };
3880
3881 static void mwl8k_finalize_join_worker(struct work_struct *work)
3882 {
3883 struct mwl8k_priv *priv =
3884 container_of(work, struct mwl8k_priv, finalize_join_worker);
3885 struct sk_buff *skb = priv->beacon_skb;
3886 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3887 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3888 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3889 mgmt->u.beacon.variable, len);
3890 int dtim_period = 1;
3891
3892 if (tim && tim[1] >= 2)
3893 dtim_period = tim[3];
3894
3895 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3896
3897 dev_kfree_skb(skb);
3898 priv->beacon_skb = NULL;
3899 }
3900
3901 enum {
3902 MWL8363 = 0,
3903 MWL8687,
3904 MWL8366,
3905 };
3906
3907 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3908 [MWL8363] = {
3909 .part_name = "88w8363",
3910 .helper_image = "mwl8k/helper_8363.fw",
3911 .fw_image = "mwl8k/fmimage_8363.fw",
3912 },
3913 [MWL8687] = {
3914 .part_name = "88w8687",
3915 .helper_image = "mwl8k/helper_8687.fw",
3916 .fw_image = "mwl8k/fmimage_8687.fw",
3917 },
3918 [MWL8366] = {
3919 .part_name = "88w8366",
3920 .helper_image = "mwl8k/helper_8366.fw",
3921 .fw_image = "mwl8k/fmimage_8366.fw",
3922 .ap_rxd_ops = &rxd_8366_ap_ops,
3923 },
3924 };
3925
3926 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3927 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3928 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3929 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3930 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3931 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3932
3933 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3934 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
3935 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3936 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3937 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3938 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3939 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3940 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3941 { },
3942 };
3943 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3944
3945 static int mwl8k_init_firmware(struct ieee80211_hw *hw)
3946 {
3947 struct mwl8k_priv *priv = hw->priv;
3948 int rc;
3949
3950 /* Reset firmware and hardware */
3951 mwl8k_hw_reset(priv);
3952
3953 /* Ask userland hotplug daemon for the device firmware */
3954 rc = mwl8k_request_firmware(priv);
3955 if (rc) {
3956 wiphy_err(hw->wiphy, "Firmware files not found\n");
3957 return rc;
3958 }
3959
3960 /* Load firmware into hardware */
3961 rc = mwl8k_load_firmware(hw);
3962 if (rc)
3963 wiphy_err(hw->wiphy, "Cannot start firmware\n");
3964
3965 /* Reclaim memory once firmware is successfully loaded */
3966 mwl8k_release_firmware(priv);
3967
3968 return rc;
3969 }
3970
3971 /* initialize hw after successfully loading a firmware image */
3972 static int mwl8k_probe_hw(struct ieee80211_hw *hw)
3973 {
3974 struct mwl8k_priv *priv = hw->priv;
3975 int rc = 0;
3976 int i;
3977
3978 if (priv->ap_fw) {
3979 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3980 if (priv->rxd_ops == NULL) {
3981 wiphy_err(hw->wiphy,
3982 "Driver does not have AP firmware image support for this hardware\n");
3983 goto err_stop_firmware;
3984 }
3985 } else {
3986 priv->rxd_ops = &rxd_sta_ops;
3987 }
3988
3989 priv->sniffer_enabled = false;
3990 priv->wmm_enabled = false;
3991 priv->pending_tx_pkts = 0;
3992
3993 rc = mwl8k_rxq_init(hw, 0);
3994 if (rc)
3995 goto err_stop_firmware;
3996 rxq_refill(hw, 0, INT_MAX);
3997
3998 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3999 rc = mwl8k_txq_init(hw, i);
4000 if (rc)
4001 goto err_free_queues;
4002 }
4003
4004 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4005 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4006 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4007 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4008 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4009
4010 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4011 IRQF_SHARED, MWL8K_NAME, hw);
4012 if (rc) {
4013 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
4014 goto err_free_queues;
4015 }
4016
4017 /*
4018 * Temporarily enable interrupts. Initial firmware host
4019 * commands use interrupts and avoid polling. Disable
4020 * interrupts when done.
4021 */
4022 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4023
4024 /* Get config data, mac addrs etc */
4025 if (priv->ap_fw) {
4026 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4027 if (!rc)
4028 rc = mwl8k_cmd_set_hw_spec(hw);
4029 } else {
4030 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4031 }
4032 if (rc) {
4033 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
4034 goto err_free_irq;
4035 }
4036
4037 /* Turn radio off */
4038 rc = mwl8k_cmd_radio_disable(hw);
4039 if (rc) {
4040 wiphy_err(hw->wiphy, "Cannot disable\n");
4041 goto err_free_irq;
4042 }
4043
4044 /* Clear MAC address */
4045 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4046 if (rc) {
4047 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
4048 goto err_free_irq;
4049 }
4050
4051 /* Disable interrupts */
4052 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4053 free_irq(priv->pdev->irq, hw);
4054
4055 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4056 priv->device_info->part_name,
4057 priv->hw_rev, hw->wiphy->perm_addr,
4058 priv->ap_fw ? "AP" : "STA",
4059 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4060 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4061
4062 return 0;
4063
4064 err_free_irq:
4065 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4066 free_irq(priv->pdev->irq, hw);
4067
4068 err_free_queues:
4069 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4070 mwl8k_txq_deinit(hw, i);
4071 mwl8k_rxq_deinit(hw, 0);
4072
4073 err_stop_firmware:
4074 mwl8k_hw_reset(priv);
4075
4076 return rc;
4077 }
4078
4079 /*
4080 * invoke mwl8k_reload_firmware to change the firmware image after the device
4081 * has already been registered
4082 */
4083 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
4084 {
4085 int i, rc = 0;
4086 struct mwl8k_priv *priv = hw->priv;
4087
4088 mwl8k_stop(hw);
4089 mwl8k_rxq_deinit(hw, 0);
4090
4091 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4092 mwl8k_txq_deinit(hw, i);
4093
4094 rc = mwl8k_init_firmware(hw, fw_image);
4095 if (rc)
4096 goto fail;
4097
4098 rc = mwl8k_probe_hw(hw);
4099 if (rc)
4100 goto fail;
4101
4102 rc = mwl8k_start(hw);
4103 if (rc)
4104 goto fail;
4105
4106 rc = mwl8k_config(hw, ~0);
4107 if (rc)
4108 goto fail;
4109
4110 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4111 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
4112 if (rc)
4113 goto fail;
4114 }
4115
4116 return rc;
4117
4118 fail:
4119 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
4120 return rc;
4121 }
4122
4123 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
4124 {
4125 struct ieee80211_hw *hw = priv->hw;
4126 int i, rc;
4127
4128 /*
4129 * Extra headroom is the size of the required DMA header
4130 * minus the size of the smallest 802.11 frame (CTS frame).
4131 */
4132 hw->extra_tx_headroom =
4133 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4134
4135 hw->channel_change_time = 10;
4136
4137 hw->queues = MWL8K_TX_QUEUES;
4138
4139 /* Set rssi values to dBm */
4140 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
4141 hw->vif_data_size = sizeof(struct mwl8k_vif);
4142 hw->sta_data_size = sizeof(struct mwl8k_sta);
4143
4144 priv->macids_used = 0;
4145 INIT_LIST_HEAD(&priv->vif_list);
4146
4147 /* Set default radio state and preamble */
4148 priv->radio_on = 0;
4149 priv->radio_short_preamble = 0;
4150
4151 /* Finalize join worker */
4152 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4153
4154 /* TX reclaim and RX tasklets. */
4155 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4156 tasklet_disable(&priv->poll_tx_task);
4157 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4158 tasklet_disable(&priv->poll_rx_task);
4159
4160 /* Power management cookie */
4161 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4162 if (priv->cookie == NULL)
4163 return -ENOMEM;
4164
4165 mutex_init(&priv->fw_mutex);
4166 priv->fw_mutex_owner = NULL;
4167 priv->fw_mutex_depth = 0;
4168 priv->hostcmd_wait = NULL;
4169
4170 spin_lock_init(&priv->tx_lock);
4171
4172 priv->tx_wait = NULL;
4173
4174 rc = mwl8k_probe_hw(hw);
4175 if (rc)
4176 goto err_free_cookie;
4177
4178 hw->wiphy->interface_modes = 0;
4179 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
4180 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4181 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
4182 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4183
4184 rc = ieee80211_register_hw(hw);
4185 if (rc) {
4186 wiphy_err(hw->wiphy, "Cannot register device\n");
4187 goto err_unprobe_hw;
4188 }
4189
4190 return 0;
4191
4192 err_unprobe_hw:
4193 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4194 mwl8k_txq_deinit(hw, i);
4195 mwl8k_rxq_deinit(hw, 0);
4196
4197 err_free_cookie:
4198 if (priv->cookie != NULL)
4199 pci_free_consistent(priv->pdev, 4,
4200 priv->cookie, priv->cookie_dma);
4201
4202 return rc;
4203 }
4204 static int __devinit mwl8k_probe(struct pci_dev *pdev,
4205 const struct pci_device_id *id)
4206 {
4207 static int printed_version;
4208 struct ieee80211_hw *hw;
4209 struct mwl8k_priv *priv;
4210 int rc;
4211
4212 if (!printed_version) {
4213 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
4214 printed_version = 1;
4215 }
4216
4217
4218 rc = pci_enable_device(pdev);
4219 if (rc) {
4220 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
4221 MWL8K_NAME);
4222 return rc;
4223 }
4224
4225 rc = pci_request_regions(pdev, MWL8K_NAME);
4226 if (rc) {
4227 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
4228 MWL8K_NAME);
4229 goto err_disable_device;
4230 }
4231
4232 pci_set_master(pdev);
4233
4234
4235 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
4236 if (hw == NULL) {
4237 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
4238 rc = -ENOMEM;
4239 goto err_free_reg;
4240 }
4241
4242 SET_IEEE80211_DEV(hw, &pdev->dev);
4243 pci_set_drvdata(pdev, hw);
4244
4245 priv = hw->priv;
4246 priv->hw = hw;
4247 priv->pdev = pdev;
4248 priv->device_info = &mwl8k_info_tbl[id->driver_data];
4249
4250
4251 priv->sram = pci_iomap(pdev, 0, 0x10000);
4252 if (priv->sram == NULL) {
4253 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
4254 goto err_iounmap;
4255 }
4256
4257 /*
4258 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
4259 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
4260 */
4261 priv->regs = pci_iomap(pdev, 1, 0x10000);
4262 if (priv->regs == NULL) {
4263 priv->regs = pci_iomap(pdev, 2, 0x10000);
4264 if (priv->regs == NULL) {
4265 wiphy_err(hw->wiphy, "Cannot map device registers\n");
4266 goto err_iounmap;
4267 }
4268 }
4269
4270 rc = mwl8k_init_firmware(hw);
4271 if (rc)
4272 goto err_stop_firmware;
4273
4274 rc = mwl8k_firmware_load_success(priv);
4275 if (!rc)
4276 return rc;
4277
4278 err_stop_firmware:
4279 mwl8k_hw_reset(priv);
4280
4281 err_iounmap:
4282 if (priv->regs != NULL)
4283 pci_iounmap(pdev, priv->regs);
4284
4285 if (priv->sram != NULL)
4286 pci_iounmap(pdev, priv->sram);
4287
4288 pci_set_drvdata(pdev, NULL);
4289 ieee80211_free_hw(hw);
4290
4291 err_free_reg:
4292 pci_release_regions(pdev);
4293
4294 err_disable_device:
4295 pci_disable_device(pdev);
4296
4297 return rc;
4298 }
4299
4300 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4301 {
4302 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4303 }
4304
4305 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4306 {
4307 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4308 struct mwl8k_priv *priv;
4309 int i;
4310
4311 if (hw == NULL)
4312 return;
4313 priv = hw->priv;
4314
4315 ieee80211_stop_queues(hw);
4316
4317 ieee80211_unregister_hw(hw);
4318
4319 /* Remove TX reclaim and RX tasklets. */
4320 tasklet_kill(&priv->poll_tx_task);
4321 tasklet_kill(&priv->poll_rx_task);
4322
4323 /* Stop hardware */
4324 mwl8k_hw_reset(priv);
4325
4326 /* Return all skbs to mac80211 */
4327 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4328 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4329
4330 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4331 mwl8k_txq_deinit(hw, i);
4332
4333 mwl8k_rxq_deinit(hw, 0);
4334
4335 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4336
4337 pci_iounmap(pdev, priv->regs);
4338 pci_iounmap(pdev, priv->sram);
4339 pci_set_drvdata(pdev, NULL);
4340 ieee80211_free_hw(hw);
4341 pci_release_regions(pdev);
4342 pci_disable_device(pdev);
4343 }
4344
4345 static struct pci_driver mwl8k_driver = {
4346 .name = MWL8K_NAME,
4347 .id_table = mwl8k_pci_id_table,
4348 .probe = mwl8k_probe,
4349 .remove = __devexit_p(mwl8k_remove),
4350 .shutdown = __devexit_p(mwl8k_shutdown),
4351 };
4352
4353 static int __init mwl8k_init(void)
4354 {
4355 return pci_register_driver(&mwl8k_driver);
4356 }
4357
4358 static void __exit mwl8k_exit(void)
4359 {
4360 pci_unregister_driver(&mwl8k_driver);
4361 }
4362
4363 module_init(mwl8k_init);
4364 module_exit(mwl8k_exit);
4365
4366 MODULE_DESCRIPTION(MWL8K_DESC);
4367 MODULE_VERSION(MWL8K_VERSION);
4368 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4369 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree