arch/m68knommu/platform/523x/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/523x/config.c
   5  *
   6  *      Sub-architcture dependant initialization code for the Freescale
   7  *      523x CPUs.
   8  *
   9  *      Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
  10  *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  11  */
  12
  13 /***************************************************************************/
  14
  15 #include <linux/kernel.h>
  16 #include <linux/param.h>
  17 #include <linux/init.h>
  18 #include <linux/io.h>
  19 #include <asm/machdep.h>
  20 #include <asm/coldfire.h>
  21 #include <asm/mcfsim.h>
  22 #include <asm/mcfuart.h>
  23
  24 /***************************************************************************/
  25
  26 static struct mcf_platform_uart m523x_uart_platform[] = {
  27         {
  28                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  29                 .irq            = MCFINT_VECBASE + MCFINT_UART0,
  30         },
  31         {
  32                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  33                 .irq            = MCFINT_VECBASE + MCFINT_UART0 + 1,
  34         },
  35         {
  36                 .mapbase        = MCF_MBAR + MCFUART_BASE3,
  37                 .irq            = MCFINT_VECBASE + MCFINT_UART0 + 2,
  38         },
  39         { },
  40 };
  41
  42 static struct platform_device m523x_uart = {
  43         .name                   = "mcfuart",
  44         .id                     = 0,
  45         .dev.platform_data      = m523x_uart_platform,
  46 };
  47
  48 static struct resource m523x_fec_resources[] = {
  49         {
  50                 .start          = MCF_MBAR + 0x1000,
  51                 .end            = MCF_MBAR + 0x1000 + 0x7ff,
  52                 .flags          = IORESOURCE_MEM,
  53         },
  54         {
  55                 .start          = 64 + 23,
  56                 .end            = 64 + 23,
  57                 .flags          = IORESOURCE_IRQ,
  58         },
  59         {
  60                 .start          = 64 + 27,
  61                 .end            = 64 + 27,
  62                 .flags          = IORESOURCE_IRQ,
  63         },
  64         {
  65                 .start          = 64 + 29,
  66                 .end            = 64 + 29,
  67                 .flags          = IORESOURCE_IRQ,
  68         },
  69 };
  70
  71 static struct platform_device m523x_fec = {
  72         .name                   = "fec",
  73         .id                     = 0,
  74         .num_resources          = ARRAY_SIZE(m523x_fec_resources),
  75         .resource               = m523x_fec_resources,
  76 };
  77
  78 static struct platform_device *m523x_devices[] __initdata = {
  79         &m523x_uart,
  80         &m523x_fec,
  81 };
  82
  83 /***************************************************************************/
  84
  85 #define INTC0   (MCF_MBAR + MCFICM_INTC0)
  86
  87 static void __init m523x_uart_init_line(int line, int irq)
  88 {
  89         u32 imr;
  90
  91         if ((line < 0) || (line > 2))
  92                 return;
  93
  94         writeb(0x30+line, (INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line));
  95
  96         imr = readl(INTC0 + MCFINTC_IMRL);
  97         imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
  98         writel(imr, INTC0 + MCFINTC_IMRL);
  99 }
 100
 101 static void __init m523x_uarts_init(void)
 102 {
 103         const int nrlines = ARRAY_SIZE(m523x_uart_platform);
 104         int line;
 105
 106         for (line = 0; (line < nrlines); line++)
 107                 m523x_uart_init_line(line, m523x_uart_platform[line].irq);
 108 }
 109
 110 /***************************************************************************/
 111
 112 static void __init m523x_fec_init(void)
 113 {
 114         u32 imr;
 115
 116         /* Unmask FEC interrupts at ColdFire interrupt controller */
 117         writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
 118         writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
 119         writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
 120
 121         imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
 122         imr &= ~0xf;
 123         writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
 124         imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
 125         imr &= ~0xff800001;
 126         writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
 127 }
 128
 129 /***************************************************************************/
 130
 131 void mcf_disableall(void)
 132 {
 133         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
 134         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
 135 }
 136
 137 /***************************************************************************/
 138
 139 void mcf_autovector(unsigned int vec)
 140 {
 141         /* Everything is auto-vectored on the 523x */
 142 }
 143 /***************************************************************************/
 144
 145 static void m523x_cpu_reset(void)
 146 {
 147         local_irq_disable();
 148         __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
 149 }
 150
 151 /***************************************************************************/
 152
 153 void __init config_BSP(char *commandp, int size)
 154 {
 155         mcf_disableall();
 156         mach_reset = m523x_cpu_reset;
 157         m523x_uarts_init();
 158         m523x_fec_init();
 159 }
 160
 161 /***************************************************************************/
 162
 163 static int __init init_BSP(void)
 164 {
 165         platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
 166         return 0;
 167 }
 168
 169 arch_initcall(init_BSP);
 170
 171 /***************************************************************************/