arch/arm/mach-mx3/iomux.c

   1 /*
   2  * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
   4  * Copyright (C) 2009 by Valentin Longchamp <valentin.longchamp@epfl.ch>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/io.h>
  24 #include <linux/gpio.h>
  25 #include <linux/kernel.h>
  26 #include <mach/hardware.h>
  27 #include <mach/gpio.h>
  28 #include <mach/iomux-mx3.h>
  29
  30 /*
  31  * IOMUX register (base) addresses
  32  */
  33 #define IOMUX_BASE      IO_ADDRESS(IOMUXC_BASE_ADDR)
  34 #define IOMUXINT_OBS1   (IOMUX_BASE + 0x000)
  35 #define IOMUXINT_OBS2   (IOMUX_BASE + 0x004)
  36 #define IOMUXGPR        (IOMUX_BASE + 0x008)
  37 #define IOMUXSW_MUX_CTL (IOMUX_BASE + 0x00C)
  38 #define IOMUXSW_PAD_CTL (IOMUX_BASE + 0x154)
  39
  40 static DEFINE_SPINLOCK(gpio_mux_lock);
  41
  42 #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3)
  43
  44 unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG];
  45 /*
  46  * set the mode for a IOMUX pin.
  47  */
  48 int mxc_iomux_mode(unsigned int pin_mode)
  49 {
  50         u32 field, l, mode, ret = 0;
  51         void __iomem *reg;
  52
  53         reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK);
  54         field = pin_mode & 0x3;
  55         mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT;
  56
  57         spin_lock(&gpio_mux_lock);
  58
  59         l = __raw_readl(reg);
  60         l &= ~(0xff << (field * 8));
  61         l |= mode << (field * 8);
  62         __raw_writel(l, reg);
  63
  64         spin_unlock(&gpio_mux_lock);
  65
  66         return ret;
  67 }
  68 EXPORT_SYMBOL(mxc_iomux_mode);
  69
  70 /*
  71  * This function configures the pad value for a IOMUX pin.
  72  */
  73 void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
  74 {
  75         u32 field, l;
  76         void __iomem *reg;
  77
  78         pin &= IOMUX_PADNUM_MASK;
  79         reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4;
  80         field = (pin + 2) % 3;
  81
  82         pr_debug("%s: reg offset = 0x%x, field = %d\n",
  83                         __func__, (pin + 2) / 3, field);
  84
  85         spin_lock(&gpio_mux_lock);
  86
  87         l = __raw_readl(reg);
  88         l &= ~(0x1ff << (field * 10));
  89         l |= config << (field * 10);
  90         __raw_writel(l, reg);
  91
  92         spin_unlock(&gpio_mux_lock);
  93 }
  94 EXPORT_SYMBOL(mxc_iomux_set_pad);
  95
  96 /*
  97  * setups a single pin:
  98  *      - reserves the pin so that it is not claimed by another driver
  99  *      - setups the iomux according to the configuration
 100  *      - if the pin is configured as a GPIO, we claim it through kernel gpiolib
 101  */
 102 int mxc_iomux_setup_pin(const unsigned int pin, const char *label)
 103 {
 104         unsigned pad = pin & IOMUX_PADNUM_MASK;
 105         unsigned gpio;
 106
 107         if (pad >= (PIN_MAX + 1)) {
 108                 printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n",
 109                         pad, label ? label : "?");
 110                 return -EINVAL;
 111         }
 112
 113         if (test_and_set_bit(pad, mxc_pin_alloc_map)) {
 114                 printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n",
 115                         pad, label ? label : "?");
 116                 return -EINVAL;
 117         }
 118         mxc_iomux_mode(pin);
 119
 120         /* if we have a gpio, we can allocate it */
 121         gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT;
 122         if (gpio < (GPIO_PORT_MAX + 1) * 32)
 123                 if (gpio_request(gpio, label))
 124                         return -EINVAL;
 125
 126         return 0;
 127 }
 128 EXPORT_SYMBOL(mxc_iomux_setup_pin);
 129
 130 int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count,
 131                 const char *label)
 132 {
 133         unsigned int *p = pin_list;
 134         int i;
 135         int ret = -EINVAL;
 136
 137         for (i = 0; i < count; i++) {
 138                 if (mxc_iomux_setup_pin(*p, label))
 139                         goto setup_error;
 140                 p++;
 141         }
 142         return 0;
 143
 144 setup_error:
 145         mxc_iomux_release_multiple_pins(pin_list, i);
 146         return ret;
 147 }
 148 EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins);
 149
 150 void mxc_iomux_release_pin(const unsigned int pin)
 151 {
 152         unsigned pad = pin & IOMUX_PADNUM_MASK;
 153         unsigned gpio;
 154
 155         if (pad < (PIN_MAX + 1))
 156                 clear_bit(pad, mxc_pin_alloc_map);
 157
 158         gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT;
 159         if (gpio < (GPIO_PORT_MAX + 1) * 32)
 160                 gpio_free(gpio);
 161 }
 162 EXPORT_SYMBOL(mxc_iomux_release_pin);
 163
 164 void mxc_iomux_release_multiple_pins(unsigned int *pin_list, int count)
 165 {
 166         unsigned int *p = pin_list;
 167         int i;
 168
 169         for (i = 0; i < count; i++) {
 170                 mxc_iomux_release_pin(*p);
 171                 p++;
 172         }
 173 }
 174 EXPORT_SYMBOL(mxc_iomux_release_multiple_pins);
 175
 176 /*
 177  * This function enables/disables the general purpose function for a particular
 178  * signal.
 179  */
 180 void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en)
 181 {
 182         u32 l;
 183
 184         spin_lock(&gpio_mux_lock);
 185         l = __raw_readl(IOMUXGPR);
 186         if (en)
 187                 l |= gp;
 188         else
 189                 l &= ~gp;
 190
 191         __raw_writel(l, IOMUXGPR);
 192         spin_unlock(&gpio_mux_lock);
 193 }
 194 EXPORT_SYMBOL(mxc_iomux_set_gpr);