From 97e1930f09e9b656e823cd841cf29bfbbe326832 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Tue, 24 Apr 2012 16:00:21 +0200 Subject: [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too Copy&pasted from the vlv setup code. According to docs, we need that on ivb, too. v2: Use new masked bit handling macros. Reviewed-by: Ben Widawsky Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a26bf49c464..93d4ce3fc12 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2776,6 +2776,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) } gen7_setup_fixed_func_scheduler(dev_priv); + + /* WaDisable4x2SubspanOptimization */ + I915_WRITE(CACHE_MODE_1, + _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); } static void valleyview_init_clock_gating(struct drm_device *dev) -- 2.11.4.GIT