mtd: nand: DaVinci: Add 4-bit ECC support for large page NAND chips
commitf12a9473283e68ae708e9ada37cb352ea2652397
authorSneha Narnakaje <nsnehaprabha@ti.com>
Fri, 18 Sep 2009 19:51:48 +0000 (18 12:51 -0700)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Sat, 19 Sep 2009 18:16:57 +0000 (19 11:16 -0700)
treed0886b69596a6031ac705352daa38a13fa0dcc06
parent6e0cb135b3f3713b95ea41a11155e83a8c70f5f8
mtd: nand: DaVinci: Add 4-bit ECC support for large page NAND chips

This patch adds 4-bit ECC support for large page NAND chips using the new
ECC mode NAND_ECC_HW_OOB_FIRST.  The platform data from board-dm355-evm
has been adjusted to use this mode.

The patches have been verified on DM355 device with 2KiB-page Micron
devices using mtd-tests and JFFS2.  Error correction up to 4 bits has
also been verified using nandwrite/nanddump utilities.

Reviewed-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/davinci_nand.c