agp/intel: Use a write-combining map for updating PTEs
commitedef7e685da05c13cce50c0126189c80fe2c8f71
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 14 Sep 2012 10:57:47 +0000 (14 11:57 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 20 Sep 2012 12:23:07 +0000 (20 14:23 +0200)
tree75e463e8ffee14669477a56ce366280fc76d16e4
parent934d6086ea6b165af9218e8dcc2a9e69e1850743
agp/intel: Use a write-combining map for updating PTEs

Rewriting the PTE entries using an WC mapping is roughly an order of
magnitude faster than through the uncached mapping. This makes an
observable difference on workloads that cycle through large numbers of
buffers, for example Chromium using ShmPixmaps where virtually all the
CPU time is currently spent rebinding the userptr.

v2: Limit the WC mapping to older generations as we have observed that
the TLB invalidation on SandyBridge+ is unreliable with WC updates.
See i-g-t/tests/gem_gtt_cpu_tlb

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/char/agp/intel-gtt.c