| commit | e506a0c6381f180858d2e343c3ed5c0bde8e84ba | |
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | |
| Thu, 5 Jul 2012 10:17:29 +0000 (5 12:17 +0200) | ||
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | |
| Thu, 5 Jul 2012 11:34:14 +0000 (5 13:34 +0200) | ||
| tree | c5a531a2d62bcb1f2ecd0b6913677af78d91edf7 | treesnapshot (tar.gz zip) |
| parent | e6a595d2db7ad403fcb2b7b168754d7551fc8c9b | commitdiff |
drm/i915: introduce crtc->dspaddr_offset
To avoid recomputing the display framebuffer offset on gen2/3
pageflips. This is also prep work to do similar trickery on gen4+
Also:
- kill "Start", such upper-case remnants from the ddx must surely die.
- rename "Offset" to linear_offset, to make it clearer that on gen4+
this is only used by the hw for linear buffers, for tiled buffers it
uses the TILEOFF register.
- call DSAPADDR DSPLINOFF on gen4+ for the same reason (and because
the documentation really renamed the register).
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
To avoid recomputing the display framebuffer offset on gen2/3
pageflips. This is also prep work to do similar trickery on gen4+
Also:
- kill "Start", such upper-case remnants from the ddx must surely die.
- rename "Offset" to linear_offset, to make it clearer that on gen4+
this is only used by the hw for linear buffers, for tiled buffers it
uses the TILEOFF register.
- call DSAPADDR DSPLINOFF on gen4+ for the same reason (and because
the documentation really renamed the register).
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| drivers/gpu/drm/i915/i915_reg.h | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_display.c | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_drv.h | diffblobblamehistory |