OSS msnd: fix array overflows
[linux-2.6/kmemtrace.git] / drivers / input / touchscreen / ucb1400_ts.c
blob7549939b9535634de87ddb09a829b186758303e0
1 /*
2 * Philips UCB1400 touchscreen driver
4 * Author: Nicolas Pitre
5 * Created: September 25, 2006
6 * Copyright: MontaVista Software, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
13 * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
14 * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/init.h>
20 #include <linux/completion.h>
21 #include <linux/delay.h>
22 #include <linux/input.h>
23 #include <linux/device.h>
24 #include <linux/interrupt.h>
25 #include <linux/suspend.h>
26 #include <linux/slab.h>
27 #include <linux/kthread.h>
28 #include <linux/freezer.h>
30 #include <sound/driver.h>
31 #include <sound/core.h>
32 #include <sound/ac97_codec.h>
36 * Interesting UCB1400 AC-link registers
39 #define UCB_IE_RIS 0x5e
40 #define UCB_IE_FAL 0x60
41 #define UCB_IE_STATUS 0x62
42 #define UCB_IE_CLEAR 0x62
43 #define UCB_IE_ADC (1 << 11)
44 #define UCB_IE_TSPX (1 << 12)
46 #define UCB_TS_CR 0x64
47 #define UCB_TS_CR_TSMX_POW (1 << 0)
48 #define UCB_TS_CR_TSPX_POW (1 << 1)
49 #define UCB_TS_CR_TSMY_POW (1 << 2)
50 #define UCB_TS_CR_TSPY_POW (1 << 3)
51 #define UCB_TS_CR_TSMX_GND (1 << 4)
52 #define UCB_TS_CR_TSPX_GND (1 << 5)
53 #define UCB_TS_CR_TSMY_GND (1 << 6)
54 #define UCB_TS_CR_TSPY_GND (1 << 7)
55 #define UCB_TS_CR_MODE_INT (0 << 8)
56 #define UCB_TS_CR_MODE_PRES (1 << 8)
57 #define UCB_TS_CR_MODE_POS (2 << 8)
58 #define UCB_TS_CR_BIAS_ENA (1 << 11)
59 #define UCB_TS_CR_TSPX_LOW (1 << 12)
60 #define UCB_TS_CR_TSMX_LOW (1 << 13)
62 #define UCB_ADC_CR 0x66
63 #define UCB_ADC_SYNC_ENA (1 << 0)
64 #define UCB_ADC_VREFBYP_CON (1 << 1)
65 #define UCB_ADC_INP_TSPX (0 << 2)
66 #define UCB_ADC_INP_TSMX (1 << 2)
67 #define UCB_ADC_INP_TSPY (2 << 2)
68 #define UCB_ADC_INP_TSMY (3 << 2)
69 #define UCB_ADC_INP_AD0 (4 << 2)
70 #define UCB_ADC_INP_AD1 (5 << 2)
71 #define UCB_ADC_INP_AD2 (6 << 2)
72 #define UCB_ADC_INP_AD3 (7 << 2)
73 #define UCB_ADC_EXT_REF (1 << 5)
74 #define UCB_ADC_START (1 << 7)
75 #define UCB_ADC_ENA (1 << 15)
77 #define UCB_ADC_DATA 0x68
78 #define UCB_ADC_DAT_VALID (1 << 15)
79 #define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
81 #define UCB_ID 0x7e
82 #define UCB_ID_1400 0x4304
85 struct ucb1400 {
86 struct snd_ac97 *ac97;
87 struct input_dev *ts_idev;
89 int irq;
91 wait_queue_head_t ts_wait;
92 struct task_struct *ts_task;
94 unsigned int irq_pending; /* not bit field shared */
95 unsigned int ts_restart:1;
96 unsigned int adcsync:1;
99 static int adcsync;
100 static int ts_delay = 55; /* us */
101 static int ts_delay_pressure; /* us */
103 static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
105 return ucb->ac97->bus->ops->read(ucb->ac97, reg);
108 static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
110 ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
113 static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
115 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
118 static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
120 unsigned int val;
122 if (ucb->adcsync)
123 adc_channel |= UCB_ADC_SYNC_ENA;
125 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
126 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);
128 for (;;) {
129 val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
130 if (val & UCB_ADC_DAT_VALID)
131 break;
132 /* yield to other processes */
133 schedule_timeout_uninterruptible(1);
136 return UCB_ADC_DAT_VALUE(val);
139 static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
141 ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
144 /* Switch to interrupt mode. */
145 static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
147 ucb1400_reg_write(ucb, UCB_TS_CR,
148 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
149 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
150 UCB_TS_CR_MODE_INT);
154 * Switch to pressure mode, and read pressure. We don't need to wait
155 * here, since both plates are being driven.
157 static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
159 ucb1400_reg_write(ucb, UCB_TS_CR,
160 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
161 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
162 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
163 udelay(ts_delay_pressure);
164 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
168 * Switch to X position mode and measure Y plate. We switch the plate
169 * configuration in pressure mode, then switch to position mode. This
170 * gives a faster response time. Even so, we need to wait about 55us
171 * for things to stabilise.
173 static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
175 ucb1400_reg_write(ucb, UCB_TS_CR,
176 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
177 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
178 ucb1400_reg_write(ucb, UCB_TS_CR,
179 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
180 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
181 ucb1400_reg_write(ucb, UCB_TS_CR,
182 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
183 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
185 udelay(ts_delay);
187 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
191 * Switch to Y position mode and measure X plate. We switch the plate
192 * configuration in pressure mode, then switch to position mode. This
193 * gives a faster response time. Even so, we need to wait about 55us
194 * for things to stabilise.
196 static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
198 ucb1400_reg_write(ucb, UCB_TS_CR,
199 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
200 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
201 ucb1400_reg_write(ucb, UCB_TS_CR,
202 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
203 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
204 ucb1400_reg_write(ucb, UCB_TS_CR,
205 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
206 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
208 udelay(ts_delay);
210 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
214 * Switch to X plate resistance mode. Set MX to ground, PX to
215 * supply. Measure current.
217 static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
219 ucb1400_reg_write(ucb, UCB_TS_CR,
220 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
221 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
222 return ucb1400_adc_read(ucb, 0);
226 * Switch to Y plate resistance mode. Set MY to ground, PY to
227 * supply. Measure current.
229 static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
231 ucb1400_reg_write(ucb, UCB_TS_CR,
232 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
233 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
234 return ucb1400_adc_read(ucb, 0);
237 static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
239 unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
240 return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
243 static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
245 ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
246 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
247 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
250 static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
252 ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
255 static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
257 input_report_abs(idev, ABS_X, x);
258 input_report_abs(idev, ABS_Y, y);
259 input_report_abs(idev, ABS_PRESSURE, pressure);
260 input_sync(idev);
263 static void ucb1400_ts_event_release(struct input_dev *idev)
265 input_report_abs(idev, ABS_PRESSURE, 0);
266 input_sync(idev);
269 static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
271 unsigned int isr;
273 isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
274 ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
275 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
277 if (isr & UCB_IE_TSPX)
278 ucb1400_ts_irq_disable(ucb);
279 else
280 printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
282 enable_irq(ucb->irq);
285 static int ucb1400_ts_thread(void *_ucb)
287 struct ucb1400 *ucb = _ucb;
288 struct task_struct *tsk = current;
289 int valid = 0;
290 struct sched_param param = { .sched_priority = 1 };
292 sched_setscheduler(tsk, SCHED_FIFO, &param);
294 set_freezable();
295 while (!kthread_should_stop()) {
296 unsigned int x, y, p;
297 long timeout;
299 ucb->ts_restart = 0;
301 if (ucb->irq_pending) {
302 ucb->irq_pending = 0;
303 ucb1400_handle_pending_irq(ucb);
306 ucb1400_adc_enable(ucb);
307 x = ucb1400_ts_read_xpos(ucb);
308 y = ucb1400_ts_read_ypos(ucb);
309 p = ucb1400_ts_read_pressure(ucb);
310 ucb1400_adc_disable(ucb);
312 /* Switch back to interrupt mode. */
313 ucb1400_ts_mode_int(ucb);
315 msleep(10);
317 if (ucb1400_ts_pen_down(ucb)) {
318 ucb1400_ts_irq_enable(ucb);
321 * If we spat out a valid sample set last time,
322 * spit out a "pen off" sample here.
324 if (valid) {
325 ucb1400_ts_event_release(ucb->ts_idev);
326 valid = 0;
329 timeout = MAX_SCHEDULE_TIMEOUT;
330 } else {
331 valid = 1;
332 ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
333 timeout = msecs_to_jiffies(10);
336 wait_event_freezable_timeout(ucb->ts_wait,
337 ucb->irq_pending || ucb->ts_restart || kthread_should_stop(),
338 timeout);
341 /* Send the "pen off" if we are stopping with the pen still active */
342 if (valid)
343 ucb1400_ts_event_release(ucb->ts_idev);
345 ucb->ts_task = NULL;
346 return 0;
350 * A restriction with interrupts exists when using the ucb1400, as
351 * the codec read/write routines may sleep while waiting for codec
352 * access completion and uses semaphores for access control to the
353 * AC97 bus. A complete codec read cycle could take anywhere from
354 * 60 to 100uSec so we *definitely* don't want to spin inside the
355 * interrupt handler waiting for codec access. So, we handle the
356 * interrupt by scheduling a RT kernel thread to run in process
357 * context instead of interrupt context.
359 static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
361 struct ucb1400 *ucb = devid;
363 if (irqnr == ucb->irq) {
364 disable_irq(ucb->irq);
365 ucb->irq_pending = 1;
366 wake_up(&ucb->ts_wait);
367 return IRQ_HANDLED;
369 return IRQ_NONE;
372 static int ucb1400_ts_open(struct input_dev *idev)
374 struct ucb1400 *ucb = input_get_drvdata(idev);
375 int ret = 0;
377 BUG_ON(ucb->ts_task);
379 ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
380 if (IS_ERR(ucb->ts_task)) {
381 ret = PTR_ERR(ucb->ts_task);
382 ucb->ts_task = NULL;
385 return ret;
388 static void ucb1400_ts_close(struct input_dev *idev)
390 struct ucb1400 *ucb = input_get_drvdata(idev);
392 if (ucb->ts_task)
393 kthread_stop(ucb->ts_task);
395 ucb1400_ts_irq_disable(ucb);
396 ucb1400_reg_write(ucb, UCB_TS_CR, 0);
399 #ifdef CONFIG_PM
400 static int ucb1400_ts_resume(struct device *dev)
402 struct ucb1400 *ucb = dev_get_drvdata(dev);
404 if (ucb->ts_task) {
406 * Restart the TS thread to ensure the
407 * TS interrupt mode is set up again
408 * after sleep.
410 ucb->ts_restart = 1;
411 wake_up(&ucb->ts_wait);
413 return 0;
415 #else
416 #define ucb1400_ts_resume NULL
417 #endif
419 #ifndef NO_IRQ
420 #define NO_IRQ 0
421 #endif
424 * Try to probe our interrupt, rather than relying on lots of
425 * hard-coded machine dependencies.
427 static int ucb1400_detect_irq(struct ucb1400 *ucb)
429 unsigned long mask, timeout;
431 mask = probe_irq_on();
432 if (!mask) {
433 probe_irq_off(mask);
434 return -EBUSY;
437 /* Enable the ADC interrupt. */
438 ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
439 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
440 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
441 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
443 /* Cause an ADC interrupt. */
444 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
445 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
447 /* Wait for the conversion to complete. */
448 timeout = jiffies + HZ/2;
449 while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
450 cpu_relax();
451 if (time_after(jiffies, timeout)) {
452 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
453 probe_irq_off(mask);
454 return -ENODEV;
457 ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
459 /* Disable and clear interrupt. */
460 ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
461 ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
462 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
463 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
465 /* Read triggered interrupt. */
466 ucb->irq = probe_irq_off(mask);
467 if (ucb->irq < 0 || ucb->irq == NO_IRQ)
468 return -ENODEV;
470 return 0;
473 static int ucb1400_ts_probe(struct device *dev)
475 struct ucb1400 *ucb;
476 struct input_dev *idev;
477 int error, id, x_res, y_res;
479 ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
480 idev = input_allocate_device();
481 if (!ucb || !idev) {
482 error = -ENOMEM;
483 goto err_free_devs;
486 ucb->ts_idev = idev;
487 ucb->adcsync = adcsync;
488 ucb->ac97 = to_ac97_t(dev);
489 init_waitqueue_head(&ucb->ts_wait);
491 id = ucb1400_reg_read(ucb, UCB_ID);
492 if (id != UCB_ID_1400) {
493 error = -ENODEV;
494 goto err_free_devs;
497 error = ucb1400_detect_irq(ucb);
498 if (error) {
499 printk(KERN_ERR "UCB1400: IRQ probe failed\n");
500 goto err_free_devs;
503 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
504 "UCB1400", ucb);
505 if (error) {
506 printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
507 ucb->irq, error);
508 goto err_free_devs;
510 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
512 input_set_drvdata(idev, ucb);
514 idev->dev.parent = dev;
515 idev->name = "UCB1400 touchscreen interface";
516 idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
517 idev->id.product = id;
518 idev->open = ucb1400_ts_open;
519 idev->close = ucb1400_ts_close;
520 idev->evbit[0] = BIT_MASK(EV_ABS);
522 ucb1400_adc_enable(ucb);
523 x_res = ucb1400_ts_read_xres(ucb);
524 y_res = ucb1400_ts_read_yres(ucb);
525 ucb1400_adc_disable(ucb);
526 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
528 input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
529 input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
530 input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
532 error = input_register_device(idev);
533 if (error)
534 goto err_free_irq;
536 dev_set_drvdata(dev, ucb);
537 return 0;
539 err_free_irq:
540 free_irq(ucb->irq, ucb);
541 err_free_devs:
542 input_free_device(idev);
543 kfree(ucb);
544 return error;
547 static int ucb1400_ts_remove(struct device *dev)
549 struct ucb1400 *ucb = dev_get_drvdata(dev);
551 free_irq(ucb->irq, ucb);
552 input_unregister_device(ucb->ts_idev);
553 dev_set_drvdata(dev, NULL);
554 kfree(ucb);
555 return 0;
558 static struct device_driver ucb1400_ts_driver = {
559 .name = "ucb1400_ts",
560 .owner = THIS_MODULE,
561 .bus = &ac97_bus_type,
562 .probe = ucb1400_ts_probe,
563 .remove = ucb1400_ts_remove,
564 .resume = ucb1400_ts_resume,
567 static int __init ucb1400_ts_init(void)
569 return driver_register(&ucb1400_ts_driver);
572 static void __exit ucb1400_ts_exit(void)
574 driver_unregister(&ucb1400_ts_driver);
577 module_param(adcsync, bool, 0444);
578 MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
580 module_param(ts_delay, int, 0444);
581 MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us.");
583 module_param(ts_delay_pressure, int, 0444);
584 MODULE_PARM_DESC(ts_delay_pressure,
585 "delay between panel setup and pressure read. Default = 0us.");
587 module_init(ucb1400_ts_init);
588 module_exit(ucb1400_ts_exit);
590 MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
591 MODULE_LICENSE("GPL");