arch/arm/mach-s3c2443/irq.c

   1 /* linux/arch/arm/mach-s3c2443/irq.c
   2  *
   3  * Copyright (c) 2007 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  *
  20 */
  21
  22 #include <linux/init.h>
  23 #include <linux/module.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/ioport.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/sysdev.h>
  28
  29 #include <asm/hardware.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32
  33 #include <asm/mach/irq.h>
  34
  35 #include <asm/arch/regs-irq.h>
  36 #include <asm/arch/regs-gpio.h>
  37
  38 #include <asm/plat-s3c24xx/cpu.h>
  39 #include <asm/plat-s3c24xx/pm.h>
  40 #include <asm/plat-s3c24xx/irq.h>
  41
  42 #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
  43
  44 static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
  45 {
  46         unsigned int subsrc, submsk;
  47         unsigned int end;
  48         struct irq_desc *mydesc;
  49
  50         /* read the current pending interrupts, and the mask
  51          * for what it is available */
  52
  53         subsrc = __raw_readl(S3C2410_SUBSRCPND);
  54         submsk = __raw_readl(S3C2410_INTSUBMSK);
  55
  56         subsrc  &= ~submsk;
  57         subsrc >>= (irq - S3C2410_IRQSUB(0));
  58         subsrc  &= (1 << len)-1;
  59
  60         end = len + irq;
  61         mydesc = irq_desc + irq;
  62
  63         for (; irq < end && subsrc; irq++) {
  64                 if (subsrc & 1)
  65                         desc_handle_irq(irq, mydesc);
  66
  67                 mydesc++;
  68                 subsrc >>= 1;
  69         }
  70 }
  71
  72 /* WDT/AC97 sub interrupts */
  73
  74 static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
  75 {
  76         s3c2443_irq_demux(IRQ_S3C2443_WDT, 4);
  77 }
  78
  79 #define INTMSK_WDTAC97  (1UL << (IRQ_WDT - IRQ_EINT0))
  80 #define SUBMSK_WDTAC97  INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
  81
  82 static void s3c2443_irq_wdtac97_mask(unsigned int irqno)
  83 {
  84         s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  85 }
  86
  87 static void s3c2443_irq_wdtac97_unmask(unsigned int irqno)
  88 {
  89         s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
  90 }
  91
  92 static void s3c2443_irq_wdtac97_ack(unsigned int irqno)
  93 {
  94         s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  95 }
  96
  97 static struct irq_chip s3c2443_irq_wdtac97 = {
  98         .mask       = s3c2443_irq_wdtac97_mask,
  99         .unmask     = s3c2443_irq_wdtac97_unmask,
 100         .ack        = s3c2443_irq_wdtac97_ack,
 101 };
 102
 103
 104 /* LCD sub interrupts */
 105
 106 static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
 107 {
 108         s3c2443_irq_demux(IRQ_S3C2443_LCD1, 4);
 109 }
 110
 111 #define INTMSK_LCD      (1UL << (IRQ_LCD - IRQ_EINT0))
 112 #define SUBMSK_LCD      INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
 113
 114 static void s3c2443_irq_lcd_mask(unsigned int irqno)
 115 {
 116         s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
 117 }
 118
 119 static void s3c2443_irq_lcd_unmask(unsigned int irqno)
 120 {
 121         s3c_irqsub_unmask(irqno, INTMSK_LCD);
 122 }
 123
 124 static void s3c2443_irq_lcd_ack(unsigned int irqno)
 125 {
 126         s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
 127 }
 128
 129 static struct irq_chip s3c2443_irq_lcd = {
 130         .mask       = s3c2443_irq_lcd_mask,
 131         .unmask     = s3c2443_irq_lcd_unmask,
 132         .ack        = s3c2443_irq_lcd_ack,
 133 };
 134
 135
 136 /* DMA sub interrupts */
 137
 138 static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
 139 {
 140         s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6);
 141 }
 142
 143 #define INTMSK_DMA      (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
 144 #define SUBMSK_DMA      INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
 145
 146
 147 static void s3c2443_irq_dma_mask(unsigned int irqno)
 148 {
 149         s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
 150 }
 151
 152 static void s3c2443_irq_dma_unmask(unsigned int irqno)
 153 {
 154         s3c_irqsub_unmask(irqno, INTMSK_DMA);
 155 }
 156
 157 static void s3c2443_irq_dma_ack(unsigned int irqno)
 158 {
 159         s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
 160 }
 161
 162 static struct irq_chip s3c2443_irq_dma = {
 163         .mask       = s3c2443_irq_dma_mask,
 164         .unmask     = s3c2443_irq_dma_unmask,
 165         .ack        = s3c2443_irq_dma_ack,
 166 };
 167
 168
 169 /* UART3 sub interrupts */
 170
 171 static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
 172 {
 173         s3c2443_irq_demux(IRQ_S3C2443_UART3, 3);
 174 }
 175
 176 #define INTMSK_UART3    (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
 177 #define SUBMSK_UART3    (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
 178
 179
 180 static void s3c2443_irq_uart3_mask(unsigned int irqno)
 181 {
 182         s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
 183 }
 184
 185 static void s3c2443_irq_uart3_unmask(unsigned int irqno)
 186 {
 187         s3c_irqsub_unmask(irqno, INTMSK_UART3);
 188 }
 189
 190 static void s3c2443_irq_uart3_ack(unsigned int irqno)
 191 {
 192         s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
 193 }
 194
 195 static struct irq_chip s3c2443_irq_uart3 = {
 196         .mask       = s3c2443_irq_uart3_mask,
 197         .unmask     = s3c2443_irq_uart3_unmask,
 198         .ack        = s3c2443_irq_uart3_ack,
 199 };
 200
 201
 202 /* CAM sub interrupts */
 203
 204 static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
 205 {
 206         s3c2443_irq_demux(IRQ_S3C2440_CAM_C, 4);
 207 }
 208
 209 #define INTMSK_CAM      (1UL << (IRQ_CAM - IRQ_EINT0))
 210 #define SUBMSK_CAM      INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
 211
 212 static void s3c2443_irq_cam_mask(unsigned int irqno)
 213 {
 214         s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM);
 215 }
 216
 217 static void s3c2443_irq_cam_unmask(unsigned int irqno)
 218 {
 219         s3c_irqsub_unmask(irqno, INTMSK_CAM);
 220 }
 221
 222 static void s3c2443_irq_cam_ack(unsigned int irqno)
 223 {
 224         s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM);
 225 }
 226
 227 static struct irq_chip s3c2443_irq_cam = {
 228         .mask       = s3c2443_irq_cam_mask,
 229         .unmask     = s3c2443_irq_cam_unmask,
 230         .ack        = s3c2443_irq_cam_ack,
 231 };
 232
 233 /* IRQ initialisation code */
 234
 235 static int __init s3c2443_add_sub(unsigned int base,
 236                                    void (*demux)(unsigned int,
 237                                                  struct irq_desc *),
 238                                    struct irq_chip *chip,
 239                                    unsigned int start, unsigned int end)
 240 {
 241         unsigned int irqno;
 242
 243         set_irq_chip(base, &s3c_irq_level_chip);
 244         set_irq_handler(base, handle_level_irq);
 245         set_irq_chained_handler(base, demux);
 246
 247         for (irqno = start; irqno <= end; irqno++) {
 248                 set_irq_chip(irqno, chip);
 249                 set_irq_handler(irqno, handle_level_irq);
 250                 set_irq_flags(irqno, IRQF_VALID);
 251         }
 252
 253         return 0;
 254 }
 255
 256 static int s3c2443_irq_add(struct sys_device *sysdev)
 257 {
 258         printk("S3C2443: IRQ Support\n");
 259
 260         s3c2443_add_sub(IRQ_CAM, s3c2443_irq_demux_cam, &s3c2443_irq_cam,
 261                         IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P);
 262
 263         s3c2443_add_sub(IRQ_LCD, s3c2443_irq_demux_lcd, &s3c2443_irq_lcd,
 264                         IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4);
 265
 266         s3c2443_add_sub(IRQ_S3C2443_DMA, s3c2443_irq_demux_dma,
 267                         &s3c2443_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
 268
 269         s3c2443_add_sub(IRQ_S3C2443_UART3, s3c2443_irq_demux_uart3,
 270                         &s3c2443_irq_uart3,
 271                         IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
 272
 273         s3c2443_add_sub(IRQ_WDT, s3c2443_irq_demux_wdtac97,
 274                         &s3c2443_irq_wdtac97,
 275                         IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
 276
 277         return 0;
 278 }
 279
 280 static struct sysdev_driver s3c2443_irq_driver = {
 281         .add            = s3c2443_irq_add,
 282 };
 283
 284 static int s3c2443_irq_init(void)
 285 {
 286         return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver);
 287 }
 288
 289 arch_initcall(s3c2443_irq_init);
 290