drivers/char/drm/drm.h

   1 /**
   2  * \file drm.h
   3  * Header for the Direct Rendering Manager
   4  *
   5  * \author Rickard E. (Rik) Faith <faith@valinux.com>
   6  *
   7  * \par Acknowledgments:
   8  * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
   9  */
  10
  11 /*
  12  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  13  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  14  * All rights reserved.
  15  *
  16  * Permission is hereby granted, free of charge, to any person obtaining a
  17  * copy of this software and associated documentation files (the "Software"),
  18  * to deal in the Software without restriction, including without limitation
  19  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  20  * and/or sell copies of the Software, and to permit persons to whom the
  21  * Software is furnished to do so, subject to the following conditions:
  22  *
  23  * The above copyright notice and this permission notice (including the next
  24  * paragraph) shall be included in all copies or substantial portions of the
  25  * Software.
  26  *
  27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  28  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  29  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  30  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  31  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  32  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  33  * OTHER DEALINGS IN THE SOFTWARE.
  34  */
  35
  36
  37 #ifndef _DRM_H_
  38 #define _DRM_H_
  39
  40 #if defined(__linux__)
  41 #include <linux/config.h>
  42 #include <asm/ioctl.h>          /* For _IO* macros */
  43 #define DRM_IOCTL_NR(n)         _IOC_NR(n)
  44 #define DRM_IOC_VOID            _IOC_NONE
  45 #define DRM_IOC_READ            _IOC_READ
  46 #define DRM_IOC_WRITE           _IOC_WRITE
  47 #define DRM_IOC_READWRITE       _IOC_READ|_IOC_WRITE
  48 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  49 #elif defined(__FreeBSD__) || defined(__NetBSD__)
  50 #if defined(__FreeBSD__) && defined(XFree86Server)
  51 /* Prevent name collision when including sys/ioccom.h */
  52 #undef ioctl
  53 #include <sys/ioccom.h>
  54 #define ioctl(a,b,c)            xf86ioctl(a,b,c)
  55 #else
  56 #include <sys/ioccom.h>
  57 #endif /* __FreeBSD__ && xf86ioctl */
  58 #define DRM_IOCTL_NR(n)         ((n) & 0xff)
  59 #define DRM_IOC_VOID            IOC_VOID
  60 #define DRM_IOC_READ            IOC_OUT
  61 #define DRM_IOC_WRITE           IOC_IN
  62 #define DRM_IOC_READWRITE       IOC_INOUT
  63 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  64 #endif
  65
  66 #define XFREE86_VERSION(major,minor,patch,snap) \
  67                 ((major << 16) | (minor << 8) | patch)
  68
  69 #ifndef CONFIG_XFREE86_VERSION
  70 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
  71 #endif
  72
  73 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  74 #define DRM_PROC_DEVICES "/proc/devices"
  75 #define DRM_PROC_MISC    "/proc/misc"
  76 #define DRM_PROC_DRM     "/proc/drm"
  77 #define DRM_DEV_DRM      "/dev/drm"
  78 #define DRM_DEV_MODE     (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
  79 #define DRM_DEV_UID      0
  80 #define DRM_DEV_GID      0
  81 #endif
  82
  83 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
  84 #define DRM_MAJOR       226
  85 #define DRM_MAX_MINOR   15
  86 #endif
  87 #define DRM_NAME        "drm"     /**< Name in kernel, /dev, and /proc */
  88 #define DRM_MIN_ORDER   5         /**< At least 2^5 bytes = 32 bytes */
  89 #define DRM_MAX_ORDER   22        /**< Up to 2^22 bytes = 4MB */
  90 #define DRM_RAM_PERCENT 10        /**< How much system ram can we lock? */
  91
  92 #define _DRM_LOCK_HELD  0x80000000 /**< Hardware lock is held */
  93 #define _DRM_LOCK_CONT  0x40000000 /**< Hardware lock is contended */
  94 #define _DRM_LOCK_IS_HELD(lock)    ((lock) & _DRM_LOCK_HELD)
  95 #define _DRM_LOCK_IS_CONT(lock)    ((lock) & _DRM_LOCK_CONT)
  96 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  97
  98
  99 typedef unsigned long drm_handle_t;
 100 typedef unsigned int  drm_context_t;
 101 typedef unsigned int  drm_drawable_t;
 102 typedef unsigned int  drm_magic_t;
 103
 104
 105 /**
 106  * Cliprect.
 107  *
 108  * \warning: If you change this structure, make sure you change
 109  * XF86DRIClipRectRec in the server as well
 110  *
 111  * \note KW: Actually it's illegal to change either for
 112  * backwards-compatibility reasons.
 113  */
 114 typedef struct drm_clip_rect {
 115         unsigned short  x1;
 116         unsigned short  y1;
 117         unsigned short  x2;
 118         unsigned short  y2;
 119 } drm_clip_rect_t;
 120
 121
 122 /**
 123  * Texture region,
 124  */
 125 typedef struct drm_tex_region {
 126         unsigned char   next;
 127         unsigned char   prev;
 128         unsigned char   in_use;
 129         unsigned char   padding;
 130         unsigned int    age;
 131 } drm_tex_region_t;
 132
 133
 134 /**
 135  * DRM_IOCTL_VERSION ioctl argument type.
 136  *
 137  * \sa drmGetVersion().
 138  */
 139 typedef struct drm_version {
 140         int    version_major;     /**< Major version */
 141         int    version_minor;     /**< Minor version */
 142         int    version_patchlevel;/**< Patch level */
 143         size_t name_len;          /**< Length of name buffer */
 144         char   *name;             /**< Name of driver */
 145         size_t date_len;          /**< Length of date buffer */
 146         char   *date;             /**< User-space buffer to hold date */
 147         size_t desc_len;          /**< Length of desc buffer */
 148         char   *desc;             /**< User-space buffer to hold desc */
 149 } drm_version_t;
 150
 151
 152 /**
 153  * DRM_IOCTL_GET_UNIQUE ioctl argument type.
 154  *
 155  * \sa drmGetBusid() and drmSetBusId().
 156  */
 157 typedef struct drm_unique {
 158         size_t unique_len;        /**< Length of unique */
 159         char   *unique;           /**< Unique name for driver instantiation */
 160 } drm_unique_t;
 161
 162
 163 typedef struct drm_list {
 164         int              count;   /**< Length of user-space structures */
 165         drm_version_t    *version;
 166 } drm_list_t;
 167
 168
 169 typedef struct drm_block {
 170         int              unused;
 171 } drm_block_t;
 172
 173
 174 /**
 175  * DRM_IOCTL_CONTROL ioctl argument type.
 176  *
 177  * \sa drmCtlInstHandler() and drmCtlUninstHandler().
 178  */
 179 typedef struct drm_control {
 180         enum {
 181                 DRM_ADD_COMMAND,
 182                 DRM_RM_COMMAND,
 183                 DRM_INST_HANDLER,
 184                 DRM_UNINST_HANDLER
 185         }                func;
 186         int              irq;
 187 } drm_control_t;
 188
 189
 190 /**
 191  * Type of memory to map.
 192  */
 193 typedef enum drm_map_type {
 194         _DRM_FRAME_BUFFER   = 0,  /**< WC (no caching), no core dump */
 195         _DRM_REGISTERS      = 1,  /**< no caching, no core dump */
 196         _DRM_SHM            = 2,  /**< shared, cached */
 197         _DRM_AGP            = 3,  /**< AGP/GART */
 198         _DRM_SCATTER_GATHER = 4   /**< Scatter/gather memory for PCI DMA */
 199 } drm_map_type_t;
 200
 201
 202 /**
 203  * Memory mapping flags.
 204  */
 205 typedef enum drm_map_flags {
 206         _DRM_RESTRICTED      = 0x01, /**< Cannot be mapped to user-virtual */
 207         _DRM_READ_ONLY       = 0x02,
 208         _DRM_LOCKED          = 0x04, /**< shared, cached, locked */
 209         _DRM_KERNEL          = 0x08, /**< kernel requires access */
 210         _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
 211         _DRM_CONTAINS_LOCK   = 0x20, /**< SHM page that contains lock */
 212         _DRM_REMOVABLE       = 0x40  /**< Removable mapping */
 213 } drm_map_flags_t;
 214
 215
 216 typedef struct drm_ctx_priv_map {
 217         unsigned int    ctx_id;  /**< Context requesting private mapping */
 218         void            *handle; /**< Handle of map */
 219 } drm_ctx_priv_map_t;
 220
 221
 222 /**
 223  * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
 224  * argument type.
 225  *
 226  * \sa drmAddMap().
 227  */
 228 typedef struct drm_map {
 229         unsigned long   offset;  /**< Requested physical address (0 for SAREA)*/
 230         unsigned long   size;    /**< Requested physical size (bytes) */
 231         drm_map_type_t  type;    /**< Type of memory to map */
 232         drm_map_flags_t flags;   /**< Flags */
 233         void            *handle; /**< User-space: "Handle" to pass to mmap() */
 234                                  /**< Kernel-space: kernel-virtual address */
 235         int             mtrr;    /**< MTRR slot used */
 236                                  /*   Private data */
 237 } drm_map_t;
 238
 239
 240 /**
 241  * DRM_IOCTL_GET_CLIENT ioctl argument type.
 242  */
 243 typedef struct drm_client {
 244         int             idx;    /**< Which client desired? */
 245         int             auth;   /**< Is client authenticated? */
 246         unsigned long   pid;    /**< Process ID */
 247         unsigned long   uid;    /**< User ID */
 248         unsigned long   magic;  /**< Magic */
 249         unsigned long   iocs;   /**< Ioctl count */
 250 } drm_client_t;
 251
 252
 253 typedef enum {
 254         _DRM_STAT_LOCK,
 255         _DRM_STAT_OPENS,
 256         _DRM_STAT_CLOSES,
 257         _DRM_STAT_IOCTLS,
 258         _DRM_STAT_LOCKS,
 259         _DRM_STAT_UNLOCKS,
 260         _DRM_STAT_VALUE,        /**< Generic value */
 261         _DRM_STAT_BYTE,         /**< Generic byte counter (1024bytes/K) */
 262         _DRM_STAT_COUNT,        /**< Generic non-byte counter (1000/k) */
 263
 264         _DRM_STAT_IRQ,          /**< IRQ */
 265         _DRM_STAT_PRIMARY,      /**< Primary DMA bytes */
 266         _DRM_STAT_SECONDARY,    /**< Secondary DMA bytes */
 267         _DRM_STAT_DMA,          /**< DMA */
 268         _DRM_STAT_SPECIAL,      /**< Special DMA (e.g., priority or polled) */
 269         _DRM_STAT_MISSED        /**< Missed DMA opportunity */
 270
 271                                 /* Add to the *END* of the list */
 272 } drm_stat_type_t;
 273
 274
 275 /**
 276  * DRM_IOCTL_GET_STATS ioctl argument type.
 277  */
 278 typedef struct drm_stats {
 279         unsigned long count;
 280         struct {
 281                 unsigned long   value;
 282                 drm_stat_type_t type;
 283         } data[15];
 284 } drm_stats_t;
 285
 286
 287 /**
 288  * Hardware locking flags.
 289  */
 290 typedef enum drm_lock_flags {
 291         _DRM_LOCK_READY      = 0x01, /**< Wait until hardware is ready for DMA */
 292         _DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */
 293         _DRM_LOCK_FLUSH      = 0x04, /**< Flush this context's DMA queue first */
 294         _DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */
 295                                 /* These *HALT* flags aren't supported yet
 296                                    -- they will be used to support the
 297                                    full-screen DGA-like mode. */
 298         _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
 299         _DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
 300 } drm_lock_flags_t;
 301
 302
 303 /**
 304  * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
 305  *
 306  * \sa drmGetLock() and drmUnlock().
 307  */
 308 typedef struct drm_lock {
 309         int              context;
 310         drm_lock_flags_t flags;
 311 } drm_lock_t;
 312
 313
 314 /**
 315  * DMA flags
 316  *
 317  * \warning
 318  * These values \e must match xf86drm.h.
 319  *
 320  * \sa drm_dma.
 321  */
 322 typedef enum drm_dma_flags {
 323                                       /* Flags for DMA buffer dispatch */
 324         _DRM_DMA_BLOCK        = 0x01, /**<
 325                                        * Block until buffer dispatched.
 326                                        *
 327                                        * \note The buffer may not yet have
 328                                        * been processed by the hardware --
 329                                        * getting a hardware lock with the
 330                                        * hardware quiescent will ensure
 331                                        * that the buffer has been
 332                                        * processed.
 333                                        */
 334         _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
 335         _DRM_DMA_PRIORITY     = 0x04, /**< High priority dispatch */
 336
 337                                       /* Flags for DMA buffer request */
 338         _DRM_DMA_WAIT         = 0x10, /**< Wait for free buffers */
 339         _DRM_DMA_SMALLER_OK   = 0x20, /**< Smaller-than-requested buffers OK */
 340         _DRM_DMA_LARGER_OK    = 0x40  /**< Larger-than-requested buffers OK */
 341 } drm_dma_flags_t;
 342
 343
 344 /**
 345  * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
 346  *
 347  * \sa drmAddBufs().
 348  */
 349 typedef struct drm_buf_desc {
 350         int           count;     /**< Number of buffers of this size */
 351         int           size;      /**< Size in bytes */
 352         int           low_mark;  /**< Low water mark */
 353         int           high_mark; /**< High water mark */
 354         enum {
 355                 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
 356                 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
 357                 _DRM_SG_BUFFER  = 0x04  /**< Scatter/gather memory buffer */
 358         }             flags;
 359         unsigned long agp_start; /**<
 360                                   * Start address of where the AGP buffers are
 361                                   * in the AGP aperture
 362                                   */
 363 } drm_buf_desc_t;
 364
 365
 366 /**
 367  * DRM_IOCTL_INFO_BUFS ioctl argument type.
 368  */
 369 typedef struct drm_buf_info {
 370         int            count;   /**< Entries in list */
 371         drm_buf_desc_t *list;
 372 } drm_buf_info_t;
 373
 374
 375 /**
 376  * DRM_IOCTL_FREE_BUFS ioctl argument type.
 377  */
 378 typedef struct drm_buf_free {
 379         int            count;
 380         int            *list;
 381 } drm_buf_free_t;
 382
 383
 384 /**
 385  * Buffer information
 386  *
 387  * \sa drm_buf_map.
 388  */
 389 typedef struct drm_buf_pub {
 390         int               idx;         /**< Index into the master buffer list */
 391         int               total;       /**< Buffer size */
 392         int               used;        /**< Amount of buffer in use (for DMA) */
 393         void              *address;    /**< Address of buffer */
 394 } drm_buf_pub_t;
 395
 396
 397 /**
 398  * DRM_IOCTL_MAP_BUFS ioctl argument type.
 399  */
 400 typedef struct drm_buf_map {
 401         int           count;    /**< Length of the buffer list */
 402         void          *virtual; /**< Mmap'd area in user-virtual */
 403         drm_buf_pub_t *list;    /**< Buffer information */
 404 } drm_buf_map_t;
 405
 406
 407 /**
 408  * DRM_IOCTL_DMA ioctl argument type.
 409  *
 410  * Indices here refer to the offset into the buffer list in drm_buf_get.
 411  *
 412  * \sa drmDMA().
 413  */
 414 typedef struct drm_dma {
 415         int             context;          /**< Context handle */
 416         int             send_count;       /**< Number of buffers to send */
 417         int             *send_indices;    /**< List of handles to buffers */
 418         int             *send_sizes;      /**< Lengths of data to send */
 419         drm_dma_flags_t flags;            /**< Flags */
 420         int             request_count;    /**< Number of buffers requested */
 421         int             request_size;     /**< Desired size for buffers */
 422         int             *request_indices; /**< Buffer information */
 423         int             *request_sizes;
 424         int             granted_count;    /**< Number of buffers granted */
 425 } drm_dma_t;
 426
 427
 428 typedef enum {
 429         _DRM_CONTEXT_PRESERVED = 0x01,
 430         _DRM_CONTEXT_2DONLY    = 0x02
 431 } drm_ctx_flags_t;
 432
 433
 434 /**
 435  * DRM_IOCTL_ADD_CTX ioctl argument type.
 436  *
 437  * \sa drmCreateContext() and drmDestroyContext().
 438  */
 439 typedef struct drm_ctx {
 440         drm_context_t   handle;
 441         drm_ctx_flags_t flags;
 442 } drm_ctx_t;
 443
 444
 445 /**
 446  * DRM_IOCTL_RES_CTX ioctl argument type.
 447  */
 448 typedef struct drm_ctx_res {
 449         int             count;
 450         drm_ctx_t       *contexts;
 451 } drm_ctx_res_t;
 452
 453
 454 /**
 455  * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
 456  */
 457 typedef struct drm_draw {
 458         drm_drawable_t  handle;
 459 } drm_draw_t;
 460
 461
 462 /**
 463  * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
 464  */
 465 typedef struct drm_auth {
 466         drm_magic_t     magic;
 467 } drm_auth_t;
 468
 469
 470 /**
 471  * DRM_IOCTL_IRQ_BUSID ioctl argument type.
 472  *
 473  * \sa drmGetInterruptFromBusID().
 474  */
 475 typedef struct drm_irq_busid {
 476         int irq;        /**< IRQ number */
 477         int busnum;     /**< bus number */
 478         int devnum;     /**< device number */
 479         int funcnum;    /**< function number */
 480 } drm_irq_busid_t;
 481
 482
 483 typedef enum {
 484     _DRM_VBLANK_ABSOLUTE = 0x0,         /**< Wait for specific vblank sequence number */
 485     _DRM_VBLANK_RELATIVE = 0x1,         /**< Wait for given number of vblanks */
 486     _DRM_VBLANK_SIGNAL   = 0x40000000   /**< Send signal instead of blocking */
 487 } drm_vblank_seq_type_t;
 488
 489
 490 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
 491
 492
 493 struct drm_wait_vblank_request {
 494         drm_vblank_seq_type_t type;
 495         unsigned int sequence;
 496         unsigned long signal;
 497 };
 498
 499
 500 struct drm_wait_vblank_reply {
 501         drm_vblank_seq_type_t type;
 502         unsigned int sequence;
 503         long tval_sec;
 504         long tval_usec;
 505 };
 506
 507
 508 /**
 509  * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
 510  *
 511  * \sa drmWaitVBlank().
 512  */
 513 typedef union drm_wait_vblank {
 514         struct drm_wait_vblank_request request;
 515         struct drm_wait_vblank_reply reply;
 516 } drm_wait_vblank_t;
 517
 518
 519 /**
 520  * DRM_IOCTL_AGP_ENABLE ioctl argument type.
 521  *
 522  * \sa drmAgpEnable().
 523  */
 524 typedef struct drm_agp_mode {
 525         unsigned long mode;     /**< AGP mode */
 526 } drm_agp_mode_t;
 527
 528
 529 /**
 530  * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
 531  *
 532  * \sa drmAgpAlloc() and drmAgpFree().
 533  */
 534 typedef struct drm_agp_buffer {
 535         unsigned long size;     /**< In bytes -- will round to page boundary */
 536         unsigned long handle;   /**< Used for binding / unbinding */
 537         unsigned long type;     /**< Type of memory to allocate */
 538         unsigned long physical; /**< Physical used by i810 */
 539 } drm_agp_buffer_t;
 540
 541
 542 /**
 543  * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
 544  *
 545  * \sa drmAgpBind() and drmAgpUnbind().
 546  */
 547 typedef struct drm_agp_binding {
 548         unsigned long handle;   /**< From drm_agp_buffer */
 549         unsigned long offset;   /**< In bytes -- will round to page boundary */
 550 } drm_agp_binding_t;
 551
 552
 553 /**
 554  * DRM_IOCTL_AGP_INFO ioctl argument type.
 555  *
 556  * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
 557  * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
 558  * drmAgpVendorId() and drmAgpDeviceId().
 559  */
 560 typedef struct drm_agp_info {
 561         int            agp_version_major;
 562         int            agp_version_minor;
 563         unsigned long  mode;
 564         unsigned long  aperture_base;  /* physical address */
 565         unsigned long  aperture_size;  /* bytes */
 566         unsigned long  memory_allowed; /* bytes */
 567         unsigned long  memory_used;
 568
 569                                 /* PCI information */
 570         unsigned short id_vendor;
 571         unsigned short id_device;
 572 } drm_agp_info_t;
 573
 574
 575 /**
 576  * DRM_IOCTL_SG_ALLOC ioctl argument type.
 577  */
 578 typedef struct drm_scatter_gather {
 579         unsigned long size;     /**< In bytes -- will round to page boundary */
 580         unsigned long handle;   /**< Used for mapping / unmapping */
 581 } drm_scatter_gather_t;
 582
 583
 584 #define DRM_IOCTL_BASE                  'd'
 585 #define DRM_IO(nr)                      _IO(DRM_IOCTL_BASE,nr)
 586 #define DRM_IOR(nr,type)                _IOR(DRM_IOCTL_BASE,nr,type)
 587 #define DRM_IOW(nr,type)                _IOW(DRM_IOCTL_BASE,nr,type)
 588 #define DRM_IOWR(nr,type)               _IOWR(DRM_IOCTL_BASE,nr,type)
 589
 590 #define DRM_IOCTL_VERSION               DRM_IOWR(0x00, drm_version_t)
 591 #define DRM_IOCTL_GET_UNIQUE            DRM_IOWR(0x01, drm_unique_t)
 592 #define DRM_IOCTL_GET_MAGIC             DRM_IOR( 0x02, drm_auth_t)
 593 #define DRM_IOCTL_IRQ_BUSID             DRM_IOWR(0x03, drm_irq_busid_t)
 594 #define DRM_IOCTL_GET_MAP               DRM_IOWR(0x04, drm_map_t)
 595 #define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, drm_client_t)
 596 #define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, drm_stats_t)
 597
 598 #define DRM_IOCTL_SET_UNIQUE            DRM_IOW( 0x10, drm_unique_t)
 599 #define DRM_IOCTL_AUTH_MAGIC            DRM_IOW( 0x11, drm_auth_t)
 600 #define DRM_IOCTL_BLOCK                 DRM_IOWR(0x12, drm_block_t)
 601 #define DRM_IOCTL_UNBLOCK               DRM_IOWR(0x13, drm_block_t)
 602 #define DRM_IOCTL_CONTROL               DRM_IOW( 0x14, drm_control_t)
 603 #define DRM_IOCTL_ADD_MAP               DRM_IOWR(0x15, drm_map_t)
 604 #define DRM_IOCTL_ADD_BUFS              DRM_IOWR(0x16, drm_buf_desc_t)
 605 #define DRM_IOCTL_MARK_BUFS             DRM_IOW( 0x17, drm_buf_desc_t)
 606 #define DRM_IOCTL_INFO_BUFS             DRM_IOWR(0x18, drm_buf_info_t)
 607 #define DRM_IOCTL_MAP_BUFS              DRM_IOWR(0x19, drm_buf_map_t)
 608 #define DRM_IOCTL_FREE_BUFS             DRM_IOW( 0x1a, drm_buf_free_t)
 609
 610 #define DRM_IOCTL_RM_MAP                DRM_IOW( 0x1b, drm_map_t)
 611
 612 #define DRM_IOCTL_SET_SAREA_CTX         DRM_IOW( 0x1c, drm_ctx_priv_map_t)
 613 #define DRM_IOCTL_GET_SAREA_CTX         DRM_IOWR(0x1d, drm_ctx_priv_map_t)
 614
 615 #define DRM_IOCTL_ADD_CTX               DRM_IOWR(0x20, drm_ctx_t)
 616 #define DRM_IOCTL_RM_CTX                DRM_IOWR(0x21, drm_ctx_t)
 617 #define DRM_IOCTL_MOD_CTX               DRM_IOW( 0x22, drm_ctx_t)
 618 #define DRM_IOCTL_GET_CTX               DRM_IOWR(0x23, drm_ctx_t)
 619 #define DRM_IOCTL_SWITCH_CTX            DRM_IOW( 0x24, drm_ctx_t)
 620 #define DRM_IOCTL_NEW_CTX               DRM_IOW( 0x25, drm_ctx_t)
 621 #define DRM_IOCTL_RES_CTX               DRM_IOWR(0x26, drm_ctx_res_t)
 622 #define DRM_IOCTL_ADD_DRAW              DRM_IOWR(0x27, drm_draw_t)
 623 #define DRM_IOCTL_RM_DRAW               DRM_IOWR(0x28, drm_draw_t)
 624 #define DRM_IOCTL_DMA                   DRM_IOWR(0x29, drm_dma_t)
 625 #define DRM_IOCTL_LOCK                  DRM_IOW( 0x2a, drm_lock_t)
 626 #define DRM_IOCTL_UNLOCK                DRM_IOW( 0x2b, drm_lock_t)
 627 #define DRM_IOCTL_FINISH                DRM_IOW( 0x2c, drm_lock_t)
 628
 629 #define DRM_IOCTL_AGP_ACQUIRE           DRM_IO(  0x30)
 630 #define DRM_IOCTL_AGP_RELEASE           DRM_IO(  0x31)
 631 #define DRM_IOCTL_AGP_ENABLE            DRM_IOW( 0x32, drm_agp_mode_t)
 632 #define DRM_IOCTL_AGP_INFO              DRM_IOR( 0x33, drm_agp_info_t)
 633 #define DRM_IOCTL_AGP_ALLOC             DRM_IOWR(0x34, drm_agp_buffer_t)
 634 #define DRM_IOCTL_AGP_FREE              DRM_IOW( 0x35, drm_agp_buffer_t)
 635 #define DRM_IOCTL_AGP_BIND              DRM_IOW( 0x36, drm_agp_binding_t)
 636 #define DRM_IOCTL_AGP_UNBIND            DRM_IOW( 0x37, drm_agp_binding_t)
 637
 638 #define DRM_IOCTL_SG_ALLOC              DRM_IOW( 0x38, drm_scatter_gather_t)
 639 #define DRM_IOCTL_SG_FREE               DRM_IOW( 0x39, drm_scatter_gather_t)
 640
 641 #define DRM_IOCTL_WAIT_VBLANK           DRM_IOWR(0x3a, drm_wait_vblank_t)
 642
 643 /**
 644  * Device specific ioctls should only be in their respective headers
 645  * The device specific ioctl range is from 0x40 to 0x79.
 646  *
 647  * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
 648  * drmCommandReadWrite().
 649  */
 650 #define DRM_COMMAND_BASE                0x40
 651
 652 #endif