include/asm-cris/hardirq.h

   1 #ifndef __ASM_HARDIRQ_H
   2 #define __ASM_HARDIRQ_H
   3
   4 /* only non-SMP supported */
   5
   6 #include <linux/threads.h>
   7 #include <linux/cache.h>
   8
   9 /* entry.S is sensitive to the offsets of these fields */
  10 typedef struct {
  11         unsigned int __softirq_pending;
  12         unsigned int __local_irq_count;
  13         unsigned int __local_bh_count;
  14         unsigned int __syscall_count;
  15         struct task_struct * __ksoftirqd_task; /* waitqueue is too large */
  16 } ____cacheline_aligned irq_cpustat_t;
  17
  18 #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
  19
  20 /*
  21  * We put the hardirq and softirq counter into the preemption
  22  * counter. The bitmask has the following meaning:
  23  *
  24  * - bits 0-7 are the preemption count (max preemption depth: 256)
  25  * - bits 8-15 are the softirq count (max # of softirqs: 256)
  26  * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
  27  *
  28  * - ( bit 26 is the PREEMPT_ACTIVE flag. )
  29  *
  30  * PREEMPT_MASK: 0x000000ff
  31  * SOFTIRQ_MASK: 0x0000ff00
  32  * HARDIRQ_MASK: 0x00ff0000
  33  */
  34
  35 #define PREEMPT_BITS    8
  36 #define SOFTIRQ_BITS    8
  37 #define HARDIRQ_BITS    8
  38
  39 #define PREEMPT_SHIFT   0
  40 #define SOFTIRQ_SHIFT   (PREEMPT_SHIFT + PREEMPT_BITS)
  41 #define HARDIRQ_SHIFT   (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
  42
  43 #define __MASK(x)       ((1UL << (x))-1)
  44
  45 #define PREEMPT_MASK    (__MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
  46 #define HARDIRQ_MASK    (__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
  47 #define SOFTIRQ_MASK    (__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
  48
  49 #define hardirq_count() (preempt_count() & HARDIRQ_MASK)
  50 #define softirq_count() (preempt_count() & SOFTIRQ_MASK)
  51 #define irq_count()     (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
  52
  53 #define PREEMPT_OFFSET  (1UL << PREEMPT_SHIFT)
  54 #define SOFTIRQ_OFFSET  (1UL << SOFTIRQ_SHIFT)
  55 #define HARDIRQ_OFFSET  (1UL << HARDIRQ_SHIFT)
  56
  57 /*
  58  * The hardirq mask has to be large enough to have
  59  * space for potentially all IRQ sources in the system
  60  * nesting on a single CPU:
  61  */
  62 #if (1 << HARDIRQ_BITS) < NR_IRQS
  63 # error HARDIRQ_BITS is too low!
  64 #endif
  65
  66 /*
  67  * Are we doing bottom half or hardware interrupt processing?
  68  * Are we in a softirq context? Interrupt context?
  69  */
  70 #define in_irq()                (hardirq_count())
  71 #define in_softirq()            (softirq_count())
  72 #define in_interrupt()          (irq_count())
  73
  74
  75 #define hardirq_trylock()       (!in_interrupt())
  76 #define hardirq_endlock()       do { } while (0)
  77
  78 #define irq_enter()             (preempt_count() += HARDIRQ_OFFSET)
  79
  80 #ifdef CONFIG_PREEMPT
  81 # define in_atomic()    ((preempt_count() & ~PREEMPT_ACTIVE) != kernel_locked())
  82 # define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
  83 #else
  84 # define in_atomic()    (preempt_count() != 0)
  85 # define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
  86 #endif
  87 #define irq_exit()                                                      \
  88 do {                                                                    \
  89                 preempt_count() -= IRQ_EXIT_OFFSET;                     \
  90                 if (!in_interrupt() && softirq_pending(smp_processor_id())) \
  91                         do_softirq();                                   \
  92                 preempt_enable_no_resched();                            \
  93 } while (0)
  94
  95 #define synchronize_irq(irq)    barrier()
  96
  97 #endif /* __ASM_HARDIRQ_H */