4 * - flush_tlb_all() flushes all processes TLBs
5 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
6 * - flush_tlb_page(vma, vmaddr) flushes one page
7 * - flush_tlb_range(vma, start, end) flushes a range of pages
9 #define flush_tlb_all() memc_update_all()
10 #define flush_tlb_mm(mm) memc_update_mm(mm)
11 #define flush_tlb_range(vma,start,end) \
12 do { memc_update_mm(vma->vm_mm); (void)(start); (void)(end); } while (0)
13 #define flush_tlb_page(vma, vmaddr) do { } while (0)
16 * The following handle the weird MEMC chip
18 static inline void memc_update_all(void)
20 struct task_struct
*p
;
22 cpu_memc_update_all(init_mm
.pgd
);
26 cpu_memc_update_all(p
->mm
->pgd
);
28 processor
._set_pgd(current
->active_mm
->pgd
);
31 static inline void memc_update_mm(struct mm_struct
*mm
)
33 cpu_memc_update_all(mm
->pgd
);
35 if (mm
== current
->active_mm
)
36 processor
._set_pgd(mm
->pgd
);
40 memc_clear(struct mm_struct
*mm
, struct page
*page
)
42 cpu_memc_update_entry(mm
->pgd
, (unsigned long) page_address(page
), 0);
44 if (mm
== current
->active_mm
)
45 processor
._set_pgd(mm
->pgd
);
49 memc_update_addr(struct mm_struct
*mm
, pte_t pte
, unsigned long vaddr
)
51 cpu_memc_update_entry(mm
->pgd
, pte_val(pte
), vaddr
);
53 if (mm
== current
->active_mm
)
54 processor
._set_pgd(mm
->pgd
);
58 update_mmu_cache(struct vm_area_struct
*vma
, unsigned long addr
, pte_t pte
)
60 struct mm_struct
*mm
= vma
->vm_mm
;
61 memc_update_addr(mm
, pte
, addr
);